From 8fae442f8868694ad5937292f1920a21b741e935 Mon Sep 17 00:00:00 2001 From: Suneel Garapati Date: Wed, 10 Jun 2015 15:46:56 +0530 Subject: [PATCH] devicetree: xilinx: zynqmp: add sata node add sata node with sata fixed clock nodes in dtsi file. enable sata in zynqmp-ep108.dts with broken-gen2. Signed-off-by: Suneel Garapati Signed-off-by: Michal Simek --- arch/arm64/boot/dts/xilinx/zynqmp-ep108.dts | 5 +++++ arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 15 +++++++++++++++ 2 files changed, 20 insertions(+) diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-ep108.dts b/arch/arm64/boot/dts/xilinx/zynqmp-ep108.dts index 0a3f40ecd06d..981e594f16b4 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-ep108.dts +++ b/arch/arm64/boot/dts/xilinx/zynqmp-ep108.dts @@ -42,6 +42,11 @@ }; }; +&sata { + status = "okay"; + ceva,broken-gen2; +}; + &uart0 { status = "okay"; }; diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi index 11e0b00045cf..72a37479026b 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi @@ -272,6 +272,21 @@ #size-cells = <0>; }; + sata_clk: sata_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <75000000>; + }; + + sata: ahci@fd0c0000 { + compatible = "ceva,ahci-1v84"; + status = "disabled"; + reg = <0x0 0xfd0c0000 0x2000>; + interrupt-parent = <&gic>; + interrupts = <0 133 4>; + clocks = <&sata_clk>; + }; + sdhci0: sdhci@ff160000 { compatible = "arasan,sdhci-8.9a"; status = "disabled";