clk: imx: clk-imx8qxp-lpcg: add USB2 clock
Add USB2 controller and PHY clock information. Signed-off-by: Peter Chen <peter.chen@nxp.com>5.4-rM2-2.2.x-imx-squashed
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a457cffe01
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8feae1a376
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@ -119,6 +119,8 @@ static const struct imx8qxp_lpcg_data imx8qxp_lpcg_conn[] = {
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{ IMX_CONN_LPCG_ENET1_AHB_CLK, "enet1_ahb_clk", "conn_axi_clk_root", 0, CONN_ENET_1_LPCG, 8, 0, },
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{ IMX_CONN_LPCG_ENET1_IPG_S_CLK, "enet1_ipg_s_clk", "conn_ipg_clk_root", 0, CONN_ENET_1_LPCG, 20, 0, },
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{ IMX_CONN_LPCG_ENET1_IPG_CLK, "enet1_ipg_clk", "enet0_ipg_s_clk", 0, CONN_ENET_1_LPCG, 16, 0, },
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{ IMX_CONN_LPCG_USB2_PHY_IPG_CLK, "usboh3_phy_ipg_clk", "conn_ipg_clk_root", 0, CONN_USB_2_LPCG, 28, 0, },
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{ IMX_CONN_LPCG_USB2_AHB_CLK, "usboh3_ahb_clk", "conn_ahb_clk_root", 0, CONN_USB_2_LPCG, 24, 0, },
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};
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static const struct imx8qxp_ss_lpcg imx8qxp_ss_conn = {
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