Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (32 commits) MIPS: Wire up accept4 syscall. MIPS: VPE: Delete unused function get_tc_unused(). MIPS: VPE: Fix bogus indentation. MIPS: VPE: Make various functions static. MIPS: VPE: Free relocation chain on error. MIPS: VPE: Fix compiler warning. MIPS: Module: Make error messages unique. MIPS: Octeon: Run IPI code with interrupts disabled. MIPS: Jazz: Fix read buffer overflow MIPS: Use DIV_ROUND_CLOSEST MIPS: MTX-1: Request button GPIO before setting its direction MIPS: AR7: Override CFLAGS with -Werror MIPS: AR7: Remove unused tnetd7200_get_clock function MIPS: AR7: Use DMA_BIT_MASK(nn) instead of deprecated DMA_nnBIT_MASK MIPS: AR7: Fix build failures when CONFIG_SERIAL_8250 is not enabled MIPS: Fix read buffer overflow MIPS: AR7: Fix build warning on memory.c MIPS: Octeon PCIe: Make hardware and software bus numbers match. MIPS: RBTX4939: Fix IOC pin-enable register updating MIPS: Simplify and correct interrupt handling for MSP4200 ...hifive-unleashed-5.1
Linus Torvalds
commit
90bc1a658a
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@ -1,7 +1,7 @@
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/*
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* MTX-1 platform devices registration
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*
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* Copyright (C) 2007, Florian Fainelli <florian@openwrt.org>
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* Copyright (C) 2007-2009, Florian Fainelli <florian@openwrt.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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@ -142,7 +142,17 @@ static struct __initdata platform_device * mtx1_devs[] = {
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static int __init mtx1_register_devices(void)
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{
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gpio_direction_input(207);
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int rc;
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rc = gpio_request(mtx1_gpio_button[0].gpio,
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mtx1_gpio_button[0].desc);
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if (rc < 0) {
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printk(KERN_INFO "mtx1: failed to request %d\n",
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mtx1_gpio_button[0].gpio);
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goto out;
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}
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gpio_direction_input(mtx1_gpio_button[0].gpio);
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out:
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return platform_add_devices(mtx1_devs, ARRAY_SIZE(mtx1_devs));
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}
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@ -8,3 +8,4 @@ obj-y := \
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platform.o \
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gpio.o \
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clock.o
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EXTRA_CFLAGS += -Werror
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@ -264,19 +264,6 @@ static void __init tnetd7300_init_clocks(void)
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iounmap(bootcr);
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}
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static int tnetd7200_get_clock(int base, struct tnetd7200_clock *clock,
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u32 *bootcr, u32 bus_clock)
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{
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int divisor = ((readl(&clock->prediv) & 0x1f) + 1) *
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((readl(&clock->postdiv) & 0x1f) + 1);
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if (*bootcr & BOOT_PLL_BYPASS)
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return base / divisor;
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return base * ((readl(&clock->mul) & 0xf) + 1) / divisor;
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}
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static void tnetd7200_set_clock(int base, struct tnetd7200_clock *clock,
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int prediv, int postdiv, int postdiv2, int mul, u32 frequency)
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{
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@ -52,7 +52,7 @@ static int __init memsize(void)
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size <<= 1;
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} while (size < (64 << 20));
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writel(tmpaddr, &addr);
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writel((u32)tmpaddr, &addr);
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return size;
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}
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@ -28,7 +28,6 @@
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#include <linux/serial_8250.h>
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#include <linux/ioport.h>
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#include <linux/io.h>
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#include <linux/version.h>
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#include <linux/vlynq.h>
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#include <linux/leds.h>
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#include <linux/string.h>
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@ -243,13 +242,13 @@ static struct platform_device physmap_flash = {
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.num_resources = 1,
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};
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static u64 cpmac_dma_mask = DMA_32BIT_MASK;
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static u64 cpmac_dma_mask = DMA_BIT_MASK(32);
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static struct platform_device cpmac_low = {
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.id = 0,
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.name = "cpmac",
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.dev = {
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.dma_mask = &cpmac_dma_mask,
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.coherent_dma_mask = DMA_32BIT_MASK,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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.platform_data = &cpmac_low_data,
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},
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.resource = cpmac_low_res,
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@ -261,7 +260,7 @@ static struct platform_device cpmac_high = {
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.name = "cpmac",
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.dev = {
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.dma_mask = &cpmac_dma_mask,
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.coherent_dma_mask = DMA_32BIT_MASK,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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.platform_data = &cpmac_high_data,
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},
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.resource = cpmac_high_res,
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@ -481,6 +480,7 @@ static void __init detect_leds(void)
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static int __init ar7_register_devices(void)
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{
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int res;
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#ifdef CONFIG_SERIAL_8250
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static struct uart_port uart_port[2];
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memset(uart_port, 0, sizeof(struct uart_port) * 2);
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@ -512,7 +512,7 @@ static int __init ar7_register_devices(void)
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if (res)
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return res;
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}
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#endif /* CONFIG_SERIAL_8250 */
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res = platform_device_register(&physmap_flash);
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if (res)
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return res;
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@ -144,7 +144,7 @@ static char * __init lookup_psp_var_map(u8 num)
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{
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int i;
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for (i = 0; i < sizeof(psp_var_map); i++)
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for (i = 0; i < ARRAY_SIZE(psp_var_map); i++)
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if (psp_var_map[i].num == num)
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return psp_var_map[i].value;
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@ -15,7 +15,6 @@
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
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*/
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#include <linux/version.h>
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#include <linux/init.h>
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#include <linux/ioport.h>
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#include <linux/pm.h>
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@ -194,11 +194,11 @@ static void octeon_init_secondary(void)
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void octeon_prepare_cpus(unsigned int max_cpus)
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{
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cvmx_write_csr(CVMX_CIU_MBOX_CLRX(cvmx_get_core_num()), 0xffffffff);
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if (request_irq(OCTEON_IRQ_MBOX0, mailbox_interrupt, IRQF_SHARED,
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if (request_irq(OCTEON_IRQ_MBOX0, mailbox_interrupt, IRQF_DISABLED,
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"mailbox0", mailbox_interrupt)) {
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panic("Cannot request_irq(OCTEON_IRQ_MBOX0)\n");
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}
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if (request_irq(OCTEON_IRQ_MBOX1, mailbox_interrupt, IRQF_SHARED,
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if (request_irq(OCTEON_IRQ_MBOX1, mailbox_interrupt, IRQF_DISABLED,
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"mailbox1", mailbox_interrupt)) {
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panic("Cannot request_irq(OCTEON_IRQ_MBOX1)\n");
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}
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@ -1,6 +1,4 @@
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/*
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* linux/arch/mips/dec/ecc-berr.c
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*
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* Bus error event handling code for systems equipped with ECC
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* handling logic, i.e. DECstation/DECsystem 5000/200 (KN02),
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* 5000/240 (KN03), 5000/260 (KN05) and DECsystem 5900 (KN03),
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@ -1,6 +1,4 @@
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/*
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* arch/mips/dec/int-handler.S
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*
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* Copyright (C) 1995, 1996, 1997 Paul M. Antoine and Harald Koerfgen
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* Copyright (C) 2000, 2001, 2002, 2003, 2005 Maciej W. Rozycki
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*
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@ -1,6 +1,4 @@
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/*
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* linux/arch/mips/dec/ioasic-irq.c
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*
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* DEC I/O ASIC interrupts.
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*
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* Copyright (c) 2002, 2003 Maciej W. Rozycki
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@ -1,6 +1,4 @@
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/*
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* linux/arch/mips/dec/kn01-berr.c
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*
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* Bus error event handling code for DECstation/DECsystem 3100
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* and 2100 (KN01) systems equipped with parity error detection
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* logic.
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@ -1,6 +1,4 @@
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/*
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* linux/arch/mips/dec/kn02-irq.c
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*
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* DECstation 5000/200 (KN02) Control and Status Register
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* interrupts.
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*
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@ -1,6 +1,4 @@
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/*
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* linux/arch/mips/dec/kn02xa-berr.c
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*
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* Bus error event handling code for 5000-series systems equipped
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* with parity error detection logic, i.e. DECstation/DECsystem
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* 5000/120, /125, /133 (KN02-BA), 5000/150 (KN04-BA) and Personal
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@ -1,6 +1,4 @@
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/*
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* arch/mips/dec/prom/call_o32.S
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*
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* O32 interface for the 64 (or N32) ABI.
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*
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* Copyright (C) 2002 Maciej W. Rozycki
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@ -1,6 +1,4 @@
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/*
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* arch/mips/dec/prom/console.c
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*
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* DECstation PROM-based early console support.
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*
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* Copyright (C) 2004, 2007 Maciej W. Rozycki
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@ -1,6 +1,4 @@
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/*
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* linux/arch/mips/dec/time.c
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*
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* Copyright (C) 1991, 1992, 1995 Linus Torvalds
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* Copyright (C) 2000, 2003 Maciej W. Rozycki
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*
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@ -1,7 +1,4 @@
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#
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# arch/mips/emma2rh/common/Makefile
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# Makefile for the common code of NEC EMMA2RH based board.
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#
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# Copyright (C) NEC Electronics Corporation 2005-2006
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#
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# This program is free software; you can redistribute it and/or modify
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|
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@ -1,7 +1,4 @@
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/*
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* arch/mips/emma2rh/common/prom.c
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* This file is prom file.
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*
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* Copyright (C) NEC Electronics Corporation 2004-2006
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*
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* This file is based on the arch/mips/ddb5xxx/common/prom.c
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|
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@ -1,7 +1,4 @@
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#
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# arch/mips/emma2rh/markeins/Makefile
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# Makefile for the common code of NEC EMMA2RH based board.
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#
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# Copyright (C) NEC Electronics Corporation 2005-2006
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#
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# This program is free software; you can redistribute it and/or modify
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|
|
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@ -1,7 +1,4 @@
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/*
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* arch/mips/emma2rh/markeins/irq.c
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* This file defines the irq handler for EMMA2RH.
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*
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* Copyright (C) NEC Electronics Corporation 2004-2006
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*
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* This file is based on the arch/mips/ddb5xxx/ddb5477/irq.c
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|
|
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@ -1,7 +1,4 @@
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/*
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* arch/mips/emma2rh/markeins/led.c
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* This file defines the led display for Mark-eins.
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*
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* Copyright (C) NEC Electronics Corporation 2004-2006
|
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*
|
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* This program is free software; you can redistribute it and/or modify
|
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|
|
|
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|
|
@ -1,7 +1,4 @@
|
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/*
|
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* arch/mips/emma2rh/markeins/platofrm.c
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* This file sets up platform devices for EMMA2RH Mark-eins.
|
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*
|
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* Copyright(C) MontaVista Software Inc, 2006
|
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*
|
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* Author: dmitry pervushin <dpervushin@ru.mvista.com>
|
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|
|
|
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|
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@ -1,7 +1,4 @@
|
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/*
|
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* arch/mips/emma2rh/markeins/setup.c
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* This file is setup for EMMA2RH Mark-eins.
|
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*
|
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* Copyright (C) NEC Electronics Corporation 2004-2006
|
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*
|
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* This file is based on the arch/mips/ddb5xxx/ddb5477/setup.c.
|
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|
|
|
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|
|
@ -1,6 +1,4 @@
|
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/*
|
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* arch/mips/dec/prom/call_o32.S
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*
|
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* O32 interface for the 64 (or N32) ABI.
|
||||
*
|
||||
* Copyright (C) 2002 Maciej W. Rozycki
|
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|
|
|
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|
|
@ -1,7 +1,4 @@
|
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/*
|
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* arch/mips/include/asm/emma/emma2rh.h
|
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* This file is EMMA2RH common header.
|
||||
*
|
||||
* Copyright (C) NEC Electronics Corporation 2005-2006
|
||||
*
|
||||
* This file based on include/asm-mips/ddb5xxx/ddb5xxx.h
|
||||
|
|
|
|||
|
|
@ -1,7 +1,4 @@
|
|||
/*
|
||||
* include/asm-mips/emma2rh/markeins.h
|
||||
* This file is EMMA2RH board depended header.
|
||||
*
|
||||
* Copyright (C) NEC Electronics Corporation 2005-2006
|
||||
*
|
||||
* This file based on include/asm-mips/ddb5xxx/ddb5xxx.h
|
||||
|
|
|
|||
|
|
@ -20,7 +20,7 @@
|
|||
#define GIC_TRIG_EDGE 1
|
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#define GIC_TRIG_LEVEL 0
|
||||
|
||||
#if CONFIG_SMP
|
||||
#ifdef CONFIG_SMP
|
||||
#define GIC_NUM_INTRS (24 + NR_CPUS * 2)
|
||||
#else
|
||||
#define GIC_NUM_INTRS 32
|
||||
|
|
|
|||
|
|
@ -23,6 +23,8 @@
|
|||
#if defined(CONFIG_PMC_MSP7120_EVAL) || defined(CONFIG_PMC_MSP7120_GW) || \
|
||||
defined(CONFIG_PMC_MSP7120_FPGA)
|
||||
#define MIPS34K_MISSED_ITLB_WAR 1
|
||||
#else
|
||||
#define MIPS34K_MISSED_ITLB_WAR 0
|
||||
#endif
|
||||
|
||||
#endif /* __ASM_MIPS_PMC_SIERRA_WAR_H */
|
||||
|
|
|
|||
|
|
@ -311,8 +311,9 @@ extern void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long
|
|||
|
||||
unsigned long get_wchan(struct task_struct *p);
|
||||
|
||||
#define __KSTK_TOS(tsk) ((unsigned long)task_stack_page(tsk) + THREAD_SIZE - 32)
|
||||
#define task_pt_regs(tsk) ((struct pt_regs *)__KSTK_TOS(tsk) - 1)
|
||||
#define __KSTK_TOS(tsk) ((unsigned long)task_stack_page(tsk) + \
|
||||
THREAD_SIZE - 32 - sizeof(struct pt_regs))
|
||||
#define task_pt_regs(tsk) ((struct pt_regs *)__KSTK_TOS(tsk))
|
||||
#define KSTK_EIP(tsk) (task_pt_regs(tsk)->cp0_epc)
|
||||
#define KSTK_ESP(tsk) (task_pt_regs(tsk)->regs[29])
|
||||
#define KSTK_STATUS(tsk) (task_pt_regs(tsk)->cp0_status)
|
||||
|
|
|
|||
|
|
@ -354,16 +354,17 @@
|
|||
#define __NR_pwritev (__NR_Linux + 331)
|
||||
#define __NR_rt_tgsigqueueinfo (__NR_Linux + 332)
|
||||
#define __NR_perf_counter_open (__NR_Linux + 333)
|
||||
#define __NR_accept4 (__NR_Linux + 334)
|
||||
|
||||
/*
|
||||
* Offset of the last Linux o32 flavoured syscall
|
||||
*/
|
||||
#define __NR_Linux_syscalls 333
|
||||
#define __NR_Linux_syscalls 334
|
||||
|
||||
#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
|
||||
|
||||
#define __NR_O32_Linux 4000
|
||||
#define __NR_O32_Linux_syscalls 333
|
||||
#define __NR_O32_Linux_syscalls 334
|
||||
|
||||
#if _MIPS_SIM == _MIPS_SIM_ABI64
|
||||
|
||||
|
|
@ -664,16 +665,17 @@
|
|||
#define __NR_pwritev (__NR_Linux + 290)
|
||||
#define __NR_rt_tgsigqueueinfo (__NR_Linux + 291)
|
||||
#define __NR_perf_counter_open (__NR_Linux + 292)
|
||||
#define __NR_accept4 (__NR_Linux + 293)
|
||||
|
||||
/*
|
||||
* Offset of the last Linux 64-bit flavoured syscall
|
||||
*/
|
||||
#define __NR_Linux_syscalls 292
|
||||
#define __NR_Linux_syscalls 293
|
||||
|
||||
#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */
|
||||
|
||||
#define __NR_64_Linux 5000
|
||||
#define __NR_64_Linux_syscalls 292
|
||||
#define __NR_64_Linux_syscalls 293
|
||||
|
||||
#if _MIPS_SIM == _MIPS_SIM_NABI32
|
||||
|
||||
|
|
@ -978,16 +980,17 @@
|
|||
#define __NR_pwritev (__NR_Linux + 294)
|
||||
#define __NR_rt_tgsigqueueinfo (__NR_Linux + 295)
|
||||
#define __NR_perf_counter_open (__NR_Linux + 296)
|
||||
#define __NR_accept4 (__NR_Linux + 297)
|
||||
|
||||
/*
|
||||
* Offset of the last N32 flavoured syscall
|
||||
*/
|
||||
#define __NR_Linux_syscalls 296
|
||||
#define __NR_Linux_syscalls 297
|
||||
|
||||
#endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */
|
||||
|
||||
#define __NR_N32_Linux 6000
|
||||
#define __NR_N32_Linux_syscalls 296
|
||||
#define __NR_N32_Linux_syscalls 297
|
||||
|
||||
#ifdef __KERNEL__
|
||||
|
||||
|
|
|
|||
|
|
@ -190,7 +190,7 @@ int vdma_free(unsigned long laddr)
|
|||
return -1;
|
||||
}
|
||||
|
||||
while (pgtbl[i].owner == laddr && i < VDMA_PGTBL_ENTRIES) {
|
||||
while (i < VDMA_PGTBL_ENTRIES && pgtbl[i].owner == laddr) {
|
||||
pgtbl[i].owner = VDMA_PAGE_EMPTY;
|
||||
i++;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -188,7 +188,8 @@ NESTED(kernel_entry, 16, sp) # kernel entry point
|
|||
|
||||
MTC0 zero, CP0_CONTEXT # clear context register
|
||||
PTR_LA $28, init_thread_union
|
||||
PTR_LI sp, _THREAD_SIZE - 32
|
||||
/* Set the SP after an empty pt_regs. */
|
||||
PTR_LI sp, _THREAD_SIZE - 32 - PT_SIZE
|
||||
PTR_ADDU sp, $28
|
||||
set_saved_sp sp, t0, t1
|
||||
PTR_SUBU sp, 4 * SZREG # init stack pointer
|
||||
|
|
|
|||
|
|
@ -1,6 +1,4 @@
|
|||
/*
|
||||
* linux/arch/mips/kernel/irq_txx9.c
|
||||
*
|
||||
* Based on linux/arch/mips/jmr3927/rbhma3100/irq.c,
|
||||
* linux/arch/mips/tx4927/common/tx4927_irq.c,
|
||||
* linux/arch/mips/tx4938/common/irq.c
|
||||
|
|
|
|||
|
|
@ -98,7 +98,8 @@ static int apply_r_mips_32_rela(struct module *me, u32 *location, Elf_Addr v)
|
|||
static int apply_r_mips_26_rel(struct module *me, u32 *location, Elf_Addr v)
|
||||
{
|
||||
if (v % 4) {
|
||||
printk(KERN_ERR "module %s: dangerous relocation\n", me->name);
|
||||
pr_err("module %s: dangerous R_MIPS_26 REL relocation\n",
|
||||
me->name);
|
||||
return -ENOEXEC;
|
||||
}
|
||||
|
||||
|
|
@ -118,7 +119,8 @@ static int apply_r_mips_26_rel(struct module *me, u32 *location, Elf_Addr v)
|
|||
static int apply_r_mips_26_rela(struct module *me, u32 *location, Elf_Addr v)
|
||||
{
|
||||
if (v % 4) {
|
||||
printk(KERN_ERR "module %s: dangerous relocation\n", me->name);
|
||||
pr_err("module %s: dangerous R_MIPS_26 RELArelocation\n",
|
||||
me->name);
|
||||
return -ENOEXEC;
|
||||
}
|
||||
|
||||
|
|
@ -222,7 +224,7 @@ static int apply_r_mips_lo16_rel(struct module *me, u32 *location, Elf_Addr v)
|
|||
return 0;
|
||||
|
||||
out_danger:
|
||||
printk(KERN_ERR "module %s: dangerous " "relocation\n", me->name);
|
||||
pr_err("module %s: dangerous R_MIPS_LO16 REL relocation\n", me->name);
|
||||
|
||||
return -ENOEXEC;
|
||||
}
|
||||
|
|
@ -301,7 +303,7 @@ int apply_relocate(Elf_Shdr *sechdrs, const char *strtab,
|
|||
/* This is the symbol it is referring to */
|
||||
sym = (Elf_Sym *)sechdrs[symindex].sh_addr
|
||||
+ ELF_MIPS_R_SYM(rel[i]);
|
||||
if (!sym->st_value) {
|
||||
if (IS_ERR_VALUE(sym->st_value)) {
|
||||
/* Ignore unresolved weak symbol */
|
||||
if (ELF_ST_BIND(sym->st_info) == STB_WEAK)
|
||||
continue;
|
||||
|
|
@ -341,7 +343,7 @@ int apply_relocate_add(Elf_Shdr *sechdrs, const char *strtab,
|
|||
/* This is the symbol it is referring to */
|
||||
sym = (Elf_Sym *)sechdrs[symindex].sh_addr
|
||||
+ ELF_MIPS_R_SYM(rel[i]);
|
||||
if (!sym->st_value) {
|
||||
if (IS_ERR_VALUE(sym->st_value)) {
|
||||
/* Ignore unresolved weak symbol */
|
||||
if (ELF_ST_BIND(sym->st_info) == STB_WEAK)
|
||||
continue;
|
||||
|
|
|
|||
|
|
@ -1,6 +1,4 @@
|
|||
/*
|
||||
* linux/arch/mips/kernel/proc.c
|
||||
*
|
||||
* Copyright (C) 1995, 1996, 2001 Ralf Baechle
|
||||
* Copyright (C) 2001, 2004 MIPS Technologies, Inc.
|
||||
* Copyright (C) 2004 Maciej W. Rozycki
|
||||
|
|
|
|||
|
|
@ -115,7 +115,7 @@ int copy_thread(unsigned long clone_flags, unsigned long usp,
|
|||
{
|
||||
struct thread_info *ti = task_thread_info(p);
|
||||
struct pt_regs *childregs;
|
||||
long childksp;
|
||||
unsigned long childksp;
|
||||
p->set_child_tid = p->clear_child_tid = NULL;
|
||||
|
||||
childksp = (unsigned long)task_stack_page(p) + THREAD_SIZE - 32;
|
||||
|
|
@ -132,6 +132,8 @@ int copy_thread(unsigned long clone_flags, unsigned long usp,
|
|||
|
||||
/* set up new TSS. */
|
||||
childregs = (struct pt_regs *) childksp - 1;
|
||||
/* Put the stack after the struct pt_regs. */
|
||||
childksp = (unsigned long) childregs;
|
||||
*childregs = *regs;
|
||||
childregs->regs[7] = 0; /* Clear error flag */
|
||||
|
||||
|
|
|
|||
|
|
@ -654,6 +654,7 @@ einval: li v0, -ENOSYS
|
|||
sys sys_pwritev 6
|
||||
sys sys_rt_tgsigqueueinfo 4
|
||||
sys sys_perf_counter_open 5
|
||||
sys sys_accept4 4
|
||||
.endm
|
||||
|
||||
/* We pre-compute the number of _instruction_ bytes needed to
|
||||
|
|
|
|||
|
|
@ -491,4 +491,5 @@ sys_call_table:
|
|||
PTR sys_pwritev /* 5390 */
|
||||
PTR sys_rt_tgsigqueueinfo
|
||||
PTR sys_perf_counter_open
|
||||
PTR sys_accept4
|
||||
.size sys_call_table,.-sys_call_table
|
||||
|
|
|
|||
|
|
@ -417,4 +417,5 @@ EXPORT(sysn32_call_table)
|
|||
PTR sys_pwritev
|
||||
PTR compat_sys_rt_tgsigqueueinfo /* 5295 */
|
||||
PTR sys_perf_counter_open
|
||||
PTR sys_accept4
|
||||
.size sysn32_call_table,.-sysn32_call_table
|
||||
|
|
|
|||
|
|
@ -537,4 +537,5 @@ sys_call_table:
|
|||
PTR compat_sys_pwritev
|
||||
PTR compat_sys_rt_tgsigqueueinfo
|
||||
PTR sys_perf_counter_open
|
||||
PTR sys_accept4
|
||||
.size sys_call_table,.-sys_call_table
|
||||
|
|
|
|||
|
|
@ -465,11 +465,8 @@ void smtc_prepare_cpus(int cpus)
|
|||
smtc_configure_tlb();
|
||||
|
||||
for (tc = 0, vpe = 0 ; (vpe < nvpe) && (tc < ntc) ; vpe++) {
|
||||
/*
|
||||
* Set the MVP bits.
|
||||
*/
|
||||
settc(tc);
|
||||
write_vpe_c0_vpeconf0(read_vpe_c0_vpeconf0() | VPECONF0_MVP);
|
||||
if (tcpervpe[vpe] == 0)
|
||||
continue;
|
||||
if (vpe != 0)
|
||||
printk(", ");
|
||||
printk("VPE %d: TC", vpe);
|
||||
|
|
@ -487,6 +484,12 @@ void smtc_prepare_cpus(int cpus)
|
|||
tc++;
|
||||
}
|
||||
if (vpe != 0) {
|
||||
/*
|
||||
* Allow this VPE to control others.
|
||||
*/
|
||||
write_vpe_c0_vpeconf0(read_vpe_c0_vpeconf0() |
|
||||
VPECONF0_MVP);
|
||||
|
||||
/*
|
||||
* Clear any stale software interrupts from VPE's Cause
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -1,6 +1,4 @@
|
|||
/*
|
||||
* arch/mips/kernel/stacktrace.c
|
||||
*
|
||||
* Stack trace management functions
|
||||
*
|
||||
* Copyright (C) 2006 Atsushi Nemoto <anemo@mba.ocn.ne.jp>
|
||||
|
|
|
|||
|
|
@ -73,7 +73,7 @@ static int major;
|
|||
static const int minor = 1; /* fixed for now */
|
||||
|
||||
#ifdef CONFIG_MIPS_APSP_KSPD
|
||||
static struct kspd_notifications kspd_events;
|
||||
static struct kspd_notifications kspd_events;
|
||||
static int kspd_events_reqd = 0;
|
||||
#endif
|
||||
|
||||
|
|
@ -155,10 +155,9 @@ struct {
|
|||
};
|
||||
|
||||
static void release_progmem(void *ptr);
|
||||
extern void save_gp_address(unsigned int secbase, unsigned int rel);
|
||||
|
||||
/* get the vpe associated with this minor */
|
||||
struct vpe *get_vpe(int minor)
|
||||
static struct vpe *get_vpe(int minor)
|
||||
{
|
||||
struct vpe *v;
|
||||
|
||||
|
|
@ -174,7 +173,7 @@ struct vpe *get_vpe(int minor)
|
|||
}
|
||||
|
||||
/* get the vpe associated with this minor */
|
||||
struct tc *get_tc(int index)
|
||||
static struct tc *get_tc(int index)
|
||||
{
|
||||
struct tc *t;
|
||||
|
||||
|
|
@ -186,20 +185,8 @@ struct tc *get_tc(int index)
|
|||
return NULL;
|
||||
}
|
||||
|
||||
struct tc *get_tc_unused(void)
|
||||
{
|
||||
struct tc *t;
|
||||
|
||||
list_for_each_entry(t, &vpecontrol.tc_list, list) {
|
||||
if (t->state == TC_STATE_UNUSED)
|
||||
return t;
|
||||
}
|
||||
|
||||
return NULL;
|
||||
}
|
||||
|
||||
/* allocate a vpe and associate it with this minor (or index) */
|
||||
struct vpe *alloc_vpe(int minor)
|
||||
static struct vpe *alloc_vpe(int minor)
|
||||
{
|
||||
struct vpe *v;
|
||||
|
||||
|
|
@ -216,7 +203,7 @@ struct vpe *alloc_vpe(int minor)
|
|||
}
|
||||
|
||||
/* allocate a tc. At startup only tc0 is running, all other can be halted. */
|
||||
struct tc *alloc_tc(int index)
|
||||
static struct tc *alloc_tc(int index)
|
||||
{
|
||||
struct tc *tc;
|
||||
|
||||
|
|
@ -232,7 +219,7 @@ out:
|
|||
}
|
||||
|
||||
/* clean up and free everything */
|
||||
void release_vpe(struct vpe *v)
|
||||
static void release_vpe(struct vpe *v)
|
||||
{
|
||||
list_del(&v->list);
|
||||
if (v->load_addr)
|
||||
|
|
@ -240,7 +227,7 @@ void release_vpe(struct vpe *v)
|
|||
kfree(v);
|
||||
}
|
||||
|
||||
void dump_mtregs(void)
|
||||
static void dump_mtregs(void)
|
||||
{
|
||||
unsigned long val;
|
||||
|
||||
|
|
@ -327,7 +314,8 @@ static void layout_sections(struct module *mod, const Elf_Ehdr * hdr,
|
|||
|| (s->sh_flags & masks[m][1])
|
||||
|| s->sh_entsize != ~0UL)
|
||||
continue;
|
||||
s->sh_entsize = get_offset(&mod->core_size, s);
|
||||
s->sh_entsize =
|
||||
get_offset((unsigned long *)&mod->core_size, s);
|
||||
}
|
||||
|
||||
if (m == 0)
|
||||
|
|
@ -461,16 +449,15 @@ static int apply_r_mips_lo16(struct module *me, uint32_t *location,
|
|||
{
|
||||
unsigned long insnlo = *location;
|
||||
Elf32_Addr val, vallo;
|
||||
struct mips_hi16 *l, *next;
|
||||
|
||||
/* Sign extend the addend we extract from the lo insn. */
|
||||
vallo = ((insnlo & 0xffff) ^ 0x8000) - 0x8000;
|
||||
|
||||
if (mips_hi16_list != NULL) {
|
||||
struct mips_hi16 *l;
|
||||
|
||||
l = mips_hi16_list;
|
||||
while (l != NULL) {
|
||||
struct mips_hi16 *next;
|
||||
unsigned long insn;
|
||||
|
||||
/*
|
||||
|
|
@ -480,7 +467,7 @@ static int apply_r_mips_lo16(struct module *me, uint32_t *location,
|
|||
printk(KERN_DEBUG "VPE loader: "
|
||||
"apply_r_mips_lo16/hi16: \t"
|
||||
"inconsistent value information\n");
|
||||
return -ENOEXEC;
|
||||
goto out_free;
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
@ -518,6 +505,16 @@ static int apply_r_mips_lo16(struct module *me, uint32_t *location,
|
|||
*location = insnlo;
|
||||
|
||||
return 0;
|
||||
|
||||
out_free:
|
||||
while (l != NULL) {
|
||||
next = l->next;
|
||||
kfree(l);
|
||||
l = next;
|
||||
}
|
||||
mips_hi16_list = NULL;
|
||||
|
||||
return -ENOEXEC;
|
||||
}
|
||||
|
||||
static int (*reloc_handlers[]) (struct module *me, uint32_t *location,
|
||||
|
|
@ -541,7 +538,7 @@ static char *rstrs[] = {
|
|||
[R_MIPS_PC16] = "MIPS_PC16"
|
||||
};
|
||||
|
||||
int apply_relocations(Elf32_Shdr *sechdrs,
|
||||
static int apply_relocations(Elf32_Shdr *sechdrs,
|
||||
const char *strtab,
|
||||
unsigned int symindex,
|
||||
unsigned int relsec,
|
||||
|
|
@ -586,7 +583,7 @@ int apply_relocations(Elf32_Shdr *sechdrs,
|
|||
return 0;
|
||||
}
|
||||
|
||||
void save_gp_address(unsigned int secbase, unsigned int rel)
|
||||
static inline void save_gp_address(unsigned int secbase, unsigned int rel)
|
||||
{
|
||||
gp_addr = secbase + rel;
|
||||
gp_offs = gp_addr - (secbase & 0xffff0000);
|
||||
|
|
|
|||
|
|
@ -89,13 +89,13 @@ unsigned __cpuinit get_c0_compare_int(void)
|
|||
if (cpu_has_veic) {
|
||||
set_vi_handler(MSC01E_INT_CPUCTR, mips_timer_dispatch);
|
||||
mips_cpu_timer_irq = MSC01E_INT_BASE + MSC01E_INT_CPUCTR;
|
||||
} else {
|
||||
#endif
|
||||
{
|
||||
if (cpu_has_vint)
|
||||
set_vi_handler(cp0_compare_irq, mips_timer_dispatch);
|
||||
mips_cpu_timer_irq = MIPS_CPU_IRQ_BASE + cp0_compare_irq;
|
||||
|
||||
return mips_cpu_timer_irq;
|
||||
}
|
||||
#endif
|
||||
if (cpu_has_vint)
|
||||
set_vi_handler(cp0_compare_irq, mips_timer_dispatch);
|
||||
mips_cpu_timer_irq = MIPS_CPU_IRQ_BASE + cp0_compare_irq;
|
||||
|
||||
return mips_cpu_timer_irq;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -289,7 +289,7 @@ static void cache_parity_error_octeon(int non_recoverable)
|
|||
}
|
||||
|
||||
/**
|
||||
* Called when the the exception is not recoverable
|
||||
* Called when the the exception is recoverable
|
||||
*/
|
||||
|
||||
asmlinkage void cache_parity_error_octeon_recoverable(void)
|
||||
|
|
@ -298,7 +298,7 @@ asmlinkage void cache_parity_error_octeon_recoverable(void)
|
|||
}
|
||||
|
||||
/**
|
||||
* Called when the the exception is recoverable
|
||||
* Called when the the exception is not recoverable
|
||||
*/
|
||||
|
||||
asmlinkage void cache_parity_error_octeon_non_recoverable(void)
|
||||
|
|
|
|||
|
|
@ -1,5 +1,9 @@
|
|||
/*
|
||||
* linux/arch/mips/mm/extable.c
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*
|
||||
* Copyright (C) 1997, 99, 2001 - 2004 Ralf Baechle <ralf@linux-mips.org>
|
||||
*/
|
||||
#include <linux/module.h>
|
||||
#include <linux/spinlock.h>
|
||||
|
|
|
|||
|
|
@ -171,6 +171,7 @@ out_of_memory:
|
|||
* We ran out of memory, call the OOM killer, and return the userspace
|
||||
* (which will retry the fault, or kill us if we got oom-killed).
|
||||
*/
|
||||
up_read(&mm->mmap_sem);
|
||||
pagefault_out_of_memory();
|
||||
return;
|
||||
|
||||
|
|
|
|||
|
|
@ -331,6 +331,7 @@ static struct irqaction irq_call = {
|
|||
.flags = IRQF_DISABLED|IRQF_PERCPU,
|
||||
.name = "IPI_call"
|
||||
};
|
||||
#endif /* CONFIG_MIPS_MT_SMP */
|
||||
|
||||
static int gic_resched_int_base;
|
||||
static int gic_call_int_base;
|
||||
|
|
@ -346,7 +347,6 @@ unsigned int plat_ipi_resched_int_xlate(unsigned int cpu)
|
|||
{
|
||||
return GIC_RESCHED_INT(cpu);
|
||||
}
|
||||
#endif /* CONFIG_MIPS_MT_SMP */
|
||||
|
||||
static struct irqaction i8259irq = {
|
||||
.handler = no_action,
|
||||
|
|
|
|||
|
|
@ -138,7 +138,7 @@ __init void plat_time_init(void)
|
|||
* HZ timer interrupts per second.
|
||||
*/
|
||||
mips_hpt_frequency = 27UL * ((1000000UL * n)/(m * pow2p));
|
||||
cpj = (mips_hpt_frequency + HZ / 2) / HZ;
|
||||
cpj = DIV_ROUND_CLOSEST(mips_hpt_frequency, HZ);
|
||||
write_c0_count(0);
|
||||
timer_ack();
|
||||
|
||||
|
|
|
|||
|
|
@ -1,7 +1,4 @@
|
|||
/*
|
||||
* arch/mips/pci/fixup-emma2rh.c
|
||||
* This file defines the PCI configration.
|
||||
*
|
||||
* Copyright (C) NEC Electronics Corporation 2004-2006
|
||||
*
|
||||
* This file is based on the arch/mips/ddb5xxx/ddb5477/pci.c
|
||||
|
|
|
|||
|
|
@ -1,6 +1,4 @@
|
|||
/*
|
||||
* arch/mips/pci/fixup-sb1250.c
|
||||
*
|
||||
* Copyright (C) 2004, 2006 MIPS Technologies, Inc. All rights reserved.
|
||||
* Author: Maciej W. Rozycki <macro@mips.com>
|
||||
*
|
||||
|
|
|
|||
|
|
@ -1,7 +1,4 @@
|
|||
/*
|
||||
* arch/mips/pci/ops-emma2rh.c
|
||||
* This file defines the PCI operation for EMMA2RH.
|
||||
*
|
||||
* Copyright (C) NEC Electronics Corporation 2004-2006
|
||||
*
|
||||
* This file is based on the arch/mips/pci/ops-vr41xx.c
|
||||
|
|
|
|||
|
|
@ -1,7 +1,4 @@
|
|||
/*
|
||||
* arch/mips/pci/pci-emma2rh.c
|
||||
* This file defines the PCI configration.
|
||||
*
|
||||
* Copyright (C) NEC Electronics Corporation 2004-2006
|
||||
*
|
||||
* This file is based on the arch/mips/ddb5xxx/ddb5477/pci.c
|
||||
|
|
|
|||
|
|
@ -1,6 +1,4 @@
|
|||
/*
|
||||
* linux/arch/mips/pci/pci-tx4927.c
|
||||
*
|
||||
* Based on linux/arch/mips/txx9/rbtx4938/setup.c,
|
||||
* and RBTX49xx patch from CELF patch archive.
|
||||
*
|
||||
|
|
|
|||
|
|
@ -1,6 +1,4 @@
|
|||
/*
|
||||
* linux/arch/mips/pci/pci-tx4938.c
|
||||
*
|
||||
* Based on linux/arch/mips/txx9/rbtx4938/setup.c,
|
||||
* and RBTX49xx patch from CELF patch archive.
|
||||
*
|
||||
|
|
|
|||
|
|
@ -1,6 +1,4 @@
|
|||
/*
|
||||
* linux/arch/mips/pci/pci-tx4939.c
|
||||
*
|
||||
* Based on linux/arch/mips/txx9/rbtx4939/setup.c,
|
||||
* and RBTX49xx patch from CELF patch archive.
|
||||
*
|
||||
|
|
|
|||
|
|
@ -1040,19 +1040,29 @@ static inline int octeon_pcie_read_config(int pcie_port, struct pci_bus *bus,
|
|||
int bus_number = bus->number;
|
||||
|
||||
/*
|
||||
* We need to force the bus number to be zero on the root
|
||||
* bus. Linux numbers the 2nd root bus to start after all
|
||||
* buses on root 0.
|
||||
* For the top level bus make sure our hardware bus number
|
||||
* matches the software one.
|
||||
*/
|
||||
if (bus->parent == NULL)
|
||||
bus_number = 0;
|
||||
if (bus->parent == NULL) {
|
||||
union cvmx_pciercx_cfg006 pciercx_cfg006;
|
||||
pciercx_cfg006.u32 = cvmx_pcie_cfgx_read(pcie_port,
|
||||
CVMX_PCIERCX_CFG006(pcie_port));
|
||||
if (pciercx_cfg006.s.pbnum != bus_number) {
|
||||
pciercx_cfg006.s.pbnum = bus_number;
|
||||
pciercx_cfg006.s.sbnum = bus_number;
|
||||
pciercx_cfg006.s.subbnum = bus_number;
|
||||
cvmx_pcie_cfgx_write(pcie_port,
|
||||
CVMX_PCIERCX_CFG006(pcie_port),
|
||||
pciercx_cfg006.u32);
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* PCIe only has a single device connected to Octeon. It is
|
||||
* always device ID 0. Don't bother doing reads for other
|
||||
* device IDs on the first segment.
|
||||
*/
|
||||
if ((bus_number == 0) && (devfn >> 3 != 0))
|
||||
if ((bus->parent == NULL) && (devfn >> 3 != 0))
|
||||
return PCIBIOS_FUNC_NOT_SUPPORTED;
|
||||
|
||||
/*
|
||||
|
|
@ -1070,7 +1080,7 @@ static inline int octeon_pcie_read_config(int pcie_port, struct pci_bus *bus,
|
|||
* bridge only respondes to device ID 0, function
|
||||
* 0-1
|
||||
*/
|
||||
if ((bus_number == 0) && (devfn >= 2))
|
||||
if ((bus->parent == NULL) && (devfn >= 2))
|
||||
return PCIBIOS_FUNC_NOT_SUPPORTED;
|
||||
/*
|
||||
* The PCI-X slots are device ID 2,3. Choose one of
|
||||
|
|
@ -1167,13 +1177,6 @@ static inline int octeon_pcie_write_config(int pcie_port, struct pci_bus *bus,
|
|||
int size, u32 val)
|
||||
{
|
||||
int bus_number = bus->number;
|
||||
/*
|
||||
* We need to force the bus number to be zero on the root
|
||||
* bus. Linux numbers the 2nd root bus to start after all
|
||||
* busses on root 0.
|
||||
*/
|
||||
if (bus->parent == NULL)
|
||||
bus_number = 0;
|
||||
|
||||
switch (size) {
|
||||
case 4:
|
||||
|
|
|
|||
|
|
@ -1,6 +1,4 @@
|
|||
/*
|
||||
* @file /arch/mips/pmc-sierra/msp71xx/gpio.c
|
||||
*
|
||||
* Generic PMC MSP71xx GPIO handling. These base gpio are controlled by two
|
||||
* types of registers. The data register sets the output level when in output
|
||||
* mode and when in input mode will contain the value at the input. The config
|
||||
|
|
|
|||
|
|
@ -1,6 +1,4 @@
|
|||
/*
|
||||
* @file /arch/mips/pmc-sierra/msp71xx/gpio_extended.c
|
||||
*
|
||||
* Generic PMC MSP71xx EXTENDED (EXD) GPIO handling. The extended gpio is
|
||||
* a set of hardware registers that have no need for explicit locking as
|
||||
* it is handled by unique method of writing individual set/clr bits.
|
||||
|
|
|
|||
|
|
@ -45,13 +45,6 @@ static inline void mask_msp_slp_irq(unsigned int irq)
|
|||
*/
|
||||
static inline void ack_msp_slp_irq(unsigned int irq)
|
||||
{
|
||||
mask_slp_irq(irq);
|
||||
|
||||
/*
|
||||
* only really necessary for 18, 16-14 and sometimes 3:0 (since
|
||||
* these can be edge sensitive) but it doesn't hurt for the others.
|
||||
*/
|
||||
|
||||
/* check for PER interrupt range */
|
||||
if (irq < MSP_PER_INTBASE)
|
||||
*SLP_INT_STS_REG = (1 << (irq - MSP_SLP_INTBASE));
|
||||
|
|
@ -62,8 +55,7 @@ static inline void ack_msp_slp_irq(unsigned int irq)
|
|||
static struct irq_chip msp_slp_irq_controller = {
|
||||
.name = "MSP_SLP",
|
||||
.ack = ack_msp_slp_irq,
|
||||
.mask = ack_msp_slp_irq,
|
||||
.mask_ack = ack_msp_slp_irq,
|
||||
.mask = mask_msp_slp_irq,
|
||||
.unmask = unmask_msp_slp_irq,
|
||||
};
|
||||
|
||||
|
|
@ -79,7 +71,7 @@ void __init msp_slp_irq_init(void)
|
|||
|
||||
/* initialize all the IRQ descriptors */
|
||||
for (i = MSP_SLP_INTBASE; i < MSP_PER_INTBASE + 32; i++)
|
||||
set_irq_chip_and_handler(i, &msp_slp_irq_controller
|
||||
set_irq_chip_and_handler(i, &msp_slp_irq_controller,
|
||||
handle_level_irq);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -1,6 +1,4 @@
|
|||
/*
|
||||
* arch/mips/pmc-sierra/yosemite/atmel_read_eeprom.c
|
||||
*
|
||||
* Copyright (C) 2003 PMC-Sierra Inc.
|
||||
* Author: Manish Lachwani (lachwani@pmc-sierra.com)
|
||||
*
|
||||
|
|
|
|||
|
|
@ -1,6 +1,4 @@
|
|||
/*
|
||||
* arch/mips/sibyte/swarm/swarm-i2c.c
|
||||
*
|
||||
* Broadcom BCM91250A (SWARM), etc. I2C platform setup.
|
||||
*
|
||||
* Copyright (c) 2008 Maciej W. Rozycki
|
||||
|
|
|
|||
|
|
@ -1,6 +1,4 @@
|
|||
/*
|
||||
* linux/arch/mips/txx9/generic/mem_tx4927.c
|
||||
*
|
||||
* common tx4927 memory interface
|
||||
*
|
||||
* Author: MontaVista Software, Inc.
|
||||
|
|
|
|||
|
|
@ -1,6 +1,4 @@
|
|||
/*
|
||||
* linux/arch/mips/txx9/generic/setup.c
|
||||
*
|
||||
* Based on linux/arch/mips/txx9/rbtx4938/setup.c,
|
||||
* and RBTX49xx patch from CELF patch archive.
|
||||
*
|
||||
|
|
|
|||
|
|
@ -512,10 +512,10 @@ static void __init rbtx4939_setup(void)
|
|||
rbtx4939_ebusc_setup();
|
||||
/* always enable ATA0 */
|
||||
txx9_set64(&tx4939_ccfgptr->pcfg, TX4939_PCFG_ATA0MODE);
|
||||
rbtx4939_update_ioc_pen();
|
||||
if (txx9_master_clock == 0)
|
||||
txx9_master_clock = 20000000;
|
||||
tx4939_setup();
|
||||
rbtx4939_update_ioc_pen();
|
||||
#ifdef HAVE_RBTX4939_IOSWAB
|
||||
ioswabw = rbtx4939_ioswabw;
|
||||
__mem_ioswabw = rbtx4939_mem_ioswabw;
|
||||
|
|
|
|||
Loading…
Reference in New Issue