diff --git a/Documentation/devicetree/bindings/mfd/nxp,pca9450.txt b/Documentation/devicetree/bindings/mfd/nxp,pca9450.txt new file mode 100644 index 000000000000..f296c7d2e6ad --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/nxp,pca9450.txt @@ -0,0 +1,51 @@ +* NXP PCA9450 Power Management Integrated Circuit (PMIC) bindings + +Required properties: + - compatible : Should be "nxp,pca9450". + - reg : I2C slave address. + - pinctrl-0 : Pinctrl setting for pmic such as interrupt pin. + - gpio_intr : gpio pin used for interrupt pin. + - regulators: : List of child nodes that specify the regulator + initialization data. Including 6 buck regulators + and 5 ldo regulators. + +Example: + pmic: pca9450@25 { + reg = <0x25>; + compatible = "nxp,pca9450"; + /* PMIC PCA9450 PMIC_nINT GPIO1_IO3 */ + pinctrl-0 = <&pinctrl_pmic>; + gpio_intr = <&gpio1 3 GPIO_ACTIVE_LOW>; + + regulators { + #address-cells = <1>; + #size-cells = <0>; + + pca9450,pmic-buck2-uses-i2c-dvs; + /* Run/Standby voltage */ + pca9450,pmic-buck2-dvs-voltage = <950000>, <850000>; + + buck1_reg: regulator@0 { + reg = <0>; + regulator-compatible = "buck1"; + regulator-min-microvolt = <600000>; + regulator-max-microvolt = <2187500>; + regulator-boot-on; + regulator-always-on; + regulator-ramp-delay = <3125>; + }; + + buck2_reg: regulator@1 { + reg = <1>; + regulator-compatible = "buck2"; + regulator-min-microvolt = <600000>; + regulator-max-microvolt = <2187500>; + regulator-boot-on; + regulator-always-on; + regulator-ramp-delay = <3125>; + }; + + ..... + + }; + }; diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 01547046417b..261c563417ce 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -1975,6 +1975,14 @@ config MFD_STMFX additional drivers must be enabled in order to use the functionality of the device. +config MFD_PCA9450 + bool "PCA9450 Power Management chip" + depends on I2C=y + select MFD_CORE + help + if you say yes here you get support for the PCA9450 + Power Management chips. + menu "Multimedia Capabilities Port drivers" depends on ARCH_SA1100 diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index 96f5c5c262a9..2c2f5d476215 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -256,4 +256,5 @@ obj-$(CONFIG_RAVE_SP_CORE) += rave-sp.o obj-$(CONFIG_MFD_ROHM_BD70528) += rohm-bd70528.o obj-$(CONFIG_MFD_ROHM_BD718XX) += rohm-bd718x7.o obj-$(CONFIG_MFD_STMFX) += stmfx.o +obj-$(CONFIG_MFD_PCA9450) += pca9450.o diff --git a/drivers/mfd/pca9450.c b/drivers/mfd/pca9450.c new file mode 100644 index 000000000000..85ce6e3eef68 --- /dev/null +++ b/drivers/mfd/pca9450.c @@ -0,0 +1,304 @@ +/* + * @file pca9450.c -- NXP PCA9450 mfd driver + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * Copyright 2019 NXP. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* @brief pca9450 irq resource */ +static struct resource pmic_resources[] = { + { + .start = PCA9450_IRQ, + .end = PCA9450_IRQ, + .flags = IORESOURCE_IRQ, + }, +}; + +/* @brief pca9450 multi function cells */ +static struct mfd_cell pca9450_mfd_cells[] = { + { + .name = "pca9450-pmic", + .num_resources = ARRAY_SIZE(pmic_resources), + .resources = &pmic_resources[0], + }, +}; + +/* @brief pca9450 irqs */ +static const struct regmap_irq pca9450_irqs[] = { + [PCA9450_IRQ] = { + .mask = PCA9450_INT_MASK, + .reg_offset = 0, + }, +}; + +/* @brief pca9450 irq chip definition */ +static struct regmap_irq_chip pca9450_irq_chip = { + .name = "pca9450", + .irqs = pca9450_irqs, + .num_irqs = ARRAY_SIZE(pca9450_irqs), + .num_regs = 1, + .irq_reg_stride = 1, + .status_base = PCA9450_INT1, + .mask_base = PCA9450_INT1_MSK, + .mask_invert = true, +}; + +/* + * @brief pca9450 irq initialize + * @param pca9450 pca9450 device to init + * @param bdinfo platform init data + * @retval 0 probe success + * @retval negative error number + */ +static int pca9450_irq_init(struct pca9450 *pca9450, + struct pca9450_board *bdinfo) +{ + int irq; + int ret = 0; + + if (!bdinfo) { + dev_warn(pca9450->dev, "No interrupt support, no pdata\n"); + return -EINVAL; + } + + dev_info(pca9450->dev, "gpio_intr = %d\n", bdinfo->gpio_intr); + irq = gpio_to_irq(bdinfo->gpio_intr); + + pca9450->chip_irq = irq; + dev_info(pca9450->dev, "chip_irq=%d\n", pca9450->chip_irq); + ret = regmap_add_irq_chip(pca9450->regmap, pca9450->chip_irq, + IRQF_ONESHOT | IRQF_TRIGGER_FALLING, bdinfo->irq_base, + &pca9450_irq_chip, &pca9450->irq_data); + if (ret < 0) + dev_warn(pca9450->dev, "Failed to add irq_chip %d\n", ret); + + return ret; +} + +/* + * @brief pca9450 irq initialize + * @param pca9450 pca9450 device to init + * @retval 0 probe success + * @retval negative error number + */ +static int pca9450_irq_exit(struct pca9450 *pca9450) +{ + if (pca9450->chip_irq > 0) + regmap_del_irq_chip(pca9450->chip_irq, pca9450->irq_data); + return 0; +} + +/* + * @brief check whether volatile register + * @param dev kernel device pointer + * @param reg register index + */ +static bool is_volatile_reg(struct device *dev, unsigned int reg) +{ + /* + * Caching all regulator registers. + */ + return true; +} + +/* @brief regmap configures */ +static const struct regmap_config pca9450_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .volatile_reg = is_volatile_reg, + .max_register = PCA9450_MAX_REGISTER - 1, + .cache_type = REGCACHE_RBTREE, +}; + +#ifdef CONFIG_OF +static const struct of_device_id pca9450_of_match[] = { + { .compatible = "nxp,pca9450", .data = (void *)0}, + { }, +}; +MODULE_DEVICE_TABLE(of, pca9450_of_match); + +/* + * @brief parse device tree data of pca9450 + * @param client client object provided by system + * @param chip_id return chip id back to caller + * @return board initialize data + */ +static struct pca9450_board *pca9450_parse_dt(struct i2c_client *client, + int *chip_id) +{ + struct device_node *np = client->dev.of_node; + struct pca9450_board *board_info; + unsigned int prop; + const struct of_device_id *match; + int r = 0; + + match = of_match_device(pca9450_of_match, &client->dev); + if (!match) { + dev_err(&client->dev, "Failed to find matching dt id\n"); + return NULL; + } + + chip_id = (int *)match->data; + + board_info = devm_kzalloc(&client->dev, sizeof(*board_info), + GFP_KERNEL); + if (!board_info) + return NULL; + + board_info->gpio_intr = of_get_named_gpio(np, "gpio_intr", 0); + if (!gpio_is_valid(board_info->gpio_intr)) { + dev_err(&client->dev, "no pmic intr pin available\n"); + goto err_intr; + } + + r = of_property_read_u32(np, "irq_base", &prop); + if (!r) + board_info->irq_base = prop; + else + board_info->irq_base = -1; + + return board_info; + +err_intr: + devm_kfree(&client->dev, board_info); + return NULL; +} +#endif + +/* + * @brief probe pca9450 device + * @param i2c client object provided by system + * @param id chip id + * @retval 0 probe success + * @retval negative error number + */ +static int pca9450_i2c_probe(struct i2c_client *i2c, + const struct i2c_device_id *id) +{ + struct pca9450 *pca9450; + struct pca9450_board *pmic_plat_data; + struct pca9450_board *of_pmic_plat_data = NULL; + int chip_id = id->driver_data; + int ret = 0; + + pmic_plat_data = dev_get_platdata(&i2c->dev); + + if (!pmic_plat_data && i2c->dev.of_node) { + pmic_plat_data = pca9450_parse_dt(i2c, &chip_id); + of_pmic_plat_data = pmic_plat_data; + } + + if (!pmic_plat_data) + return -EINVAL; + + pca9450 = kzalloc(sizeof(struct pca9450), GFP_KERNEL); + if (pca9450 == NULL) + return -ENOMEM; + + pca9450->of_plat_data = of_pmic_plat_data; + i2c_set_clientdata(i2c, pca9450); + pca9450->dev = &i2c->dev; + pca9450->i2c_client = i2c; + pca9450->id = chip_id; + mutex_init(&pca9450->io_mutex); + + pca9450->regmap = devm_regmap_init_i2c(i2c, &pca9450_regmap_config); + if (IS_ERR(pca9450->regmap)) { + ret = PTR_ERR(pca9450->regmap); + dev_err(&i2c->dev, "regmap initialization failed: %d\n", ret); + return ret; + } + + ret = pca9450_reg_read(pca9450, PCA9450_REG_DEV_ID); + if (ret < 0) { + dev_err(pca9450->dev, "%s(): Read PCA9450_REG_DEVICE failed!\n", + __func__); + goto err; + } + dev_info(pca9450->dev, "Device ID=0x%X\n", ret); + + pca9450_irq_init(pca9450, of_pmic_plat_data); + + ret = mfd_add_devices(pca9450->dev, -1, + pca9450_mfd_cells, ARRAY_SIZE(pca9450_mfd_cells), + NULL, 0, + regmap_irq_get_domain(pca9450->irq_data)); + if (ret < 0) + goto err; + + return ret; + +err: + mfd_remove_devices(pca9450->dev); + kfree(pca9450); + return ret; +} + +/* + * @brief remove pca9450 device + * @param i2c client object provided by system + * @return 0 + */ +static int pca9450_i2c_remove(struct i2c_client *i2c) +{ + struct pca9450 *pca9450 = i2c_get_clientdata(i2c); + + pca9450_irq_exit(pca9450); + mfd_remove_devices(pca9450->dev); + kfree(pca9450); + + return 0; +} + +static const struct i2c_device_id pca9450_i2c_id[] = { + { "pca9450", 0 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, pca9450_i2c_id); + +static struct i2c_driver pca9450_i2c_driver = { + .driver = { + .name = "pca9450", + .owner = THIS_MODULE, + .of_match_table = of_match_ptr(pca9450_of_match), + }, + .probe = pca9450_i2c_probe, + .remove = pca9450_i2c_remove, + .id_table = pca9450_i2c_id, +}; + +static int __init pca9450_i2c_init(void) +{ + return i2c_add_driver(&pca9450_i2c_driver); +} +/* init early so consumer devices can complete system boot */ +subsys_initcall(pca9450_i2c_init); + +static void __exit pca9450_i2c_exit(void) +{ + i2c_del_driver(&pca9450_i2c_driver); +} +module_exit(pca9450_i2c_exit); + +MODULE_AUTHOR("John Lee "); +MODULE_DESCRIPTION("PCA9450 chip multi-function driver"); +MODULE_LICENSE("GPL"); diff --git a/include/linux/mfd/pca9450.h b/include/linux/mfd/pca9450.h new file mode 100644 index 000000000000..b689c2dd3b94 --- /dev/null +++ b/include/linux/mfd/pca9450.h @@ -0,0 +1,355 @@ +/** + * @file pca9450.h NXP PCA9450 header file + * + * Copyright 2019 NXP + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + */ + +#ifndef __LINUX_MFD_PCA9450_H +#define __LINUX_MFD_PCA9450_H + +#include + +enum { + PCA9450_BUCK1 = 0, + PCA9450_BUCK2, + PCA9450_BUCK3, + PCA9450_BUCK4, + PCA9450_BUCK5, + PCA9450_BUCK6, + PCA9450_LDO1, + PCA9450_LDO2, + PCA9450_LDO3, + PCA9450_LDO4, + PCA9450_LDO5, + PCA9450_REGULATOR_CNT, +}; + +#define PCA9450_SUPPLY_STATE_ENABLED 0x1 + +#define PCA9450_BUCK1_VOLTAGE_NUM 0x80 +#define PCA9450_BUCK2_VOLTAGE_NUM 0x80 +#define PCA9450_BUCK3_VOLTAGE_NUM 0x80 +#define PCA9450_BUCK4_VOLTAGE_NUM 0x80 + +#define PCA9450_BUCK5_VOLTAGE_NUM 0x80 +#define PCA9450_BUCK6_VOLTAGE_NUM 0x80 + +#define PCA9450_LDO1_VOLTAGE_NUM 0x08 +#define PCA9450_LDO2_VOLTAGE_NUM 0x08 +#define PCA9450_LDO3_VOLTAGE_NUM 0x20 +#define PCA9450_LDO4_VOLTAGE_NUM 0x20 +#define PCA9450_LDO5_VOLTAGE_NUM 0x10 + +enum { + PCA9450_REG_DEV_ID = 0x00, + PCA9450_INT1 = 0x01, + PCA9450_INT1_MSK = 0x02, + PCA9450_STATUS1 = 0x03, + PCA9450_STATUS2 = 0x04, + PCA9450_PWRON_STAT = 0x05, + PCA9450_SW_RST = 0x06, + PCA9450_PWR_CTRL = 0x07, + PCA9450_RESET_CTRL = 0x08, + PCA9450_CONFIG1 = 0x09, + PCA9450_CONFIG2 = 0x0A, + PCA9450_BUCK123_DVS = 0x0C, + PCA9450_BUCK1OUT_LIMIT = 0x0D, + PCA9450_BUCK2OUT_LIMIT = 0x0E, + PCA9450_BUCK3OUT_LIMIT = 0x0F, + PCA9450_BUCK1CTRL = 0x10, + PCA9450_BUCK1OUT_DVS0 = 0x11, + PCA9450_BUCK1OUT_DVS1 = 0x12, + PCA9450_BUCK2CTRL = 0x13, + PCA9450_BUCK2OUT_DVS0 = 0x14, + PCA9450_BUCK2OUT_DVS1 = 0x15, + PCA9450_BUCK3CTRL = 0x16, + PCA9450_BUCK3OUT_DVS0 = 0x17, + PCA9450_BUCK3OUT_DVS1 = 0x18, + PCA9450_BUCK4CTRL = 0x19, + PCA9450_BUCK4OUT = 0x1A, + PCA9450_BUCK5CTRL = 0x1B, + PCA9450_BUCK5OUT = 0x1C, + PCA9450_BUCK6CTRL = 0x1D, + PCA9450_BUCK6OUT = 0x1E, + PCA9450_LDO_AD_CTRL = 0x20, + PCA9450_LDO1CTRL = 0x21, + PCA9450_LDO2CTRL = 0x22, + PCA9450_LDO3CTRL = 0x23, + PCA9450_LDO4CTRL = 0x24, + PCA9450_LDO5CTRL_L = 0x25, + PCA9450_LDO5CTRL_H = 0x26, + PCA9450_LOADSW_CTRL = 0x2A, + PCA9450_VRFLT1_STS = 0x2B, + PCA9450_VRFLT2_STS = 0x2C, + PCA9450_VRFLT1_MASK = 0x2D, + PCA9450_VRFLT2_MASK = 0x2E, + PCA9450_MAX_REGISTER = 0x2F, +}; + +/* PCA9450 BUCK ENMODE bits */ +#define BUCK_ENMODE_OFF 0x00 +#define BUCK_ENMODE_ONREQ 0x01 +#define BUCK_ENMODE_ONREQ_STBYREQ 0x02 +#define BUCK_ENMODE_ON 0x03 + +/* PCA9450_REG_BUCK1_CTRL bits */ +#define BUCK1_RAMP_MASK 0xC0 +#define BUCK1_RAMP_25MV 0x0 +#define BUCK1_RAMP_12P5MV 0x1 +#define BUCK1_RAMP_6P25MV 0x2 +#define BUCK1_RAMP_3P125MV 0x3 +#define BUCK1_DVS_CTRL 0x10 +#define BUCK1_AD 0x08 +#define BUCK1_FPWM 0x04 +#define BUCK1_ENMODE_MASK 0x03 + +/* PCA9450_REG_BUCK2_CTRL bits */ +#define BUCK2_RAMP_MASK 0xC0 +#define BUCK2_RAMP_25MV 0x0 +#define BUCK2_RAMP_12P5MV 0x1 +#define BUCK2_RAMP_6P25MV 0x2 +#define BUCK2_RAMP_3P125MV 0x3 +#define BUCK2_DVS_CTRL 0x10 +#define BUCK2_AD 0x08 +#define BUCK2_FPWM 0x04 +#define BUCK2_ENMODE_MASK 0x03 + +/* PCA9450_REG_BUCK3_CTRL bits */ +#define BUCK3_RAMP_MASK 0xC0 +#define BUCK3_RAMP_25MV 0x0 +#define BUCK3_RAMP_12P5MV 0x1 +#define BUCK3_RAMP_6P25MV 0x2 +#define BUCK3_RAMP_3P125MV 0x3 +#define BUCK3_DVS_CTRL 0x10 +#define BUCK3_AD 0x08 +#define BUCK3_FPWM 0x04 +#define BUCK3_ENMODE_MASK 0x03 + +/* PCA9450_REG_BUCK4_CTRL bits */ +#define BUCK4_AD 0x08 +#define BUCK4_FPWM 0x04 +#define BUCK4_ENMODE_MASK 0x03 + +/* PCA9450_REG_BUCK5_CTRL bits */ +#define BUCK5_AD 0x08 +#define BUCK5_FPWM 0x04 +#define BUCK5_ENMODE_MASK 0x03 + +/* PCA9450_REG_BUCK6_CTRL bits */ +#define BUCK6_AD 0x08 +#define BUCK6_FPWM 0x04 +#define BUCK6_ENMODE_MASK 0x03 + +/* PCA9450_BUCK1OUT_DVS0 bits */ +#define BUCK1OUT_DVS0_MASK 0x7F +#define BUCK1OUT_DVS0_DEFAULT 0x14 + +/* PCA9450_BUCK1OUT_DVS1 bits */ +#define BUCK1OUT_DVS1_MASK 0x7F +#define BUCK1OUT_DVS1_DEFAULT 0x14 + +/* PCA9450_BUCK2OUT_DVS0 bits */ +#define BUCK2OUT_DVS0_MASK 0x7F +#define BUCK2OUT_DVS0_DEFAULT 0x14 + +/* PCA9450_BUCK2OUT_DVS1 bits */ +#define BUCK2OUT_DVS1_MASK 0x7F +#define BUCK2OUT_DVS1_DEFAULT 0x14 + +/* PCA9450_BUCK3OUT_DVS0 bits */ +#define BUCK3OUT_DVS0_MASK 0x7F +#define BUCK3OUT_DVS0_DEFAULT 0x14 + +/* PCA9450_BUCK3OUT_DVS1 bits */ +#define BUCK3OUT_DVS1_MASK 0x7F +#define BUCK3OUT_DVS1_DEFAULT 0x14 + +/* PCA9450_REG_BUCK4OUT bits */ +#define BUCK4OUT_MASK 0x7F +#define BUCK4OUT_DEFAULT 0x6C + +/* PCA9450_REG_BUCK5OUT bits */ +#define BUCK5OUT_MASK 0x7F +#define BUCK5OUT_DEFAULT 0x30 + +/* PCA9450_REG_BUCK6OUT bits */ +#define BUCK6OUT_MASK 0x7F +#define BUCK6OUT_DEFAULT 0x14 + +/* PCA9450_REG_IRQ bits */ +#define IRQ_PWRON 0x80 +#define IRQ_WDOGB 0x40 +#define IRQ_VR_FLT1 0x10 +#define IRQ_VR_FLT2 0x08 +#define IRQ_LOWVSYS 0x04 +#define IRQ_THERM_105 0x02 +#define IRQ_THERM_125 0x01 + +/* PCA9450 interrupt masks */ +enum { + PCA9450_INT_MASK = 0xDF, +}; +/* PCA9450 interrupt irqs */ +enum { + PCA9450_IRQ = 0x0, +}; + +/* PCA9450_REG_LDO1_VOLT bits */ +#define LDO1_EN_MASK 0xC0 +#define LDO1OUT_MASK 0x07 + +/* PCA9450_REG_LDO2_VOLT bits */ +#define LDO2_EN_MASK 0xC0 +#define LDO2OUT_MASK 0x07 + +/* PCA9450_REG_LDO3_VOLT bits */ +#define LDO3_EN_MASK 0xC0 +#define LDO3OUT_MASK 0x0F + +/* PCA9450_REG_LDO4_VOLT bits */ +#define LDO4_EN_MASK 0xC0 +#define LDO4OUT_MASK 0x0F + +/* PCA9450_REG_LDO5_VOLT bits */ +#define LDO5L_EN_MASK 0xC0 +#define LDO5LOUT_MASK 0x0F + +#define LDO5H_EN_MASK 0xC0 +#define LDO5HOUT_MASK 0x0F + +/* + * @brief Board platform data may be used to initialize regulators. + */ + +struct pca9450_board { + struct regulator_init_data *init_data[PCA9450_REGULATOR_CNT]; + int gpio_intr; + int irq_base; +}; + +/* + * @brief pca9450 sub-driver chip access routines + */ + +struct pca9450 { + struct device *dev; + struct i2c_client *i2c_client; + struct regmap *regmap; + struct mutex io_mutex; + unsigned int id; + + /* IRQ Handling */ + int chip_irq; + struct regmap_irq_chip_data *irq_data; + + /* Client devices */ + struct pca9450_pmic *pmic; + struct pca9450_power *power; + + struct pca9450_board *of_plat_data; +}; + +static inline int pca9450_chip_id(struct pca9450 *pca9450) +{ + return pca9450->id; +} + +/* + * @brief pca9450_reg_read + * read single register's value of pca9450 + * @param pca9450 device to read + * @param reg register address + * @return register value if success + * error number if fail + */ +static inline int pca9450_reg_read(struct pca9450 *pca9450, u8 reg) +{ + int r, val; + + r = regmap_read(pca9450->regmap, reg, &val); + if (r < 0) + return r; + + return val; +} + +/* + * @brief pca9450_reg_write + * write single register of pca9450 + * @param pca9450 device to write + * @param reg register address + * @param val value to write + * @retval 0 if success + * @retval negative error number if fail + */ + +static inline int pca9450_reg_write(struct pca9450 *pca9450, u8 reg, + unsigned int val) +{ + return regmap_write(pca9450->regmap, reg, val); +} + +/* + * @brief pca9450_set_bits + * set bits in one register of pca9450 + * @param pca9450 device to read + * @param reg register address + * @param mask mask bits + * @retval 0 if success + * @retval negative error number if fail + */ +static inline int pca9450_set_bits(struct pca9450 *pca9450, u8 reg, u8 mask) +{ + return regmap_update_bits(pca9450->regmap, reg, mask, mask); +} + +/* + * @brief pca9450_clear_bits + * clear bits in one register of pca9450 + * @param pca9450 device to read + * @param reg register address + * @param mask mask bits + * @retval 0 if success + * @retval negative error number if fail + */ + +static inline int pca9450_clear_bits(struct pca9450 *pca9450, u8 reg, + u8 mask) +{ + return regmap_update_bits(pca9450->regmap, reg, mask, 0); +} + +/* + * @brief pca9450_update_bits + * update bits in one register of pca9450 + * @param pca9450 device to read + * @param reg register address + * @param mask mask bits + * @param val value to update + * @retval 0 if success + * @retval negative error number if fail + */ + +static inline int pca9450_update_bits(struct pca9450 *pca9450, u8 reg, + u8 mask, u8 val) +{ + return regmap_update_bits(pca9450->regmap, reg, mask, val); +} + +/* + * @brief pca9450 platform data type + */ +struct pca9450_gpo_plat_data { + u32 drv; + int gpio_base; +}; + +u8 ext_pca9450_reg_read8(u8 reg); +int ext_pca9450_reg_write8(int reg, u8 val); +#endif /* __LINUX_MFD_PCA9450_H */