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@ -4126,7 +4126,11 @@ static const unsigned int vin5_clk_mux[] = {
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VI5_CLK_MARK,
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};
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static const struct sh_pfc_pin_group pinmux_groups[] = {
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static const struct {
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struct sh_pfc_pin_group common[307];
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struct sh_pfc_pin_group r8a779x[33];
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} pinmux_groups = {
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.common = {
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SH_PFC_PIN_GROUP(audio_clk_a_a),
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SH_PFC_PIN_GROUP(audio_clk_a_b),
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SH_PFC_PIN_GROUP(audio_clk_a_c),
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@ -4159,39 +4163,6 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
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SH_PFC_PIN_GROUP(can0_data_b),
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SH_PFC_PIN_GROUP(can1_data),
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SH_PFC_PIN_GROUP(can_clk),
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SH_PFC_PIN_GROUP(canfd0_data_a),
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SH_PFC_PIN_GROUP(canfd0_data_b),
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SH_PFC_PIN_GROUP(canfd1_data),
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SH_PFC_PIN_GROUP(drif0_ctrl_a),
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SH_PFC_PIN_GROUP(drif0_data0_a),
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SH_PFC_PIN_GROUP(drif0_data1_a),
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SH_PFC_PIN_GROUP(drif0_ctrl_b),
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SH_PFC_PIN_GROUP(drif0_data0_b),
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SH_PFC_PIN_GROUP(drif0_data1_b),
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SH_PFC_PIN_GROUP(drif0_ctrl_c),
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SH_PFC_PIN_GROUP(drif0_data0_c),
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SH_PFC_PIN_GROUP(drif0_data1_c),
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SH_PFC_PIN_GROUP(drif1_ctrl_a),
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SH_PFC_PIN_GROUP(drif1_data0_a),
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SH_PFC_PIN_GROUP(drif1_data1_a),
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SH_PFC_PIN_GROUP(drif1_ctrl_b),
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SH_PFC_PIN_GROUP(drif1_data0_b),
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SH_PFC_PIN_GROUP(drif1_data1_b),
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SH_PFC_PIN_GROUP(drif1_ctrl_c),
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SH_PFC_PIN_GROUP(drif1_data0_c),
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SH_PFC_PIN_GROUP(drif1_data1_c),
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SH_PFC_PIN_GROUP(drif2_ctrl_a),
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SH_PFC_PIN_GROUP(drif2_data0_a),
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SH_PFC_PIN_GROUP(drif2_data1_a),
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SH_PFC_PIN_GROUP(drif2_ctrl_b),
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SH_PFC_PIN_GROUP(drif2_data0_b),
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SH_PFC_PIN_GROUP(drif2_data1_b),
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SH_PFC_PIN_GROUP(drif3_ctrl_a),
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SH_PFC_PIN_GROUP(drif3_data0_a),
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SH_PFC_PIN_GROUP(drif3_data1_a),
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SH_PFC_PIN_GROUP(drif3_ctrl_b),
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SH_PFC_PIN_GROUP(drif3_data0_b),
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SH_PFC_PIN_GROUP(drif3_data1_b),
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SH_PFC_PIN_GROUP(du_rgb666),
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SH_PFC_PIN_GROUP(du_rgb888),
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SH_PFC_PIN_GROUP(du_clk_out_0),
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@ -4467,6 +4438,42 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
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SH_PFC_PIN_GROUP(vin5_field),
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SH_PFC_PIN_GROUP(vin5_clkenb),
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SH_PFC_PIN_GROUP(vin5_clk),
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},
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.r8a779x = {
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SH_PFC_PIN_GROUP(canfd0_data_a),
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SH_PFC_PIN_GROUP(canfd0_data_b),
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SH_PFC_PIN_GROUP(canfd1_data),
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SH_PFC_PIN_GROUP(drif0_ctrl_a),
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SH_PFC_PIN_GROUP(drif0_data0_a),
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SH_PFC_PIN_GROUP(drif0_data1_a),
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SH_PFC_PIN_GROUP(drif0_ctrl_b),
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SH_PFC_PIN_GROUP(drif0_data0_b),
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SH_PFC_PIN_GROUP(drif0_data1_b),
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SH_PFC_PIN_GROUP(drif0_ctrl_c),
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SH_PFC_PIN_GROUP(drif0_data0_c),
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SH_PFC_PIN_GROUP(drif0_data1_c),
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SH_PFC_PIN_GROUP(drif1_ctrl_a),
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SH_PFC_PIN_GROUP(drif1_data0_a),
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SH_PFC_PIN_GROUP(drif1_data1_a),
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SH_PFC_PIN_GROUP(drif1_ctrl_b),
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SH_PFC_PIN_GROUP(drif1_data0_b),
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SH_PFC_PIN_GROUP(drif1_data1_b),
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SH_PFC_PIN_GROUP(drif1_ctrl_c),
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SH_PFC_PIN_GROUP(drif1_data0_c),
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SH_PFC_PIN_GROUP(drif1_data1_c),
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SH_PFC_PIN_GROUP(drif2_ctrl_a),
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SH_PFC_PIN_GROUP(drif2_data0_a),
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SH_PFC_PIN_GROUP(drif2_data1_a),
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SH_PFC_PIN_GROUP(drif2_ctrl_b),
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SH_PFC_PIN_GROUP(drif2_data0_b),
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SH_PFC_PIN_GROUP(drif2_data1_b),
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SH_PFC_PIN_GROUP(drif3_ctrl_a),
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SH_PFC_PIN_GROUP(drif3_data0_a),
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SH_PFC_PIN_GROUP(drif3_data1_a),
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SH_PFC_PIN_GROUP(drif3_ctrl_b),
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SH_PFC_PIN_GROUP(drif3_data0_b),
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SH_PFC_PIN_GROUP(drif3_data1_b),
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}
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};
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static const char * const audio_clk_groups[] = {
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@ -4962,18 +4969,16 @@ static const char * const vin5_groups[] = {
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"vin5_clk",
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};
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static const struct sh_pfc_function pinmux_functions[] = {
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static const struct {
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struct sh_pfc_function common[45];
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struct sh_pfc_function r8a779x[6];
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} pinmux_functions = {
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.common = {
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SH_PFC_FUNCTION(audio_clk),
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SH_PFC_FUNCTION(avb),
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SH_PFC_FUNCTION(can0),
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SH_PFC_FUNCTION(can1),
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SH_PFC_FUNCTION(can_clk),
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SH_PFC_FUNCTION(canfd0),
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SH_PFC_FUNCTION(canfd1),
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SH_PFC_FUNCTION(drif0),
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SH_PFC_FUNCTION(drif1),
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SH_PFC_FUNCTION(drif2),
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SH_PFC_FUNCTION(drif3),
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SH_PFC_FUNCTION(du),
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SH_PFC_FUNCTION(hdmi0),
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SH_PFC_FUNCTION(hscif0),
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@ -5014,6 +5019,15 @@ static const struct sh_pfc_function pinmux_functions[] = {
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SH_PFC_FUNCTION(usb30),
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SH_PFC_FUNCTION(vin4),
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SH_PFC_FUNCTION(vin5),
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},
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.r8a779x = {
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SH_PFC_FUNCTION(canfd0),
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SH_PFC_FUNCTION(canfd1),
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SH_PFC_FUNCTION(drif0),
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SH_PFC_FUNCTION(drif1),
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SH_PFC_FUNCTION(drif2),
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SH_PFC_FUNCTION(drif3),
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}
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};
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static const struct pinmux_cfg_reg pinmux_config_regs[] = {
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@ -6137,8 +6151,9 @@ static const struct sh_pfc_soc_operations r8a7796_pinmux_ops = {
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.set_bias = r8a7796_pinmux_set_bias,
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};
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const struct sh_pfc_soc_info r8a7796_pinmux_info = {
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.name = "r8a77960_pfc",
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#ifdef CONFIG_PINCTRL_PFC_R8A774A1
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const struct sh_pfc_soc_info r8a774a1_pinmux_info = {
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.name = "r8a774a1_pfc",
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.ops = &r8a7796_pinmux_ops,
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.unlock_reg = 0xe6060000, /* PMMR */
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@ -6146,10 +6161,10 @@ const struct sh_pfc_soc_info r8a7796_pinmux_info = {
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.pins = pinmux_pins,
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.nr_pins = ARRAY_SIZE(pinmux_pins),
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.groups = pinmux_groups,
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.nr_groups = ARRAY_SIZE(pinmux_groups),
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.functions = pinmux_functions,
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.nr_functions = ARRAY_SIZE(pinmux_functions),
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.groups = pinmux_groups.common,
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.nr_groups = ARRAY_SIZE(pinmux_groups.common),
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.functions = pinmux_functions.common,
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.nr_functions = ARRAY_SIZE(pinmux_functions.common),
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.cfg_regs = pinmux_config_regs,
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.drive_regs = pinmux_drive_regs,
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@ -6159,3 +6174,31 @@ const struct sh_pfc_soc_info r8a7796_pinmux_info = {
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.pinmux_data = pinmux_data,
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.pinmux_data_size = ARRAY_SIZE(pinmux_data),
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};
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#endif
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#ifdef CONFIG_PINCTRL_PFC_R8A7796
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const struct sh_pfc_soc_info r8a7796_pinmux_info = {
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.name = "r8a77960_pfc",
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.ops = &r8a7796_pinmux_ops,
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.unlock_reg = 0xe6060000, /* PMMR */
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.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
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.pins = pinmux_pins,
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.nr_pins = ARRAY_SIZE(pinmux_pins),
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.groups = pinmux_groups.common,
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.nr_groups = ARRAY_SIZE(pinmux_groups.common) +
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ARRAY_SIZE(pinmux_groups.r8a779x),
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.functions = pinmux_functions.common,
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.nr_functions = ARRAY_SIZE(pinmux_functions.common) +
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ARRAY_SIZE(pinmux_functions.r8a779x),
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.cfg_regs = pinmux_config_regs,
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.drive_regs = pinmux_drive_regs,
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.bias_regs = pinmux_bias_regs,
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.ioctrl_regs = pinmux_ioctrl_regs,
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.pinmux_data = pinmux_data,
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.pinmux_data_size = ARRAY_SIZE(pinmux_data),
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};
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#endif
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