IB/ehca: HW level, HW caps and MTU autodetection
In preparation for support of new eHCA2 features, change adapter probing: - Hardware level is changed to encode major and minor chip version - Hardware capabilities are queried from the firmware - The maximum MTU is queried from the firmware instead of assuming a fixed value Signed-off-by: Joachim Fenkes <fenkes@de.ibm.com> Signed-off-by: Roland Dreier <rolandd@cisco.com>
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b8a3ba5513
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@ -118,7 +118,7 @@ struct ib_ah *ehca_create_ah(struct ib_pd *pd, struct ib_ah_attr *ah_attr)
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}
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memcpy(&av->av.grh.word_1, &gid, sizeof(gid));
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}
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av->av.pmtu = EHCA_MAX_MTU;
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av->av.pmtu = shca->max_mtu;
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/* dgid comes in grh.word_3 */
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memcpy(&av->av.grh.word_3, &ah_attr->grh.dgid,
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@ -137,6 +137,8 @@ int ehca_modify_ah(struct ib_ah *ah, struct ib_ah_attr *ah_attr)
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struct ehca_av *av;
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struct ehca_ud_av new_ehca_av;
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struct ehca_pd *my_pd = container_of(ah->pd, struct ehca_pd, ib_pd);
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struct ehca_shca *shca = container_of(ah->pd->device, struct ehca_shca,
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ib_device);
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u32 cur_pid = current->tgid;
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if (my_pd->ib_pd.uobject && my_pd->ib_pd.uobject->context &&
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@ -192,7 +194,7 @@ int ehca_modify_ah(struct ib_ah *ah, struct ib_ah_attr *ah_attr)
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memcpy(&new_ehca_av.grh.word_1, &gid, sizeof(gid));
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}
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new_ehca_av.pmtu = EHCA_MAX_MTU;
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new_ehca_av.pmtu = shca->max_mtu;
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memcpy(&new_ehca_av.grh.word_3, &ah_attr->grh.dgid,
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sizeof(ah_attr->grh.dgid));
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@ -107,6 +107,8 @@ struct ehca_shca {
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struct ehca_pd *pd;
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struct h_galpas galpas;
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struct mutex modify_mutex;
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u64 hca_cap;
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int max_mtu;
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};
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struct ehca_pd {
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@ -45,11 +45,25 @@
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int ehca_query_device(struct ib_device *ibdev, struct ib_device_attr *props)
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{
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int ret = 0;
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int i, ret = 0;
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struct ehca_shca *shca = container_of(ibdev, struct ehca_shca,
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ib_device);
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struct hipz_query_hca *rblock;
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static const u32 cap_mapping[] = {
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IB_DEVICE_RESIZE_MAX_WR, HCA_CAP_WQE_RESIZE,
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IB_DEVICE_BAD_PKEY_CNTR, HCA_CAP_BAD_P_KEY_CTR,
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IB_DEVICE_BAD_QKEY_CNTR, HCA_CAP_Q_KEY_VIOL_CTR,
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IB_DEVICE_RAW_MULTI, HCA_CAP_RAW_PACKET_MCAST,
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IB_DEVICE_AUTO_PATH_MIG, HCA_CAP_AUTO_PATH_MIG,
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IB_DEVICE_CHANGE_PHY_PORT, HCA_CAP_SQD_RTS_PORT_CHANGE,
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IB_DEVICE_UD_AV_PORT_ENFORCE, HCA_CAP_AH_PORT_NR_CHECK,
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IB_DEVICE_CURR_QP_STATE_MOD, HCA_CAP_CUR_QP_STATE_MOD,
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IB_DEVICE_SHUTDOWN_PORT, HCA_CAP_SHUTDOWN_PORT,
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IB_DEVICE_INIT_TYPE, HCA_CAP_INIT_TYPE,
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IB_DEVICE_PORT_ACTIVE_EVENT, HCA_CAP_PORT_ACTIVE_EVENT,
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};
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rblock = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
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if (!rblock) {
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ehca_err(&shca->ib_device, "Can't allocate rblock memory.");
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@ -96,6 +110,13 @@ int ehca_query_device(struct ib_device *ibdev, struct ib_device_attr *props)
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props->max_total_mcast_qp_attach
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= min_t(int, rblock->max_total_mcast_qp_attach, INT_MAX);
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/* translate device capabilities */
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props->device_cap_flags = IB_DEVICE_SYS_IMAGE_GUID |
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IB_DEVICE_RC_RNR_NAK_GEN | IB_DEVICE_N_NOTIFY_CQ;
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for (i = 0; i < ARRAY_SIZE(cap_mapping); i += 2)
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if (rblock->hca_cap_indicators & cap_mapping[i + 1])
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props->device_cap_flags |= cap_mapping[i];
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query_device1:
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ehca_free_fw_ctrlblock(rblock);
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@ -261,7 +282,7 @@ int ehca_modify_port(struct ib_device *ibdev,
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}
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if (mutex_lock_interruptible(&shca->modify_mutex))
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return -ERESTARTSYS;
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return -ERESTARTSYS;
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rblock = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
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if (!rblock) {
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@ -290,7 +311,7 @@ modify_port2:
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ehca_free_fw_ctrlblock(rblock);
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modify_port1:
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mutex_unlock(&shca->modify_mutex);
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mutex_unlock(&shca->modify_mutex);
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return ret;
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}
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@ -205,11 +205,35 @@ static void ehca_destroy_slab_caches(void)
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#define EHCA_HCAAVER EHCA_BMASK_IBM(32,39)
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#define EHCA_REVID EHCA_BMASK_IBM(40,63)
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static struct cap_descr {
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u64 mask;
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char *descr;
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} hca_cap_descr[] = {
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{ HCA_CAP_AH_PORT_NR_CHECK, "HCA_CAP_AH_PORT_NR_CHECK" },
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{ HCA_CAP_ATOMIC, "HCA_CAP_ATOMIC" },
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{ HCA_CAP_AUTO_PATH_MIG, "HCA_CAP_AUTO_PATH_MIG" },
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{ HCA_CAP_BAD_P_KEY_CTR, "HCA_CAP_BAD_P_KEY_CTR" },
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{ HCA_CAP_SQD_RTS_PORT_CHANGE, "HCA_CAP_SQD_RTS_PORT_CHANGE" },
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{ HCA_CAP_CUR_QP_STATE_MOD, "HCA_CAP_CUR_QP_STATE_MOD" },
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{ HCA_CAP_INIT_TYPE, "HCA_CAP_INIT_TYPE" },
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{ HCA_CAP_PORT_ACTIVE_EVENT, "HCA_CAP_PORT_ACTIVE_EVENT" },
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{ HCA_CAP_Q_KEY_VIOL_CTR, "HCA_CAP_Q_KEY_VIOL_CTR" },
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{ HCA_CAP_WQE_RESIZE, "HCA_CAP_WQE_RESIZE" },
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{ HCA_CAP_RAW_PACKET_MCAST, "HCA_CAP_RAW_PACKET_MCAST" },
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{ HCA_CAP_SHUTDOWN_PORT, "HCA_CAP_SHUTDOWN_PORT" },
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{ HCA_CAP_RC_LL_QP, "HCA_CAP_RC_LL_QP" },
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{ HCA_CAP_SRQ, "HCA_CAP_SRQ" },
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{ HCA_CAP_UD_LL_QP, "HCA_CAP_UD_LL_QP" },
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{ HCA_CAP_RESIZE_MR, "HCA_CAP_RESIZE_MR" },
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{ HCA_CAP_MINI_QP, "HCA_CAP_MINI_QP" },
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};
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int ehca_sense_attributes(struct ehca_shca *shca)
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{
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int ret = 0;
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int i, ret = 0;
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u64 h_ret;
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struct hipz_query_hca *rblock;
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struct hipz_query_port *port;
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rblock = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
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if (!rblock) {
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@ -222,7 +246,7 @@ int ehca_sense_attributes(struct ehca_shca *shca)
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ehca_gen_err("Cannot query device properties. h_ret=%lx",
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h_ret);
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ret = -EPERM;
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goto num_ports1;
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goto sense_attributes1;
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}
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if (ehca_nr_ports == 1)
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@ -242,18 +266,44 @@ int ehca_sense_attributes(struct ehca_shca *shca)
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ehca_gen_dbg(" ... hardware version=%x:%x", hcaaver, revid);
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if ((hcaaver == 1) && (revid == 0))
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shca->hw_level = 0;
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shca->hw_level = 0x11;
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else if ((hcaaver == 1) && (revid == 1))
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shca->hw_level = 1;
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shca->hw_level = 0x12;
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else if ((hcaaver == 1) && (revid == 2))
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shca->hw_level = 2;
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shca->hw_level = 0x13;
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else if ((hcaaver == 2) && (revid == 0))
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shca->hw_level = 0x21;
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else if ((hcaaver == 2) && (revid == 0x10))
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shca->hw_level = 0x22;
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else {
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ehca_gen_warn("unknown hardware version"
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" - assuming default level");
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shca->hw_level = 0x22;
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}
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}
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ehca_gen_dbg(" ... hardware level=%x", shca->hw_level);
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shca->sport[0].rate = IB_RATE_30_GBPS;
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shca->sport[1].rate = IB_RATE_30_GBPS;
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num_ports1:
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shca->hca_cap = rblock->hca_cap_indicators;
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ehca_gen_dbg(" ... HCA capabilities:");
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for (i = 0; i < ARRAY_SIZE(hca_cap_descr); i++)
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if (EHCA_BMASK_GET(hca_cap_descr[i].mask, shca->hca_cap))
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ehca_gen_dbg(" %s", hca_cap_descr[i].descr);
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port = (struct hipz_query_port *) rblock;
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h_ret = hipz_h_query_port(shca->ipz_hca_handle, 1, port);
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if (h_ret != H_SUCCESS) {
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ehca_gen_err("Cannot query port properties. h_ret=%lx",
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h_ret);
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ret = -EPERM;
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goto sense_attributes1;
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}
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shca->max_mtu = port->max_mtu;
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sense_attributes1:
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ehca_free_fw_ctrlblock(rblock);
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return ret;
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}
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@ -360,6 +360,24 @@ struct hipz_query_hca {
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u32 max_neq;
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} __attribute__ ((packed));
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#define HCA_CAP_AH_PORT_NR_CHECK EHCA_BMASK_IBM( 0, 0)
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#define HCA_CAP_ATOMIC EHCA_BMASK_IBM( 1, 1)
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#define HCA_CAP_AUTO_PATH_MIG EHCA_BMASK_IBM( 2, 2)
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#define HCA_CAP_BAD_P_KEY_CTR EHCA_BMASK_IBM( 3, 3)
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#define HCA_CAP_SQD_RTS_PORT_CHANGE EHCA_BMASK_IBM( 4, 4)
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#define HCA_CAP_CUR_QP_STATE_MOD EHCA_BMASK_IBM( 5, 5)
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#define HCA_CAP_INIT_TYPE EHCA_BMASK_IBM( 6, 6)
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#define HCA_CAP_PORT_ACTIVE_EVENT EHCA_BMASK_IBM( 7, 7)
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#define HCA_CAP_Q_KEY_VIOL_CTR EHCA_BMASK_IBM( 8, 8)
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#define HCA_CAP_WQE_RESIZE EHCA_BMASK_IBM( 9, 9)
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#define HCA_CAP_RAW_PACKET_MCAST EHCA_BMASK_IBM(10, 10)
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#define HCA_CAP_SHUTDOWN_PORT EHCA_BMASK_IBM(11, 11)
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#define HCA_CAP_RC_LL_QP EHCA_BMASK_IBM(12, 12)
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#define HCA_CAP_SRQ EHCA_BMASK_IBM(13, 13)
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#define HCA_CAP_UD_LL_QP EHCA_BMASK_IBM(16, 16)
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#define HCA_CAP_RESIZE_MR EHCA_BMASK_IBM(17, 17)
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#define HCA_CAP_MINI_QP EHCA_BMASK_IBM(18, 18)
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/* query port response block */
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struct hipz_query_port {
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u32 state;
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