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drm/i915/icl: Store available engine masks in INTEL_INFO 

Upcoming GuC code will need to read the fused off engine masks as well,
and will also want to have them as enabled instead of disabled masks.

To consolidate the read-out place we can store them in this fashion inside
INTEL_INFO so they can be easily referenced in the future.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181018104106.30147-1-tvrtko.ursulin@linux.intel.com
hifive-unleashed-5.1
Tvrtko Ursulin 2018-10-18 11:41:06 +01:00
parent 6fc4e48f9e
commit 9213e4f544
2 changed files with 19 additions and 18 deletions
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33
drivers/gpu/drm/i915/intel_device_info.c
View File

@ -880,40 +880,37 @@ void intel_driver_caps_print(const struct intel_driver_caps *caps,
void intel_device_info_init_mmio(struct drm_i915_private *dev_priv)
{
struct intel_device_info *info = mkwrite_device_info(dev_priv);
u8 vdbox_disable, vebox_disable;
u32 media_fuse;
int i;
unsigned int i;
if (INTEL_GEN(dev_priv) < 11)
return;
media_fuse = I915_READ(GEN11_GT_VEBOX_VDBOX_DISABLE);
media_fuse = ~I915_READ(GEN11_GT_VEBOX_VDBOX_DISABLE);
vdbox_disable = media_fuse & GEN11_GT_VDBOX_DISABLE_MASK;
vebox_disable = (media_fuse & GEN11_GT_VEBOX_DISABLE_MASK) >>
GEN11_GT_VEBOX_DISABLE_SHIFT;
info->vdbox_enable = media_fuse & GEN11_GT_VDBOX_DISABLE_MASK;
info->vebox_enable = (media_fuse & GEN11_GT_VEBOX_DISABLE_MASK) >>
GEN11_GT_VEBOX_DISABLE_SHIFT;
DRM_DEBUG_DRIVER("vdbox disable: %04x\n", vdbox_disable);
DRM_DEBUG_DRIVER("vdbox enable: %04x\n", info->vdbox_enable);
for (i = 0; i < I915_MAX_VCS; i++) {
if (!HAS_ENGINE(dev_priv, _VCS(i)))
continue;
if (!(BIT(i) & vdbox_disable))
continue;
info->ring_mask &= ~ENGINE_MASK(_VCS(i));
DRM_DEBUG_DRIVER("vcs%u fused off\n", i);
if (!(BIT(i) & info->vdbox_enable)) {
info->ring_mask &= ~ENGINE_MASK(_VCS(i));
DRM_DEBUG_DRIVER("vcs%u fused off\n", i);
}
}
DRM_DEBUG_DRIVER("vebox disable: %04x\n", vebox_disable);
DRM_DEBUG_DRIVER("vebox enable: %04x\n", info->vebox_enable);
for (i = 0; i < I915_MAX_VECS; i++) {
if (!HAS_ENGINE(dev_priv, _VECS(i)))
continue;
if (!(BIT(i) & vebox_disable))
continue;
info->ring_mask &= ~ENGINE_MASK(_VECS(i));
DRM_DEBUG_DRIVER("vecs%u fused off\n", i);
if (!(BIT(i) & info->vebox_enable)) {
info->ring_mask &= ~ENGINE_MASK(_VECS(i));
DRM_DEBUG_DRIVER("vecs%u fused off\n", i);
}
}
}

4
drivers/gpu/drm/i915/intel_device_info.h
View File

@ -185,6 +185,10 @@ struct intel_device_info {
u32 cs_timestamp_frequency_khz;
/* Enabled (not fused off) media engine bitmasks. */
u8 vdbox_enable;
u8 vebox_enable;
struct color_luts {
u16 degamma_lut_size;
u16 gamma_lut_size;