mt76: mmio: move mt76x02_set_irq_mask in mt76 module
Move mt76x02_set_irq_mask in mt76 module in order to be reused adding support for mt7603 driver and remove duplicated code Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Felix Fietkau <nbd@nbd.name>
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@ -70,6 +70,19 @@ static int mt76_mmio_rd_rp(struct mt76_dev *dev, u32 base,
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return 0;
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}
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void mt76_set_irq_mask(struct mt76_dev *dev, u32 addr,
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u32 clear, u32 set)
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{
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unsigned long flags;
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spin_lock_irqsave(&dev->mmio.irq_lock, flags);
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dev->mmio.irqmask &= ~clear;
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dev->mmio.irqmask |= set;
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mt76_mmio_wr(dev, addr, dev->mmio.irqmask);
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spin_unlock_irqrestore(&dev->mmio.irq_lock, flags);
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}
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EXPORT_SYMBOL_GPL(mt76_set_irq_mask);
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void mt76_mmio_init(struct mt76_dev *dev, void __iomem *regs)
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{
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static const struct mt76_bus_ops mt76_mmio_ops = {
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@ -770,4 +770,6 @@ void mt76_mcu_rx_event(struct mt76_dev *dev, struct sk_buff *skb);
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struct sk_buff *mt76_mcu_get_response(struct mt76_dev *dev,
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unsigned long expires);
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void mt76_set_irq_mask(struct mt76_dev *dev, u32 addr, u32 clear, u32 set);
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#endif
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@ -2,17 +2,6 @@
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#include "mt7603.h"
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void mt7603_set_irq_mask(struct mt7603_dev *dev, u32 clear, u32 set)
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{
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unsigned long flags;
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spin_lock_irqsave(&dev->mt76.mmio.irq_lock, flags);
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dev->mt76.mmio.irqmask &= ~clear;
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dev->mt76.mmio.irqmask |= set;
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mt76_wr(dev, MT_INT_MASK_CSR, dev->mt76.mmio.irqmask);
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spin_unlock_irqrestore(&dev->mt76.mmio.irq_lock, flags);
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}
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void mt7603_rx_poll_complete(struct mt76_dev *mdev, enum mt76_rxq_id q)
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{
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struct mt7603_dev *dev = container_of(mdev, struct mt7603_dev, mt76);
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@ -179,16 +179,14 @@ void mt7603_dma_cleanup(struct mt7603_dev *dev);
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int mt7603_mcu_init(struct mt7603_dev *dev);
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void mt7603_init_debugfs(struct mt7603_dev *dev);
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void mt7603_set_irq_mask(struct mt7603_dev *dev, u32 clear, u32 set);
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static inline void mt7603_irq_enable(struct mt7603_dev *dev, u32 mask)
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{
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mt7603_set_irq_mask(dev, 0, mask);
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mt76_set_irq_mask(&dev->mt76, MT_INT_MASK_CSR, 0, mask);
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}
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static inline void mt7603_irq_disable(struct mt7603_dev *dev, u32 mask)
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{
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mt7603_set_irq_mask(dev, mask, 0);
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mt76_set_irq_mask(&dev->mt76, MT_INT_MASK_CSR, mask, 0);
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}
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void mt7603_mac_dma_start(struct mt7603_dev *dev);
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@ -187,7 +187,6 @@ void mt76x02_bss_info_changed(struct ieee80211_hw *hw,
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extern const u16 mt76x02_beacon_offsets[16];
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void mt76x02_init_beacon_config(struct mt76x02_dev *dev);
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void mt76x02_set_irq_mask(struct mt76x02_dev *dev, u32 clear, u32 set);
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void mt76x02_mac_start(struct mt76x02_dev *dev);
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void mt76x02_init_debugfs(struct mt76x02_dev *dev);
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@ -208,12 +207,12 @@ static inline bool is_mt76x2(struct mt76x02_dev *dev)
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static inline void mt76x02_irq_enable(struct mt76x02_dev *dev, u32 mask)
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{
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mt76x02_set_irq_mask(dev, 0, mask);
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mt76_set_irq_mask(&dev->mt76, MT_INT_MASK_CSR, 0, mask);
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}
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static inline void mt76x02_irq_disable(struct mt76x02_dev *dev, u32 mask)
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{
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mt76x02_set_irq_mask(dev, mask, 0);
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mt76_set_irq_mask(&dev->mt76, MT_INT_MASK_CSR, mask, 0);
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}
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static inline bool
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@ -336,18 +336,6 @@ irqreturn_t mt76x02_irq_handler(int irq, void *dev_instance)
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}
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EXPORT_SYMBOL_GPL(mt76x02_irq_handler);
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void mt76x02_set_irq_mask(struct mt76x02_dev *dev, u32 clear, u32 set)
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{
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unsigned long flags;
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spin_lock_irqsave(&dev->mt76.mmio.irq_lock, flags);
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dev->mt76.mmio.irqmask &= ~clear;
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dev->mt76.mmio.irqmask |= set;
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mt76_wr(dev, MT_INT_MASK_CSR, dev->mt76.mmio.irqmask);
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spin_unlock_irqrestore(&dev->mt76.mmio.irq_lock, flags);
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}
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EXPORT_SYMBOL_GPL(mt76x02_set_irq_mask);
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static void mt76x02_dma_enable(struct mt76x02_dev *dev)
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{
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u32 val;
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