drm/i915/skl: Implement WaDisablePartialResolveInVc
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> Reviewed-by: Nick Hoath <nicholas.hoath@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -1483,6 +1483,7 @@ enum skl_disp_power_wells {
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#define CACHE_MODE_1 0x7004 /* IVB+ */
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#define PIXEL_SUBSPAN_COLLECT_OPT_DISABLE (1<<6)
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#define GEN8_4x4_STC_OPTIMIZATION_DISABLE (1<<6)
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#define GEN9_PARTIAL_RESOLVE_IN_VC_DISABLE (1<<1)
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#define GEN6_BLITTER_ECOSKPD 0x221d0
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#define GEN6_BLITTER_LOCK_SHIFT 16
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@ -981,6 +981,9 @@ static int gen9_init_workarounds(struct intel_engine_cs *ring)
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/* Wa4x4STCOptimizationDisable:skl */
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WA_SET_BIT_MASKED(CACHE_MODE_1, GEN8_4x4_STC_OPTIMIZATION_DISABLE);
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/* WaDisablePartialResolveInVc:skl */
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WA_SET_BIT_MASKED(CACHE_MODE_1, GEN9_PARTIAL_RESOLVE_IN_VC_DISABLE);
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return 0;
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}
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