[ARM] 5336/1: Formatting/Whitespace cleanups in mach-sa1100
This patch fixes bad formatting found in mach-sa1100 files. What it does is to replace/delete things like excessive spaces (start || endline). The code looks the same just alot less junk. Signed-off-by: Kristoffer Ericson <Kristoffer.Ericson@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>hifive-unleashed-5.1
parent
799a0600ac
commit
93982535a2
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@ -68,23 +68,22 @@ struct platform_device colliescoop_device = {
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};
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};
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static struct scoop_pcmcia_dev collie_pcmcia_scoop[] = {
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static struct scoop_pcmcia_dev collie_pcmcia_scoop[] = {
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{
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{
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.dev = &colliescoop_device.dev,
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.dev = &colliescoop_device.dev,
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.irq = COLLIE_IRQ_GPIO_CF_IRQ,
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.irq = COLLIE_IRQ_GPIO_CF_IRQ,
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.cd_irq = COLLIE_IRQ_GPIO_CF_CD,
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.cd_irq = COLLIE_IRQ_GPIO_CF_CD,
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.cd_irq_str = "PCMCIA0 CD",
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.cd_irq_str = "PCMCIA0 CD",
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},
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},
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};
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};
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static struct scoop_pcmcia_config collie_pcmcia_config = {
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static struct scoop_pcmcia_config collie_pcmcia_config = {
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.devs = &collie_pcmcia_scoop[0],
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.devs = &collie_pcmcia_scoop[0],
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.num_devs = 1,
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.num_devs = 1,
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};
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};
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static struct mcp_plat_data collie_mcp_data = {
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static struct mcp_plat_data collie_mcp_data = {
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.mccr0 = MCCR0_ADM | MCCR0_ExtClk,
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.mccr0 = MCCR0_ADM | MCCR0_ExtClk,
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.sclk_rate = 9216000,
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.sclk_rate = 9216000,
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};
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};
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#ifdef CONFIG_SHARP_LOCOMO
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#ifdef CONFIG_SHARP_LOCOMO
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@ -95,14 +94,14 @@ struct platform_device collie_locomo_device;
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static void collie_uart_set_mctrl(struct uart_port *port, u_int mctrl)
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static void collie_uart_set_mctrl(struct uart_port *port, u_int mctrl)
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{
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{
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if (mctrl & TIOCM_RTS)
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if (mctrl & TIOCM_RTS)
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locomo_gpio_write(&collie_locomo_device.dev, LOCOMO_GPIO_RTS, 0);
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locomo_gpio_write(&collie_locomo_device.dev, LOCOMO_GPIO_RTS, 0);
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else
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else
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locomo_gpio_write(&collie_locomo_device.dev, LOCOMO_GPIO_RTS, 1);
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locomo_gpio_write(&collie_locomo_device.dev, LOCOMO_GPIO_RTS, 1);
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if (mctrl & TIOCM_DTR)
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if (mctrl & TIOCM_DTR)
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locomo_gpio_write(&collie_locomo_device.dev, LOCOMO_GPIO_DTR, 0);
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locomo_gpio_write(&collie_locomo_device.dev, LOCOMO_GPIO_DTR, 0);
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else
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else
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locomo_gpio_write(&collie_locomo_device.dev, LOCOMO_GPIO_DTR, 1);
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locomo_gpio_write(&collie_locomo_device.dev, LOCOMO_GPIO_DTR, 1);
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}
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}
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@ -263,24 +263,24 @@ static int __init collie_pm_ucb_add(struct ucb1x00_dev *pdev)
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}
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}
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static struct ucb1x00_driver collie_pm_ucb_driver = {
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static struct ucb1x00_driver collie_pm_ucb_driver = {
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.add = collie_pm_ucb_add,
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.add = collie_pm_ucb_add,
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};
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};
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static struct platform_device *collie_pm_device;
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static struct platform_device *collie_pm_device;
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static int __init collie_pm_init(void)
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static int __init collie_pm_init(void)
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{
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{
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int ret;
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int ret;
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collie_pm_device = platform_device_alloc("sharpsl-pm", -1);
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collie_pm_device = platform_device_alloc("sharpsl-pm", -1);
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if (!collie_pm_device)
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if (!collie_pm_device)
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return -ENOMEM;
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return -ENOMEM;
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collie_pm_device->dev.platform_data = &collie_pm_machinfo;
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collie_pm_device->dev.platform_data = &collie_pm_machinfo;
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ret = platform_device_add(collie_pm_device);
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ret = platform_device_add(collie_pm_device);
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if (ret)
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if (ret)
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platform_device_put(collie_pm_device);
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platform_device_put(collie_pm_device);
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if (!ret)
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if (!ret)
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ret = ucb1x00_register_driver(&collie_pm_ucb_driver);
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ret = ucb1x00_register_driver(&collie_pm_ucb_driver);
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@ -291,7 +291,7 @@ static int __init collie_pm_init(void)
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static void __exit collie_pm_exit(void)
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static void __exit collie_pm_exit(void)
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{
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{
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ucb1x00_unregister_driver(&collie_pm_ucb_driver);
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ucb1x00_unregister_driver(&collie_pm_ucb_driver);
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platform_device_unregister(collie_pm_device);
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platform_device_unregister(collie_pm_device);
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}
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}
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module_init(collie_pm_init);
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module_init(collie_pm_init);
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@ -3,17 +3,17 @@
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*
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*
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* Copyright (C) 2000 2001, The Delft University of Technology
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* Copyright (C) 2000 2001, The Delft University of Technology
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*
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*
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* Authors:
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* Authors:
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* - Johan Pouwelse (J.A.Pouwelse@its.tudelft.nl): initial version
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* - Johan Pouwelse (J.A.Pouwelse@its.tudelft.nl): initial version
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* - Erik Mouw (J.A.K.Mouw@its.tudelft.nl):
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* - Erik Mouw (J.A.K.Mouw@its.tudelft.nl):
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* - major rewrite for linux-2.3.99
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* - major rewrite for linux-2.3.99
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* - rewritten for the more generic power management scheme in
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* - rewritten for the more generic power management scheme in
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* linux-2.4.5-rmk1
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* linux-2.4.5-rmk1
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*
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*
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* This software has been developed while working on the LART
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* This software has been developed while working on the LART
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* computing board (http://www.lartmaker.nl/), which is
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* computing board (http://www.lartmaker.nl/), which is
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* sponsored by the Mobile Multi-media Communications
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* sponsored by the Mobile Multi-media Communications
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* (http://www.mmc.tudelft.nl/) and Ubiquitous Communications
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* (http://www.mmc.tudelft.nl/) and Ubiquitous Communications
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* (http://www.ubicom.tudelft.nl/) projects.
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* (http://www.ubicom.tudelft.nl/) projects.
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*
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*
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* The authors can be reached at:
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* The authors can be reached at:
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@ -36,7 +36,7 @@
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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* GNU General Public License for more details.
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*
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*
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* You should have received a copy of the GNU General Public License
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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@ -44,7 +44,7 @@
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*
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*
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* Theory of operations
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* Theory of operations
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* ====================
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* ====================
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*
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*
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* Clock scaling can be used to lower the power consumption of the CPU
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* Clock scaling can be used to lower the power consumption of the CPU
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* core. This will give you a somewhat longer running time.
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* core. This will give you a somewhat longer running time.
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*
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*
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@ -58,11 +58,11 @@
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* MDCNFG 0xA0000000 DRAM config
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* MDCNFG 0xA0000000 DRAM config
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* MDCAS0 0xA0000004 Access waveform
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* MDCAS0 0xA0000004 Access waveform
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* MDCAS1 0xA0000008 Access waveform
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* MDCAS1 0xA0000008 Access waveform
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* MDCAS2 0xA000000C Access waveform
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* MDCAS2 0xA000000C Access waveform
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*
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*
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* Care must be taken to change the DRAM parameters the correct way,
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* Care must be taken to change the DRAM parameters the correct way,
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* because otherwise the DRAM becomes unusable and the kernel will
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* because otherwise the DRAM becomes unusable and the kernel will
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* crash.
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* crash.
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*
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*
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* The simple solution to avoid a kernel crash is to put the actual
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* The simple solution to avoid a kernel crash is to put the actual
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* clock change in ROM and jump to that code from the kernel. The main
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* clock change in ROM and jump to that code from the kernel. The main
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@ -75,7 +75,7 @@
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* as long as all re-configuration steps yield a valid DRAM
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* as long as all re-configuration steps yield a valid DRAM
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* configuration. The advantages are clear: it will run on all SA-1100
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* configuration. The advantages are clear: it will run on all SA-1100
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* platforms, and the code is very simple.
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* platforms, and the code is very simple.
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*
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*
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* If you really want to understand what is going on in
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* If you really want to understand what is going on in
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* sa1100_update_dram_timings(), you'll have to read sections 8.2,
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* sa1100_update_dram_timings(), you'll have to read sections 8.2,
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* 9.5.7.3, and 10.2 from the "Intel StrongARM SA-1100 Microprocessor
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* 9.5.7.3, and 10.2 from the "Intel StrongARM SA-1100 Microprocessor
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@ -97,7 +97,7 @@
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typedef struct {
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typedef struct {
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int speed;
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int speed;
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u32 mdcnfg;
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u32 mdcnfg;
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u32 mdcas0;
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u32 mdcas0;
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u32 mdcas1;
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u32 mdcas1;
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u32 mdcas2;
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u32 mdcas2;
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} sa1100_dram_regs_t;
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} sa1100_dram_regs_t;
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@ -147,7 +147,7 @@ static void sa1100_update_dram_timings(int current_speed, int new_speed)
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/* No risk, no fun: run with interrupts on! */
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/* No risk, no fun: run with interrupts on! */
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if (new_speed > current_speed) {
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if (new_speed > current_speed) {
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/* We're going FASTER, so first relax the memory
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/* We're going FASTER, so first relax the memory
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* timings before changing the core frequency
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* timings before changing the core frequency
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*/
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*/
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/* Half the memory access clock */
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/* Half the memory access clock */
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@ -81,14 +81,14 @@ static struct sdram_params sdram_tbl[] __initdata = {
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.twr = 9,
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.twr = 9,
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.refresh = 64000,
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.refresh = 64000,
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.cas_latency = 3,
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.cas_latency = 3,
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}, { /* Samsung K4S281632B-1H */
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}, { /* Samsung K4S281632B-1H */
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.name = "K4S281632B-1H",
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.name = "K4S281632B-1H",
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.rows = 12,
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.rows = 12,
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.tck = 10,
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.tck = 10,
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.trp = 20,
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.trp = 20,
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.twr = 10,
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.twr = 10,
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.refresh = 64000,
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.refresh = 64000,
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.cas_latency = 3,
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.cas_latency = 3,
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}, { /* Samsung KM416S4030CT */
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}, { /* Samsung KM416S4030CT */
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.name = "KM416S4030CT",
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.name = "KM416S4030CT",
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.rows = 13,
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.rows = 13,
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@ -220,7 +220,7 @@ sdram_update_refresh(u_int cpu_khz, struct sdram_params *sdram)
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}
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}
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/*
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/*
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* Ok, set the CPU frequency.
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* Ok, set the CPU frequency.
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*/
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*/
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static int sa1110_target(struct cpufreq_policy *policy,
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static int sa1110_target(struct cpufreq_policy *policy,
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unsigned int target_freq,
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unsigned int target_freq,
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@ -113,10 +113,10 @@ int sa1100_request_dma (dma_device_t device, const char *device_id,
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}
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}
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}
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}
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if (!err) {
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if (!err) {
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if (dma)
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if (dma)
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dma->device = device;
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dma->device = device;
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else
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else
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err = -ENOSR;
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err = -ENOSR;
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}
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}
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spin_unlock(&dma_list_lock);
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spin_unlock(&dma_list_lock);
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if (err)
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if (err)
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@ -32,14 +32,14 @@ typedef int __bitwise pm_request_t;
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#define machine_is_h3xxx() (machine_is_h3100() || machine_is_h3600() || machine_is_h3800())
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#define machine_is_h3xxx() (machine_is_h3100() || machine_is_h3600() || machine_is_h3800())
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/* Physical memory regions corresponding to chip selects */
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/* Physical memory regions corresponding to chip selects */
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#define H3600_EGPIO_PHYS (SA1100_CS5_PHYS + 0x01000000)
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#define H3600_EGPIO_PHYS (SA1100_CS5_PHYS + 0x01000000)
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#define H3600_BANK_2_PHYS SA1100_CS2_PHYS
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#define H3600_BANK_2_PHYS SA1100_CS2_PHYS
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#define H3600_BANK_4_PHYS SA1100_CS4_PHYS
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#define H3600_BANK_4_PHYS SA1100_CS4_PHYS
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/* Virtual memory regions corresponding to chip selects 2 & 4 (used on sleeves) */
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/* Virtual memory regions corresponding to chip selects 2 & 4 (used on sleeves) */
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#define H3600_EGPIO_VIRT 0xf0000000
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#define H3600_EGPIO_VIRT 0xf0000000
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#define H3600_BANK_2_VIRT 0xf1000000
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#define H3600_BANK_2_VIRT 0xf1000000
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#define H3600_BANK_4_VIRT 0xf3800000
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#define H3600_BANK_4_VIRT 0xf3800000
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/*
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/*
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Machine-independent GPIO definitions
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Machine-independent GPIO definitions
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@ -122,12 +122,12 @@ static void __init pleb_map_io(void)
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sa1100_map_io();
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sa1100_map_io();
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sa1100_register_uart(0, 3);
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sa1100_register_uart(0, 3);
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sa1100_register_uart(1, 1);
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sa1100_register_uart(1, 1);
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GAFR |= (GPIO_UART_TXD | GPIO_UART_RXD);
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GAFR |= (GPIO_UART_TXD | GPIO_UART_RXD);
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GPDR |= GPIO_UART_TXD;
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GPDR |= GPIO_UART_TXD;
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GPDR &= ~GPIO_UART_RXD;
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GPDR &= ~GPIO_UART_RXD;
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PPAR |= PPAR_UPR;
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PPAR |= PPAR_UPR;
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/*
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/*
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* Fix expansion memory timing for network card
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* Fix expansion memory timing for network card
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@ -33,7 +33,7 @@ static struct mtd_partition shannon_partitions[] = {
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.offset = MTDPART_OFS_APPEND,
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.offset = MTDPART_OFS_APPEND,
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.size = 0xe0000
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.size = 0xe0000
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},
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},
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{
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{
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.name = "initrd",
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.name = "initrd",
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.offset = MTDPART_OFS_APPEND,
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.offset = MTDPART_OFS_APPEND,
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.size = MTDPART_SIZ_FULL
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.size = MTDPART_SIZ_FULL
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@ -100,36 +100,36 @@ ENTRY(sa1100_cpu_suspend)
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ldr r1, =MSC1
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ldr r1, =MSC1
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ldr r2, =MSC2
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ldr r2, =MSC2
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ldr r3, [r0]
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ldr r3, [r0]
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bic r3, r3, #FMsk(MSC_RT)
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bic r3, r3, #FMsk(MSC_RT)
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bic r3, r3, #FMsk(MSC_RT)<<16
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bic r3, r3, #FMsk(MSC_RT)<<16
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ldr r4, [r1]
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ldr r4, [r1]
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bic r4, r4, #FMsk(MSC_RT)
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bic r4, r4, #FMsk(MSC_RT)
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bic r4, r4, #FMsk(MSC_RT)<<16
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bic r4, r4, #FMsk(MSC_RT)<<16
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ldr r5, [r2]
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ldr r5, [r2]
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bic r5, r5, #FMsk(MSC_RT)
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bic r5, r5, #FMsk(MSC_RT)
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bic r5, r5, #FMsk(MSC_RT)<<16
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bic r5, r5, #FMsk(MSC_RT)<<16
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ldr r6, =MDREFR
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ldr r6, =MDREFR
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ldr r7, [r6]
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ldr r7, [r6]
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bic r7, r7, #0x0000FF00
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bic r7, r7, #0x0000FF00
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bic r7, r7, #0x000000F0
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bic r7, r7, #0x000000F0
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orr r8, r7, #MDREFR_SLFRSH
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orr r8, r7, #MDREFR_SLFRSH
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ldr r9, =MDCNFG
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ldr r9, =MDCNFG
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ldr r10, [r9]
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ldr r10, [r9]
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bic r10, r10, #(MDCNFG_DE0+MDCNFG_DE1)
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bic r10, r10, #(MDCNFG_DE0+MDCNFG_DE1)
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bic r10, r10, #(MDCNFG_DE2+MDCNFG_DE3)
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bic r10, r10, #(MDCNFG_DE2+MDCNFG_DE3)
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bic r11, r8, #MDREFR_SLFRSH
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bic r11, r8, #MDREFR_SLFRSH
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bic r11, r11, #MDREFR_E1PIN
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bic r11, r11, #MDREFR_E1PIN
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ldr r12, =PMCR
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ldr r12, =PMCR
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mov r13, #PMCR_SF
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mov r13, #PMCR_SF
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b sa1110_sdram_controller_fix
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b sa1110_sdram_controller_fix
|
||||||
|
|
||||||
|
@ -188,10 +188,10 @@ ENTRY(sa1100_cpu_resume)
|
||||||
mcr p15, 0, r1, c8, c7, 0 @ flush I+D TLBs
|
mcr p15, 0, r1, c8, c7, 0 @ flush I+D TLBs
|
||||||
mcr p15, 0, r1, c7, c7, 0 @ flush I&D cache
|
mcr p15, 0, r1, c7, c7, 0 @ flush I&D cache
|
||||||
mcr p15, 0, r1, c9, c0, 0 @ invalidate RB
|
mcr p15, 0, r1, c9, c0, 0 @ invalidate RB
|
||||||
mcr p15, 0, r1, c9, c0, 5 @ allow user space to use RB
|
mcr p15, 0, r1, c9, c0, 5 @ allow user space to use RB
|
||||||
|
|
||||||
mcr p15, 0, r4, c3, c0, 0 @ domain ID
|
mcr p15, 0, r4, c3, c0, 0 @ domain ID
|
||||||
mcr p15, 0, r5, c2, c0, 0 @ translation table base addr
|
mcr p15, 0, r5, c2, c0, 0 @ translation table base addr
|
||||||
mcr p15, 0, r6, c13, c0, 0 @ PID
|
mcr p15, 0, r6, c13, c0, 0 @ PID
|
||||||
b resume_turn_on_mmu @ cache align execution
|
b resume_turn_on_mmu @ cache align execution
|
||||||
|
|
||||||
|
@ -209,7 +209,7 @@ sleep_save_sp:
|
||||||
|
|
||||||
.text
|
.text
|
||||||
resume_after_mmu:
|
resume_after_mmu:
|
||||||
mcr p15, 0, r1, c15, c1, 2 @ enable clock switching
|
mcr p15, 0, r1, c15, c1, 2 @ enable clock switching
|
||||||
ldmfd sp!, {r4 - r12, pc} @ return to caller
|
ldmfd sp!, {r4 - r12, pc} @ return to caller
|
||||||
|
|
||||||
|
|
||||||
|
|
|
@ -2,8 +2,8 @@
|
||||||
* linux/arch/arm/mach-sa1100/time.c
|
* linux/arch/arm/mach-sa1100/time.c
|
||||||
*
|
*
|
||||||
* Copyright (C) 1998 Deborah Wallach.
|
* Copyright (C) 1998 Deborah Wallach.
|
||||||
* Twiddles (C) 1999 Hugo Fiennes <hugo@empeg.com>
|
* Twiddles (C) 1999 Hugo Fiennes <hugo@empeg.com>
|
||||||
*
|
*
|
||||||
* 2000/03/29 (C) Nicolas Pitre <nico@cam.org>
|
* 2000/03/29 (C) Nicolas Pitre <nico@cam.org>
|
||||||
* Rewritten: big cleanup, much simpler, better HZ accuracy.
|
* Rewritten: big cleanup, much simpler, better HZ accuracy.
|
||||||
*
|
*
|
||||||
|
|
Loading…
Reference in New Issue