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MLK-24667-2 perf vendor: add bandwidth usage metric for i.MX8QXP DDR Perf 

Add bandwidth usage metric for i.MX8QXP DDR Perf.

Test Report:
----------------------------------------------------
root@imx8qxpmek:~# ./perf list metric

List of pre-defined events (to be used in -e):

Metrics:

  imx8qxp-ddr0-all-r
       [imx8qxp: bytes of all masters read from ddr0]
  imx8qxp-ddr0-all-w
       [imx8qxp: bytes of all masters write to ddr0]
  imx8qxp-ddr0-bandwidth-usage
       [imx8qxp: percentage of bandwidth usage for ddr0]
--------------------------------------------------------
root@imx8qxpmek:~# ./perf stat -a -I 1000 -M imx8qxp-ddr0-bandwidth-usage dd if=/dev/zero of=/dev/null bs=1M count=1000000
     1.000170750             681608      imx8_ddr0/read-cycles/    #     13.6 %  imx8qxp-ddr0-bandwidth-usage
     1.000170750           81013320      imx8_ddr0/write-cycles/
     1.000170750         1000170750 ns   duration_time
     2.000833375             592804      imx8_ddr0/read-cycles/    #     13.7 %  imx8qxp-ddr0-bandwidth-usage
     2.000833375           81756288      imx8_ddr0/write-cycles/
     2.000833375         1000662625 ns   duration_time
     3.001393875             611804      imx8_ddr0/read-cycles/    #     13.6 %  imx8qxp-ddr0-bandwidth-usage
     3.001393875           80897346      imx8_ddr0/write-cycles/
     3.001393875         1000560500 ns   duration_time
     4.001917375             600564      imx8_ddr0/read-cycles/    #     13.5 %  imx8qxp-ddr0-bandwidth-usage
     4.001917375           80269884      imx8_ddr0/write-cycles/
     4.001917375         1000523500 ns   duration_time

Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
5.4-rM2-2.2.x-imx-squashed
Joakim Zhang 2020-09-01 21:18:58 +08:00
parent 90ab99bdd1
commit 93b3f99c40
1 changed files with 9 additions and 0 deletions
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9
tools/perf/pmu-events/arch/arm64/arm/cortex-a35/imx8qxp-ddr-uncore.json
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@ -1,4 +1,13 @@
[
{
"PublicDescription": "lpddr4 mek board bandwidth usage",
"BriefDescription": "imx8qxp: percentage of bandwidth usage for ddr0",
"MetricName": "imx8qxp-ddr0-bandwidth-usage",
"MetricExpr": "(( imx8_ddr0\\/read\\-cycles\\/ + imx8_ddr0\\/write\\-cycles\\/ ) * 4 * 4 / duration_time) / (600 * 1000000 * 4 * 4)",
"MetricGroup": "i.MX8QXP_DDR_MON",
"ScaleUnit": "1e2%",
"SocName": "i.MX8QXP"
},
{
"PublicDescription": "Calculate bytes all masters read from DDR based on read-cycles event. DDR interface generates 2 up and 2 down edges in an internal clock cycle, can pass 4 beats of data. 4 bytes of each beat if DDR burst width is 32 bit.",
"BriefDescription": "imx8qxp: bytes of all masters read from ddr0",