Blackfin arch: do not allow L2 to be cached on BF561 SMP

Signed-off-by: Bryan Wu <cooloney@kernel.org>
This commit is contained in:
Mike Frysinger 2009-01-07 23:14:38 +08:00 committed by Bryan Wu
parent 1ea9925553
commit 94106e0fb6

View file

@ -866,7 +866,7 @@ endchoice
config BFIN_L2_CACHEABLE
bool "Cache L2 SRAM"
depends on (BFIN_DCACHE || BFIN_ICACHE) && (BF54x || BF561)
depends on (BFIN_DCACHE || BFIN_ICACHE) && (BF54x || (BF561 && !SMP))
default n
help
Select to make L2 SRAM cacheable in L1 data and instruction cache.