usb: dwc3: core: introduce dwc3_core_setup_global_control()
This little helper will be used to setup anything related to GCTL register. There are no functional changes, this is a cleanup only patch. Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
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@ -615,49 +615,10 @@ static bool dwc3_core_is_valid(struct dwc3 *dwc)
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return true;
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return true;
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}
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}
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/**
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static void dwc3_core_setup_global_control(struct dwc3 *dwc)
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* dwc3_core_init - Low-level initialization of DWC3 Core
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* @dwc: Pointer to our controller context structure
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*
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* Returns 0 on success otherwise negative errno.
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*/
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static int dwc3_core_init(struct dwc3 *dwc)
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{
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{
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u32 hwparams4 = dwc->hwparams.hwparams4;
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u32 hwparams4 = dwc->hwparams.hwparams4;
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u32 reg;
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u32 reg;
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int ret;
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if (!dwc3_core_is_valid(dwc)) {
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dev_err(dwc->dev, "this is not a DesignWare USB3 DRD Core\n");
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ret = -ENODEV;
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goto err0;
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}
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/*
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* Write Linux Version Code to our GUID register so it's easy to figure
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* out which kernel version a bug was found.
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*/
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dwc3_writel(dwc->regs, DWC3_GUID, LINUX_VERSION_CODE);
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/* Handle USB2.0-only core configuration */
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if (DWC3_GHWPARAMS3_SSPHY_IFC(dwc->hwparams.hwparams3) ==
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DWC3_GHWPARAMS3_SSPHY_IFC_DIS) {
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if (dwc->maximum_speed == USB_SPEED_SUPER)
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dwc->maximum_speed = USB_SPEED_HIGH;
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}
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/* issue device SoftReset too */
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ret = dwc3_soft_reset(dwc);
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if (ret)
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goto err0;
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ret = dwc3_core_soft_reset(dwc);
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if (ret)
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goto err0;
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ret = dwc3_phy_setup(dwc);
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if (ret)
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goto err0;
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reg = dwc3_readl(dwc->regs, DWC3_GCTL);
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reg = dwc3_readl(dwc->regs, DWC3_GCTL);
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reg &= ~DWC3_GCTL_SCALEDOWN_MASK;
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reg &= ~DWC3_GCTL_SCALEDOWN_MASK;
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@ -726,7 +687,52 @@ static int dwc3_core_init(struct dwc3 *dwc)
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reg |= DWC3_GCTL_U2RSTECN;
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reg |= DWC3_GCTL_U2RSTECN;
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dwc3_writel(dwc->regs, DWC3_GCTL, reg);
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dwc3_writel(dwc->regs, DWC3_GCTL, reg);
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}
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/**
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* dwc3_core_init - Low-level initialization of DWC3 Core
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* @dwc: Pointer to our controller context structure
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*
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* Returns 0 on success otherwise negative errno.
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*/
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static int dwc3_core_init(struct dwc3 *dwc)
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{
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u32 reg;
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int ret;
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if (!dwc3_core_is_valid(dwc)) {
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dev_err(dwc->dev, "this is not a DesignWare USB3 DRD Core\n");
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ret = -ENODEV;
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goto err0;
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}
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/*
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* Write Linux Version Code to our GUID register so it's easy to figure
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* out which kernel version a bug was found.
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*/
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dwc3_writel(dwc->regs, DWC3_GUID, LINUX_VERSION_CODE);
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/* Handle USB2.0-only core configuration */
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if (DWC3_GHWPARAMS3_SSPHY_IFC(dwc->hwparams.hwparams3) ==
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DWC3_GHWPARAMS3_SSPHY_IFC_DIS) {
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if (dwc->maximum_speed == USB_SPEED_SUPER)
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dwc->maximum_speed = USB_SPEED_HIGH;
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}
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/* issue device SoftReset too */
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ret = dwc3_soft_reset(dwc);
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if (ret)
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goto err0;
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ret = dwc3_core_soft_reset(dwc);
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if (ret)
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goto err0;
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ret = dwc3_phy_setup(dwc);
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if (ret)
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goto err0;
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dwc3_core_setup_global_control(dwc);
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dwc3_core_num_eps(dwc);
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dwc3_core_num_eps(dwc);
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ret = dwc3_setup_scratch_buffers(dwc);
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ret = dwc3_setup_scratch_buffers(dwc);
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