Merge branch 'topic-arcpgu-v6' of https://github.com/foss-for-synopsys-dwc-arc-processors/linux into drm-next
This is DRM driver for ARC PGU - simple bitstreamer used on Synopsys ARC SDP boards (both AXS101 and AXS103). * 'topic-arcpgu-v6' of https://github.com/foss-for-synopsys-dwc-arc-processors/linux: arc: axs10x - add support of ARC PGU MAINTAINERS: Add maintainer for ARC PGU display controller drm: Add DT bindings documentation for ARC PGU display controller drm: Add support of ARC PGU display controller
This commit is contained in:
commit
944a3f323b
35
Documentation/devicetree/bindings/display/snps,arcpgu.txt
Normal file
35
Documentation/devicetree/bindings/display/snps,arcpgu.txt
Normal file
|
@ -0,0 +1,35 @@
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|||
ARC PGU
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This is a display controller found on several development boards produced
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by Synopsys. The ARC PGU is an RGB streamer that reads the data from a
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framebuffer and sends it to a single digital encoder (usually HDMI).
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Required properties:
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- compatible: "snps,arcpgu"
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- reg: Physical base address and length of the controller's registers.
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- clocks: A list of phandle + clock-specifier pairs, one for each
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entry in 'clock-names'.
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- clock-names: A list of clock names. For ARC PGU it should contain:
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- "pxlclk" for the clock feeding the output PLL of the controller.
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Required sub-nodes:
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- port: The PGU connection to an encoder chip.
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Example:
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/ {
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...
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pgu@XXXXXXXX {
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compatible = "snps,arcpgu";
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reg = <0xXXXXXXXX 0x400>;
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clocks = <&clock_node>;
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clock-names = "pxlclk";
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port {
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pgu_output: endpoint {
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remote-endpoint = <&hdmi_enc_input>;
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};
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};
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};
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};
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@ -847,6 +847,12 @@ S: Maintained
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F: drivers/net/arcnet/
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F: include/uapi/linux/if_arcnet.h
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ARC PGU DRM DRIVER
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M: Alexey Brodkin <abrodkin@synopsys.com>
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S: Supported
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F: drivers/gpu/drm/arc/
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F: Documentation/devicetree/bindings/display/snps,arcpgu.txt
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ARM HDLCD DRM DRIVER
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M: Liviu Dudau <liviu.dudau@arm.com>
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S: Supported
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|
|
|
@ -34,6 +34,12 @@
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clock-frequency = <50000000>;
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#clock-cells = <0>;
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};
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pguclk: pguclk {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <74440000>;
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};
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};
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ethernet@0x18000 {
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|
@ -155,6 +161,37 @@
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clocks = <&i2cclk>;
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interrupts = <16>;
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adv7511:adv7511@39{
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compatible="adi,adv7511";
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reg = <0x39>;
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interrupts = <23>;
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adi,input-depth = <8>;
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adi,input-colorspace = "rgb";
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adi,input-clock = "1x";
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adi,clock-delay = <0x03>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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/* RGB/YUV input */
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port@0 {
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reg = <0>;
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adv7511_input:endpoint {
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remote-endpoint = <&pgu_output>;
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};
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};
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/* HDMI output */
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port@1 {
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reg = <1>;
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adv7511_output: endpoint {
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remote-endpoint = <&hdmi_connector_in>;
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};
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};
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};
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};
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eeprom@0x54{
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compatible = "24c01";
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reg = <0x54>;
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|
@ -168,6 +205,16 @@
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};
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};
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hdmi0: connector {
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compatible = "hdmi-connector";
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type = "a";
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port {
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hdmi_connector_in: endpoint {
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remote-endpoint = <&adv7511_output>;
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};
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};
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};
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gpio0:gpio@13000 {
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compatible = "snps,dw-apb-gpio";
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reg = <0x13000 0x1000>;
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|
@ -229,5 +276,19 @@
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reg = <2>;
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};
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};
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pgu@17000 {
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compatible = "snps,arcpgu";
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reg = <0x17000 0x400>;
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encoder-slave = <&adv7511>;
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clocks = <&pguclk>;
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clock-names = "pxlclk";
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port {
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pgu_output: endpoint {
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remote-endpoint = <&adv7511_input>;
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};
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};
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};
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};
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};
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|
|
|
@ -281,3 +281,5 @@ source "drivers/gpu/drm/imx/Kconfig"
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source "drivers/gpu/drm/vc4/Kconfig"
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source "drivers/gpu/drm/etnaviv/Kconfig"
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source "drivers/gpu/drm/arc/Kconfig"
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|
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|
@ -78,3 +78,4 @@ obj-y += panel/
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obj-y += bridge/
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obj-$(CONFIG_DRM_FSL_DCU) += fsl-dcu/
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obj-$(CONFIG_DRM_ETNAVIV) += etnaviv/
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obj-$(CONFIG_DRM_ARCPGU)+= arc/
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|
|
10
drivers/gpu/drm/arc/Kconfig
Normal file
10
drivers/gpu/drm/arc/Kconfig
Normal file
|
@ -0,0 +1,10 @@
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config DRM_ARCPGU
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tristate "ARC PGU"
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depends on DRM && OF
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select DRM_KMS_CMA_HELPER
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select DRM_KMS_FB_HELPER
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select DRM_KMS_HELPER
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help
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Choose this option if you have an ARC PGU controller.
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If M is selected the module will be called arcpgu.
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2
drivers/gpu/drm/arc/Makefile
Normal file
2
drivers/gpu/drm/arc/Makefile
Normal file
|
@ -0,0 +1,2 @@
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arcpgu-y := arcpgu_crtc.o arcpgu_hdmi.o arcpgu_drv.o
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obj-$(CONFIG_DRM_ARCPGU) += arcpgu.o
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50
drivers/gpu/drm/arc/arcpgu.h
Normal file
50
drivers/gpu/drm/arc/arcpgu.h
Normal file
|
@ -0,0 +1,50 @@
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/*
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* ARC PGU DRM driver.
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*
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* Copyright (C) 2016 Synopsys, Inc. (www.synopsys.com)
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*
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* This program is free software; you can redistribute it and/or modify
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||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
*/
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#ifndef _ARCPGU_H_
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#define _ARCPGU_H_
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struct arcpgu_drm_private {
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void __iomem *regs;
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struct clk *clk;
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struct drm_fbdev_cma *fbdev;
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struct drm_framebuffer *fb;
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struct list_head event_list;
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struct drm_crtc crtc;
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struct drm_plane *plane;
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};
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#define crtc_to_arcpgu_priv(x) container_of(x, struct arcpgu_drm_private, crtc)
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static inline void arc_pgu_write(struct arcpgu_drm_private *arcpgu,
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unsigned int reg, u32 value)
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{
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iowrite32(value, arcpgu->regs + reg);
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}
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static inline u32 arc_pgu_read(struct arcpgu_drm_private *arcpgu,
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unsigned int reg)
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{
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return ioread32(arcpgu->regs + reg);
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}
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int arc_pgu_setup_crtc(struct drm_device *dev);
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int arcpgu_drm_hdmi_init(struct drm_device *drm, struct device_node *np);
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struct drm_fbdev_cma *arcpgu_fbdev_cma_init(struct drm_device *dev,
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unsigned int preferred_bpp, unsigned int num_crtc,
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||||
unsigned int max_conn_count);
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|
||||
#endif
|
257
drivers/gpu/drm/arc/arcpgu_crtc.c
Normal file
257
drivers/gpu/drm/arc/arcpgu_crtc.c
Normal file
|
@ -0,0 +1,257 @@
|
|||
/*
|
||||
* ARC PGU DRM driver.
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||||
*
|
||||
* Copyright (C) 2016 Synopsys, Inc. (www.synopsys.com)
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
*/
|
||||
|
||||
#include <drm/drm_atomic_helper.h>
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#include <drm/drm_crtc_helper.h>
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#include <drm/drm_fb_cma_helper.h>
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||||
#include <drm/drm_gem_cma_helper.h>
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#include <drm/drm_plane_helper.h>
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#include <linux/clk.h>
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#include <linux/platform_data/simplefb.h>
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|
||||
#include "arcpgu.h"
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#include "arcpgu_regs.h"
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|
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#define ENCODE_PGU_XY(x, y) ((((x) - 1) << 16) | ((y) - 1))
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static struct simplefb_format supported_formats[] = {
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{ "r5g6b5", 16, {11, 5}, {5, 6}, {0, 5}, {0, 0}, DRM_FORMAT_RGB565 },
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{ "r8g8b8", 24, {16, 8}, {8, 8}, {0, 8}, {0, 0}, DRM_FORMAT_RGB888 },
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};
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|
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static void arc_pgu_set_pxl_fmt(struct drm_crtc *crtc)
|
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{
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struct arcpgu_drm_private *arcpgu = crtc_to_arcpgu_priv(crtc);
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uint32_t pixel_format = crtc->primary->state->fb->pixel_format;
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struct simplefb_format *format = NULL;
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int i;
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|
||||
for (i = 0; i < ARRAY_SIZE(supported_formats); i++) {
|
||||
if (supported_formats[i].fourcc == pixel_format)
|
||||
format = &supported_formats[i];
|
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}
|
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|
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if (WARN_ON(!format))
|
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return;
|
||||
|
||||
if (format->fourcc == DRM_FORMAT_RGB888)
|
||||
arc_pgu_write(arcpgu, ARCPGU_REG_CTRL,
|
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arc_pgu_read(arcpgu, ARCPGU_REG_CTRL) |
|
||||
ARCPGU_MODE_RGB888_MASK);
|
||||
|
||||
}
|
||||
|
||||
static const struct drm_crtc_funcs arc_pgu_crtc_funcs = {
|
||||
.destroy = drm_crtc_cleanup,
|
||||
.set_config = drm_atomic_helper_set_config,
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.page_flip = drm_atomic_helper_page_flip,
|
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.reset = drm_atomic_helper_crtc_reset,
|
||||
.atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state,
|
||||
.atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
|
||||
};
|
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|
||||
static void arc_pgu_crtc_mode_set_nofb(struct drm_crtc *crtc)
|
||||
{
|
||||
struct arcpgu_drm_private *arcpgu = crtc_to_arcpgu_priv(crtc);
|
||||
struct drm_display_mode *m = &crtc->state->adjusted_mode;
|
||||
u32 val;
|
||||
|
||||
arc_pgu_write(arcpgu, ARCPGU_REG_FMT,
|
||||
ENCODE_PGU_XY(m->crtc_htotal, m->crtc_vtotal));
|
||||
|
||||
arc_pgu_write(arcpgu, ARCPGU_REG_HSYNC,
|
||||
ENCODE_PGU_XY(m->crtc_hsync_start - m->crtc_hdisplay,
|
||||
m->crtc_hsync_end - m->crtc_hdisplay));
|
||||
|
||||
arc_pgu_write(arcpgu, ARCPGU_REG_VSYNC,
|
||||
ENCODE_PGU_XY(m->crtc_vsync_start - m->crtc_vdisplay,
|
||||
m->crtc_vsync_end - m->crtc_vdisplay));
|
||||
|
||||
arc_pgu_write(arcpgu, ARCPGU_REG_ACTIVE,
|
||||
ENCODE_PGU_XY(m->crtc_hblank_end - m->crtc_hblank_start,
|
||||
m->crtc_vblank_end - m->crtc_vblank_start));
|
||||
|
||||
val = arc_pgu_read(arcpgu, ARCPGU_REG_CTRL);
|
||||
|
||||
if (m->flags & DRM_MODE_FLAG_PVSYNC)
|
||||
val |= ARCPGU_CTRL_VS_POL_MASK << ARCPGU_CTRL_VS_POL_OFST;
|
||||
else
|
||||
val &= ~(ARCPGU_CTRL_VS_POL_MASK << ARCPGU_CTRL_VS_POL_OFST);
|
||||
|
||||
if (m->flags & DRM_MODE_FLAG_PHSYNC)
|
||||
val |= ARCPGU_CTRL_HS_POL_MASK << ARCPGU_CTRL_HS_POL_OFST;
|
||||
else
|
||||
val &= ~(ARCPGU_CTRL_HS_POL_MASK << ARCPGU_CTRL_HS_POL_OFST);
|
||||
|
||||
arc_pgu_write(arcpgu, ARCPGU_REG_CTRL, val);
|
||||
arc_pgu_write(arcpgu, ARCPGU_REG_STRIDE, 0);
|
||||
arc_pgu_write(arcpgu, ARCPGU_REG_START_SET, 1);
|
||||
|
||||
arc_pgu_set_pxl_fmt(crtc);
|
||||
|
||||
clk_set_rate(arcpgu->clk, m->crtc_clock * 1000);
|
||||
}
|
||||
|
||||
static void arc_pgu_crtc_enable(struct drm_crtc *crtc)
|
||||
{
|
||||
struct arcpgu_drm_private *arcpgu = crtc_to_arcpgu_priv(crtc);
|
||||
|
||||
clk_prepare_enable(arcpgu->clk);
|
||||
arc_pgu_write(arcpgu, ARCPGU_REG_CTRL,
|
||||
arc_pgu_read(arcpgu, ARCPGU_REG_CTRL) |
|
||||
ARCPGU_CTRL_ENABLE_MASK);
|
||||
}
|
||||
|
||||
static void arc_pgu_crtc_disable(struct drm_crtc *crtc)
|
||||
{
|
||||
struct arcpgu_drm_private *arcpgu = crtc_to_arcpgu_priv(crtc);
|
||||
|
||||
if (!crtc->primary->fb)
|
||||
return;
|
||||
|
||||
clk_disable_unprepare(arcpgu->clk);
|
||||
arc_pgu_write(arcpgu, ARCPGU_REG_CTRL,
|
||||
arc_pgu_read(arcpgu, ARCPGU_REG_CTRL) &
|
||||
~ARCPGU_CTRL_ENABLE_MASK);
|
||||
}
|
||||
|
||||
static int arc_pgu_crtc_atomic_check(struct drm_crtc *crtc,
|
||||
struct drm_crtc_state *state)
|
||||
{
|
||||
struct arcpgu_drm_private *arcpgu = crtc_to_arcpgu_priv(crtc);
|
||||
struct drm_display_mode *mode = &state->adjusted_mode;
|
||||
long rate, clk_rate = mode->clock * 1000;
|
||||
|
||||
rate = clk_round_rate(arcpgu->clk, clk_rate);
|
||||
if (rate != clk_rate)
|
||||
return -EINVAL;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void arc_pgu_crtc_atomic_begin(struct drm_crtc *crtc,
|
||||
struct drm_crtc_state *state)
|
||||
{
|
||||
struct arcpgu_drm_private *arcpgu = crtc_to_arcpgu_priv(crtc);
|
||||
unsigned long flags;
|
||||
|
||||
if (crtc->state->event) {
|
||||
struct drm_pending_vblank_event *event = crtc->state->event;
|
||||
|
||||
crtc->state->event = NULL;
|
||||
event->pipe = drm_crtc_index(crtc);
|
||||
|
||||
WARN_ON(drm_crtc_vblank_get(crtc) != 0);
|
||||
|
||||
spin_lock_irqsave(&crtc->dev->event_lock, flags);
|
||||
list_add_tail(&event->base.link, &arcpgu->event_list);
|
||||
spin_unlock_irqrestore(&crtc->dev->event_lock, flags);
|
||||
}
|
||||
}
|
||||
|
||||
static const struct drm_crtc_helper_funcs arc_pgu_crtc_helper_funcs = {
|
||||
.mode_set = drm_helper_crtc_mode_set,
|
||||
.mode_set_base = drm_helper_crtc_mode_set_base,
|
||||
.mode_set_nofb = arc_pgu_crtc_mode_set_nofb,
|
||||
.enable = arc_pgu_crtc_enable,
|
||||
.disable = arc_pgu_crtc_disable,
|
||||
.prepare = arc_pgu_crtc_disable,
|
||||
.commit = arc_pgu_crtc_enable,
|
||||
.atomic_check = arc_pgu_crtc_atomic_check,
|
||||
.atomic_begin = arc_pgu_crtc_atomic_begin,
|
||||
};
|
||||
|
||||
static void arc_pgu_plane_atomic_update(struct drm_plane *plane,
|
||||
struct drm_plane_state *state)
|
||||
{
|
||||
struct arcpgu_drm_private *arcpgu;
|
||||
struct drm_gem_cma_object *gem;
|
||||
|
||||
if (!plane->state->crtc || !plane->state->fb)
|
||||
return;
|
||||
|
||||
arcpgu = crtc_to_arcpgu_priv(plane->state->crtc);
|
||||
gem = drm_fb_cma_get_gem_obj(plane->state->fb, 0);
|
||||
arc_pgu_write(arcpgu, ARCPGU_REG_BUF0_ADDR, gem->paddr);
|
||||
}
|
||||
|
||||
static const struct drm_plane_helper_funcs arc_pgu_plane_helper_funcs = {
|
||||
.prepare_fb = NULL,
|
||||
.cleanup_fb = NULL,
|
||||
.atomic_update = arc_pgu_plane_atomic_update,
|
||||
};
|
||||
|
||||
static void arc_pgu_plane_destroy(struct drm_plane *plane)
|
||||
{
|
||||
drm_plane_helper_disable(plane);
|
||||
drm_plane_cleanup(plane);
|
||||
}
|
||||
|
||||
static const struct drm_plane_funcs arc_pgu_plane_funcs = {
|
||||
.update_plane = drm_atomic_helper_update_plane,
|
||||
.disable_plane = drm_atomic_helper_disable_plane,
|
||||
.destroy = arc_pgu_plane_destroy,
|
||||
.reset = drm_atomic_helper_plane_reset,
|
||||
.atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
|
||||
.atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
|
||||
};
|
||||
|
||||
static struct drm_plane *arc_pgu_plane_init(struct drm_device *drm)
|
||||
{
|
||||
struct arcpgu_drm_private *arcpgu = drm->dev_private;
|
||||
struct drm_plane *plane = NULL;
|
||||
u32 formats[ARRAY_SIZE(supported_formats)], i;
|
||||
int ret;
|
||||
|
||||
plane = devm_kzalloc(drm->dev, sizeof(*plane), GFP_KERNEL);
|
||||
if (!plane)
|
||||
return ERR_PTR(-ENOMEM);
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(supported_formats); i++)
|
||||
formats[i] = supported_formats[i].fourcc;
|
||||
|
||||
ret = drm_universal_plane_init(drm, plane, 0xff, &arc_pgu_plane_funcs,
|
||||
formats, ARRAY_SIZE(formats),
|
||||
DRM_PLANE_TYPE_PRIMARY, NULL);
|
||||
if (ret)
|
||||
return ERR_PTR(ret);
|
||||
|
||||
drm_plane_helper_add(plane, &arc_pgu_plane_helper_funcs);
|
||||
arcpgu->plane = plane;
|
||||
|
||||
return plane;
|
||||
}
|
||||
|
||||
int arc_pgu_setup_crtc(struct drm_device *drm)
|
||||
{
|
||||
struct arcpgu_drm_private *arcpgu = drm->dev_private;
|
||||
struct drm_plane *primary;
|
||||
int ret;
|
||||
|
||||
primary = arc_pgu_plane_init(drm);
|
||||
if (IS_ERR(primary))
|
||||
return PTR_ERR(primary);
|
||||
|
||||
ret = drm_crtc_init_with_planes(drm, &arcpgu->crtc, primary, NULL,
|
||||
&arc_pgu_crtc_funcs, NULL);
|
||||
if (ret) {
|
||||
arc_pgu_plane_destroy(primary);
|
||||
return ret;
|
||||
}
|
||||
|
||||
drm_crtc_helper_add(&arcpgu->crtc, &arc_pgu_crtc_helper_funcs);
|
||||
return 0;
|
||||
}
|
282
drivers/gpu/drm/arc/arcpgu_drv.c
Normal file
282
drivers/gpu/drm/arc/arcpgu_drv.c
Normal file
|
@ -0,0 +1,282 @@
|
|||
/*
|
||||
* ARC PGU DRM driver.
|
||||
*
|
||||
* Copyright (C) 2016 Synopsys, Inc. (www.synopsys.com)
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
*/
|
||||
|
||||
#include <linux/clk.h>
|
||||
#include <drm/drm_crtc_helper.h>
|
||||
#include <drm/drm_fb_cma_helper.h>
|
||||
#include <drm/drm_gem_cma_helper.h>
|
||||
#include <drm/drm_atomic_helper.h>
|
||||
|
||||
#include "arcpgu.h"
|
||||
#include "arcpgu_regs.h"
|
||||
|
||||
static void arcpgu_fb_output_poll_changed(struct drm_device *dev)
|
||||
{
|
||||
struct arcpgu_drm_private *arcpgu = dev->dev_private;
|
||||
|
||||
if (arcpgu->fbdev)
|
||||
drm_fbdev_cma_hotplug_event(arcpgu->fbdev);
|
||||
}
|
||||
|
||||
static int arcpgu_atomic_commit(struct drm_device *dev,
|
||||
struct drm_atomic_state *state, bool async)
|
||||
{
|
||||
return drm_atomic_helper_commit(dev, state, false);
|
||||
}
|
||||
|
||||
static struct drm_mode_config_funcs arcpgu_drm_modecfg_funcs = {
|
||||
.fb_create = drm_fb_cma_create,
|
||||
.output_poll_changed = arcpgu_fb_output_poll_changed,
|
||||
.atomic_check = drm_atomic_helper_check,
|
||||
.atomic_commit = arcpgu_atomic_commit,
|
||||
};
|
||||
|
||||
static void arcpgu_setup_mode_config(struct drm_device *drm)
|
||||
{
|
||||
drm_mode_config_init(drm);
|
||||
drm->mode_config.min_width = 0;
|
||||
drm->mode_config.min_height = 0;
|
||||
drm->mode_config.max_width = 1920;
|
||||
drm->mode_config.max_height = 1080;
|
||||
drm->mode_config.funcs = &arcpgu_drm_modecfg_funcs;
|
||||
}
|
||||
|
||||
int arcpgu_gem_mmap(struct file *filp, struct vm_area_struct *vma)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = drm_gem_mmap(filp, vma);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
vma->vm_page_prot = pgprot_noncached(vm_get_page_prot(vma->vm_flags));
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct file_operations arcpgu_drm_ops = {
|
||||
.owner = THIS_MODULE,
|
||||
.open = drm_open,
|
||||
.release = drm_release,
|
||||
.unlocked_ioctl = drm_ioctl,
|
||||
#ifdef CONFIG_COMPAT
|
||||
.compat_ioctl = drm_compat_ioctl,
|
||||
#endif
|
||||
.poll = drm_poll,
|
||||
.read = drm_read,
|
||||
.llseek = no_llseek,
|
||||
.mmap = arcpgu_gem_mmap,
|
||||
};
|
||||
|
||||
static void arcpgu_preclose(struct drm_device *drm, struct drm_file *file)
|
||||
{
|
||||
struct arcpgu_drm_private *arcpgu = drm->dev_private;
|
||||
struct drm_pending_vblank_event *e, *t;
|
||||
unsigned long flags;
|
||||
|
||||
spin_lock_irqsave(&drm->event_lock, flags);
|
||||
list_for_each_entry_safe(e, t, &arcpgu->event_list, base.link) {
|
||||
if (e->base.file_priv != file)
|
||||
continue;
|
||||
list_del(&e->base.link);
|
||||
e->base.destroy(&e->base);
|
||||
}
|
||||
spin_unlock_irqrestore(&drm->event_lock, flags);
|
||||
}
|
||||
|
||||
static void arcpgu_lastclose(struct drm_device *drm)
|
||||
{
|
||||
struct arcpgu_drm_private *arcpgu = drm->dev_private;
|
||||
|
||||
drm_fbdev_cma_restore_mode(arcpgu->fbdev);
|
||||
}
|
||||
|
||||
static int arcpgu_load(struct drm_device *drm)
|
||||
{
|
||||
struct platform_device *pdev = to_platform_device(drm->dev);
|
||||
struct arcpgu_drm_private *arcpgu;
|
||||
struct device_node *encoder_node;
|
||||
struct resource *res;
|
||||
int ret;
|
||||
|
||||
arcpgu = devm_kzalloc(&pdev->dev, sizeof(*arcpgu), GFP_KERNEL);
|
||||
if (arcpgu == NULL)
|
||||
return -ENOMEM;
|
||||
|
||||
drm->dev_private = arcpgu;
|
||||
|
||||
arcpgu->clk = devm_clk_get(drm->dev, "pxlclk");
|
||||
if (IS_ERR(arcpgu->clk))
|
||||
return PTR_ERR(arcpgu->clk);
|
||||
|
||||
INIT_LIST_HEAD(&arcpgu->event_list);
|
||||
|
||||
arcpgu_setup_mode_config(drm);
|
||||
|
||||
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
arcpgu->regs = devm_ioremap_resource(&pdev->dev, res);
|
||||
if (IS_ERR(arcpgu->regs)) {
|
||||
dev_err(drm->dev, "Could not remap IO mem\n");
|
||||
return PTR_ERR(arcpgu->regs);
|
||||
}
|
||||
|
||||
dev_info(drm->dev, "arc_pgu ID: 0x%x\n",
|
||||
arc_pgu_read(arcpgu, ARCPGU_REG_ID));
|
||||
|
||||
if (dma_set_mask_and_coherent(drm->dev, DMA_BIT_MASK(32)))
|
||||
return -ENODEV;
|
||||
|
||||
if (arc_pgu_setup_crtc(drm) < 0)
|
||||
return -ENODEV;
|
||||
|
||||
/* find the encoder node and initialize it */
|
||||
encoder_node = of_parse_phandle(drm->dev->of_node, "encoder-slave", 0);
|
||||
if (!encoder_node) {
|
||||
dev_err(drm->dev, "failed to get an encoder slave node\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
ret = arcpgu_drm_hdmi_init(drm, encoder_node);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
drm_mode_config_reset(drm);
|
||||
drm_kms_helper_poll_init(drm);
|
||||
|
||||
arcpgu->fbdev = drm_fbdev_cma_init(drm, 16,
|
||||
drm->mode_config.num_crtc,
|
||||
drm->mode_config.num_connector);
|
||||
if (IS_ERR(arcpgu->fbdev)) {
|
||||
ret = PTR_ERR(arcpgu->fbdev);
|
||||
arcpgu->fbdev = NULL;
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
platform_set_drvdata(pdev, arcpgu);
|
||||
return 0;
|
||||
}
|
||||
|
||||
int arcpgu_unload(struct drm_device *drm)
|
||||
{
|
||||
struct arcpgu_drm_private *arcpgu = drm->dev_private;
|
||||
|
||||
if (arcpgu->fbdev) {
|
||||
drm_fbdev_cma_fini(arcpgu->fbdev);
|
||||
arcpgu->fbdev = NULL;
|
||||
}
|
||||
drm_kms_helper_poll_fini(drm);
|
||||
drm_vblank_cleanup(drm);
|
||||
drm_mode_config_cleanup(drm);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct drm_driver arcpgu_drm_driver = {
|
||||
.driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME |
|
||||
DRIVER_ATOMIC,
|
||||
.preclose = arcpgu_preclose,
|
||||
.lastclose = arcpgu_lastclose,
|
||||
.name = "drm-arcpgu",
|
||||
.desc = "ARC PGU Controller",
|
||||
.date = "20160219",
|
||||
.major = 1,
|
||||
.minor = 0,
|
||||
.patchlevel = 0,
|
||||
.fops = &arcpgu_drm_ops,
|
||||
.dumb_create = drm_gem_cma_dumb_create,
|
||||
.dumb_map_offset = drm_gem_cma_dumb_map_offset,
|
||||
.dumb_destroy = drm_gem_dumb_destroy,
|
||||
.get_vblank_counter = drm_vblank_no_hw_counter,
|
||||
.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
|
||||
.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
|
||||
.gem_free_object = drm_gem_cma_free_object,
|
||||
.gem_vm_ops = &drm_gem_cma_vm_ops,
|
||||
.gem_prime_export = drm_gem_prime_export,
|
||||
.gem_prime_import = drm_gem_prime_import,
|
||||
.gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table,
|
||||
.gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table,
|
||||
.gem_prime_vmap = drm_gem_cma_prime_vmap,
|
||||
.gem_prime_vunmap = drm_gem_cma_prime_vunmap,
|
||||
.gem_prime_mmap = drm_gem_cma_prime_mmap,
|
||||
};
|
||||
|
||||
static int arcpgu_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct drm_device *drm;
|
||||
int ret;
|
||||
|
||||
drm = drm_dev_alloc(&arcpgu_drm_driver, &pdev->dev);
|
||||
if (!drm)
|
||||
return -ENOMEM;
|
||||
|
||||
ret = arcpgu_load(drm);
|
||||
if (ret)
|
||||
goto err_unref;
|
||||
|
||||
ret = drm_dev_register(drm, 0);
|
||||
if (ret)
|
||||
goto err_unload;
|
||||
|
||||
ret = drm_connector_register_all(drm);
|
||||
if (ret)
|
||||
goto err_unregister;
|
||||
|
||||
return 0;
|
||||
|
||||
err_unregister:
|
||||
drm_dev_unregister(drm);
|
||||
|
||||
err_unload:
|
||||
arcpgu_unload(drm);
|
||||
|
||||
err_unref:
|
||||
drm_dev_unref(drm);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int arcpgu_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct drm_device *drm = platform_get_drvdata(pdev);
|
||||
|
||||
drm_connector_unregister_all(drm);
|
||||
drm_dev_unregister(drm);
|
||||
arcpgu_unload(drm);
|
||||
drm_dev_unref(drm);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct of_device_id arcpgu_of_table[] = {
|
||||
{.compatible = "snps,arcpgu"},
|
||||
{}
|
||||
};
|
||||
|
||||
MODULE_DEVICE_TABLE(of, arcpgu_of_table);
|
||||
|
||||
static struct platform_driver arcpgu_platform_driver = {
|
||||
.probe = arcpgu_probe,
|
||||
.remove = arcpgu_remove,
|
||||
.driver = {
|
||||
.name = "arcpgu",
|
||||
.of_match_table = arcpgu_of_table,
|
||||
},
|
||||
};
|
||||
|
||||
module_platform_driver(arcpgu_platform_driver);
|
||||
|
||||
MODULE_AUTHOR("Carlos Palminha <palminha@synopsys.com>");
|
||||
MODULE_DESCRIPTION("ARC PGU DRM driver");
|
||||
MODULE_LICENSE("GPL");
|
201
drivers/gpu/drm/arc/arcpgu_hdmi.c
Normal file
201
drivers/gpu/drm/arc/arcpgu_hdmi.c
Normal file
|
@ -0,0 +1,201 @@
|
|||
/*
|
||||
* ARC PGU DRM driver.
|
||||
*
|
||||
* Copyright (C) 2016 Synopsys, Inc. (www.synopsys.com)
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
*/
|
||||
|
||||
#include <drm/drm_crtc_helper.h>
|
||||
#include <drm/drm_encoder_slave.h>
|
||||
#include <drm/drm_atomic_helper.h>
|
||||
|
||||
#include "arcpgu.h"
|
||||
|
||||
struct arcpgu_drm_connector {
|
||||
struct drm_connector connector;
|
||||
struct drm_encoder_slave *encoder_slave;
|
||||
};
|
||||
|
||||
static int arcpgu_drm_connector_get_modes(struct drm_connector *connector)
|
||||
{
|
||||
const struct drm_encoder_slave_funcs *sfuncs;
|
||||
struct drm_encoder_slave *slave;
|
||||
struct arcpgu_drm_connector *con =
|
||||
container_of(connector, struct arcpgu_drm_connector, connector);
|
||||
|
||||
slave = con->encoder_slave;
|
||||
if (slave == NULL) {
|
||||
dev_err(connector->dev->dev,
|
||||
"connector_get_modes: cannot find slave encoder for connector\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
sfuncs = slave->slave_funcs;
|
||||
if (sfuncs->get_modes == NULL)
|
||||
return 0;
|
||||
|
||||
return sfuncs->get_modes(&slave->base, connector);
|
||||
}
|
||||
|
||||
struct drm_encoder *
|
||||
arcpgu_drm_connector_best_encoder(struct drm_connector *connector)
|
||||
{
|
||||
struct drm_encoder_slave *slave;
|
||||
struct arcpgu_drm_connector *con =
|
||||
container_of(connector, struct arcpgu_drm_connector, connector);
|
||||
|
||||
slave = con->encoder_slave;
|
||||
if (slave == NULL) {
|
||||
dev_err(connector->dev->dev,
|
||||
"connector_best_encoder: cannot find slave encoder for connector\n");
|
||||
return NULL;
|
||||
}
|
||||
|
||||
return &slave->base;
|
||||
}
|
||||
|
||||
static enum drm_connector_status
|
||||
arcpgu_drm_connector_detect(struct drm_connector *connector, bool force)
|
||||
{
|
||||
enum drm_connector_status status = connector_status_unknown;
|
||||
const struct drm_encoder_slave_funcs *sfuncs;
|
||||
struct drm_encoder_slave *slave;
|
||||
|
||||
struct arcpgu_drm_connector *con =
|
||||
container_of(connector, struct arcpgu_drm_connector, connector);
|
||||
|
||||
slave = con->encoder_slave;
|
||||
if (slave == NULL) {
|
||||
dev_err(connector->dev->dev,
|
||||
"connector_detect: cannot find slave encoder for connector\n");
|
||||
return status;
|
||||
}
|
||||
|
||||
sfuncs = slave->slave_funcs;
|
||||
if (sfuncs && sfuncs->detect)
|
||||
return sfuncs->detect(&slave->base, connector);
|
||||
|
||||
dev_err(connector->dev->dev, "connector_detect: could not detect slave funcs\n");
|
||||
return status;
|
||||
}
|
||||
|
||||
static void arcpgu_drm_connector_destroy(struct drm_connector *connector)
|
||||
{
|
||||
drm_connector_unregister(connector);
|
||||
drm_connector_cleanup(connector);
|
||||
}
|
||||
|
||||
static const struct drm_connector_helper_funcs
|
||||
arcpgu_drm_connector_helper_funcs = {
|
||||
.get_modes = arcpgu_drm_connector_get_modes,
|
||||
.best_encoder = arcpgu_drm_connector_best_encoder,
|
||||
};
|
||||
|
||||
static const struct drm_connector_funcs arcpgu_drm_connector_funcs = {
|
||||
.dpms = drm_helper_connector_dpms,
|
||||
.reset = drm_atomic_helper_connector_reset,
|
||||
.detect = arcpgu_drm_connector_detect,
|
||||
.fill_modes = drm_helper_probe_single_connector_modes,
|
||||
.destroy = arcpgu_drm_connector_destroy,
|
||||
.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
|
||||
.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
|
||||
};
|
||||
|
||||
static struct drm_encoder_helper_funcs arcpgu_drm_encoder_helper_funcs = {
|
||||
.dpms = drm_i2c_encoder_dpms,
|
||||
.mode_fixup = drm_i2c_encoder_mode_fixup,
|
||||
.mode_set = drm_i2c_encoder_mode_set,
|
||||
.prepare = drm_i2c_encoder_prepare,
|
||||
.commit = drm_i2c_encoder_commit,
|
||||
.detect = drm_i2c_encoder_detect,
|
||||
};
|
||||
|
||||
static struct drm_encoder_funcs arcpgu_drm_encoder_funcs = {
|
||||
.destroy = drm_encoder_cleanup,
|
||||
};
|
||||
|
||||
int arcpgu_drm_hdmi_init(struct drm_device *drm, struct device_node *np)
|
||||
{
|
||||
struct arcpgu_drm_connector *arcpgu_connector;
|
||||
struct drm_i2c_encoder_driver *driver;
|
||||
struct drm_encoder_slave *encoder;
|
||||
struct drm_connector *connector;
|
||||
struct i2c_client *i2c_slave;
|
||||
int ret;
|
||||
|
||||
encoder = devm_kzalloc(drm->dev, sizeof(*encoder), GFP_KERNEL);
|
||||
if (encoder == NULL)
|
||||
return -ENOMEM;
|
||||
|
||||
i2c_slave = of_find_i2c_device_by_node(np);
|
||||
if (!i2c_slave || !i2c_get_clientdata(i2c_slave)) {
|
||||
dev_err(drm->dev, "failed to find i2c slave encoder\n");
|
||||
return -EPROBE_DEFER;
|
||||
}
|
||||
|
||||
if (i2c_slave->dev.driver == NULL) {
|
||||
dev_err(drm->dev, "failed to find i2c slave driver\n");
|
||||
return -EPROBE_DEFER;
|
||||
}
|
||||
|
||||
driver =
|
||||
to_drm_i2c_encoder_driver(to_i2c_driver(i2c_slave->dev.driver));
|
||||
ret = driver->encoder_init(i2c_slave, drm, encoder);
|
||||
if (ret) {
|
||||
dev_err(drm->dev, "failed to initialize i2c encoder slave\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
encoder->base.possible_crtcs = 1;
|
||||
encoder->base.possible_clones = 0;
|
||||
ret = drm_encoder_init(drm, &encoder->base, &arcpgu_drm_encoder_funcs,
|
||||
DRM_MODE_ENCODER_TMDS, NULL);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
drm_encoder_helper_add(&encoder->base,
|
||||
&arcpgu_drm_encoder_helper_funcs);
|
||||
|
||||
arcpgu_connector = devm_kzalloc(drm->dev, sizeof(*arcpgu_connector),
|
||||
GFP_KERNEL);
|
||||
if (!arcpgu_connector) {
|
||||
ret = -ENOMEM;
|
||||
goto error_encoder_cleanup;
|
||||
}
|
||||
|
||||
connector = &arcpgu_connector->connector;
|
||||
drm_connector_helper_add(connector, &arcpgu_drm_connector_helper_funcs);
|
||||
ret = drm_connector_init(drm, connector, &arcpgu_drm_connector_funcs,
|
||||
DRM_MODE_CONNECTOR_HDMIA);
|
||||
if (ret < 0) {
|
||||
dev_err(drm->dev, "failed to initialize drm connector\n");
|
||||
goto error_encoder_cleanup;
|
||||
}
|
||||
|
||||
ret = drm_mode_connector_attach_encoder(connector, &encoder->base);
|
||||
if (ret < 0) {
|
||||
dev_err(drm->dev, "could not attach connector to encoder\n");
|
||||
drm_connector_unregister(connector);
|
||||
goto error_connector_cleanup;
|
||||
}
|
||||
|
||||
arcpgu_connector->encoder_slave = encoder;
|
||||
|
||||
return 0;
|
||||
|
||||
error_connector_cleanup:
|
||||
drm_connector_cleanup(connector);
|
||||
|
||||
error_encoder_cleanup:
|
||||
drm_encoder_cleanup(&encoder->base);
|
||||
return ret;
|
||||
}
|
40
drivers/gpu/drm/arc/arcpgu_regs.h
Normal file
40
drivers/gpu/drm/arc/arcpgu_regs.h
Normal file
|
@ -0,0 +1,40 @@
|
|||
/*
|
||||
* ARC PGU DRM driver.
|
||||
*
|
||||
* Copyright (C) 2016 Synopsys, Inc. (www.synopsys.com)
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _ARC_PGU_REGS_H_
|
||||
#define _ARC_PGU_REGS_H_
|
||||
|
||||
#define ARCPGU_REG_CTRL 0x00
|
||||
#define ARCPGU_REG_STAT 0x04
|
||||
#define ARCPGU_REG_FMT 0x10
|
||||
#define ARCPGU_REG_HSYNC 0x14
|
||||
#define ARCPGU_REG_VSYNC 0x18
|
||||
#define ARCPGU_REG_ACTIVE 0x1c
|
||||
#define ARCPGU_REG_BUF0_ADDR 0x40
|
||||
#define ARCPGU_REG_STRIDE 0x50
|
||||
#define ARCPGU_REG_START_SET 0x84
|
||||
|
||||
#define ARCPGU_REG_ID 0x3FC
|
||||
|
||||
#define ARCPGU_CTRL_ENABLE_MASK 0x02
|
||||
#define ARCPGU_CTRL_VS_POL_MASK 0x1
|
||||
#define ARCPGU_CTRL_VS_POL_OFST 0x3
|
||||
#define ARCPGU_CTRL_HS_POL_MASK 0x1
|
||||
#define ARCPGU_CTRL_HS_POL_OFST 0x4
|
||||
#define ARCPGU_MODE_RGB888_MASK 0x04
|
||||
#define ARCPGU_STAT_BUSY_MASK 0x02
|
||||
|
||||
#endif
|
Loading…
Reference in a new issue