drm/rockchip: vop: move write_relaxed flags to vop register
Since the drm atomic framework, only a small part of the vop register needs sync write, Currently seems only following registers need sync write: cfg_done, standby and interrupt related register. All ctrl registers are using the sync write method that is inefficient, hardcode the write_relaxed flags to vop registers, then can only do synchronize write for those actual needed register. Signed-off-by: Mark Yao <mark.yao@rock-chips.com> Tested-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Jeffy Chen <jeffy.chen@rock-chips.com> Link: https://patchwork.freedesktop.org/patch/msgid/1501049953-5946-1-git-send-email-mark.yao@rock-chips.comhifive-unleashed-5.1
Mark yao
Mark Yao
parent
60b7ae7fa2
commit
9548e1b49a
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@ -42,33 +42,27 @@
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#include "rockchip_drm_psr.h"
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#include "rockchip_drm_vop.h"
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#define __REG_SET_RELAXED(x, off, mask, shift, v, write_mask) \
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vop_mask_write(x, off, mask, shift, v, write_mask, true)
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#define __REG_SET_NORMAL(x, off, mask, shift, v, write_mask) \
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vop_mask_write(x, off, mask, shift, v, write_mask, false)
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#define REG_SET(x, base, reg, v, mode) \
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__REG_SET_##mode(x, base + reg.offset, \
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reg.mask, reg.shift, v, reg.write_mask)
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#define REG_SET_MASK(x, base, reg, mask, v, mode) \
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__REG_SET_##mode(x, base + reg.offset, \
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mask, reg.shift, v, reg.write_mask)
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#define REG_SET(x, base, reg, v) \
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vop_mask_write(x, base + reg.offset, reg.mask, reg.shift, \
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v, reg.write_mask, reg.relaxed)
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#define REG_SET_MASK(x, base, reg, mask, v) \
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vop_mask_write(x, base + reg.offset, \
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mask, reg.shift, v, reg.write_mask, reg.relaxed)
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#define VOP_WIN_SET(x, win, name, v) \
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REG_SET(x, win->base, win->phy->name, v, RELAXED)
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REG_SET(x, win->base, win->phy->name, v)
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#define VOP_SCL_SET(x, win, name, v) \
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REG_SET(x, win->base, win->phy->scl->name, v, RELAXED)
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REG_SET(x, win->base, win->phy->scl->name, v)
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#define VOP_SCL_SET_EXT(x, win, name, v) \
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REG_SET(x, win->base, win->phy->scl->ext->name, v, RELAXED)
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REG_SET(x, win->base, win->phy->scl->ext->name, v)
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#define VOP_CTRL_SET(x, name, v) \
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REG_SET(x, 0, (x)->data->ctrl->name, v, NORMAL)
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REG_SET(x, 0, (x)->data->ctrl->name, v)
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#define VOP_INTR_GET(vop, name) \
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vop_read_reg(vop, 0, &vop->data->ctrl->name)
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#define VOP_INTR_SET(vop, name, mask, v) \
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REG_SET_MASK(vop, 0, vop->data->intr->name, mask, v, NORMAL)
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REG_SET_MASK(vop, 0, vop->data->intr->name, mask, v)
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#define VOP_INTR_SET_TYPE(vop, name, type, v) \
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do { \
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int i, reg = 0, mask = 0; \
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@ -29,6 +29,7 @@ struct vop_reg {
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uint32_t shift;
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uint32_t mask;
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bool write_mask;
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bool relaxed;
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};
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struct vop_ctrl {
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@ -20,17 +20,23 @@
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#include "rockchip_drm_vop.h"
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#include "rockchip_vop_reg.h"
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#define VOP_REG(off, _mask, s) \
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{.offset = off, \
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#define _VOP_REG(off, _mask, _shift, _write_mask, _relaxed) \
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{ \
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.offset = off, \
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.mask = _mask, \
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.shift = s, \
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.write_mask = false,}
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.shift = _shift, \
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.write_mask = _write_mask, \
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.relaxed = _relaxed, \
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}
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#define VOP_REG_MASK(off, _mask, s) \
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{.offset = off, \
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.mask = _mask, \
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.shift = s, \
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.write_mask = true,}
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#define VOP_REG(off, _mask, _shift) \
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_VOP_REG(off, _mask, _shift, false, true)
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#define VOP_REG_SYNC(off, _mask, _shift) \
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_VOP_REG(off, _mask, _shift, false, false)
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#define VOP_REG_MASK_SYNC(off, _mask, _shift) \
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_VOP_REG(off, _mask, _shift, true, false)
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static const uint32_t formats_win_full[] = {
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DRM_FORMAT_XRGB8888,
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@ -116,7 +122,7 @@ static const struct vop_intr rk3036_intr = {
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};
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static const struct vop_ctrl rk3036_ctrl_data = {
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.standby = VOP_REG(RK3036_SYS_CTRL, 0x1, 30),
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.standby = VOP_REG_SYNC(RK3036_SYS_CTRL, 0x1, 30),
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.out_mode = VOP_REG(RK3036_DSP_CTRL0, 0xf, 0),
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.pin_pol = VOP_REG(RK3036_DSP_CTRL0, 0xf, 4),
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.dsp_blank = VOP_REG(RK3036_DSP_CTRL1, 0x1, 24),
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@ -125,7 +131,7 @@ static const struct vop_ctrl rk3036_ctrl_data = {
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.vtotal_pw = VOP_REG(RK3036_DSP_VTOTAL_VS_END, 0x1fff1fff, 0),
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.vact_st_end = VOP_REG(RK3036_DSP_VACT_ST_END, 0x1fff1fff, 0),
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.line_flag_num[0] = VOP_REG(RK3036_INT_STATUS, 0xfff, 12),
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.cfg_done = VOP_REG(RK3036_REG_CFG_DONE, 0x1, 0),
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.cfg_done = VOP_REG_SYNC(RK3036_REG_CFG_DONE, 0x1, 0),
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};
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static const struct vop_data rk3036_vop = {
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@ -201,7 +207,7 @@ static const struct vop_win_phy rk3288_win23_data = {
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};
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static const struct vop_ctrl rk3288_ctrl_data = {
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.standby = VOP_REG(RK3288_SYS_CTRL, 0x1, 22),
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.standby = VOP_REG_SYNC(RK3288_SYS_CTRL, 0x1, 22),
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.gate_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 23),
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.mmu_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 20),
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.rgb_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 12),
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@ -222,7 +228,7 @@ static const struct vop_ctrl rk3288_ctrl_data = {
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.vpost_st_end = VOP_REG(RK3288_POST_DSP_VACT_INFO, 0x1fff1fff, 0),
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.line_flag_num[0] = VOP_REG(RK3288_INTR_CTRL0, 0x1fff, 12),
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.global_regdone_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 11),
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.cfg_done = VOP_REG(RK3288_REG_CFG_DONE, 0x1, 0),
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.cfg_done = VOP_REG_SYNC(RK3288_REG_CFG_DONE, 0x1, 0),
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};
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/*
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@ -266,7 +272,7 @@ static const struct vop_data rk3288_vop = {
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};
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static const struct vop_ctrl rk3399_ctrl_data = {
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.standby = VOP_REG(RK3399_SYS_CTRL, 0x1, 22),
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.standby = VOP_REG_SYNC(RK3399_SYS_CTRL, 0x1, 22),
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.gate_en = VOP_REG(RK3399_SYS_CTRL, 0x1, 23),
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.dp_en = VOP_REG(RK3399_SYS_CTRL, 0x1, 11),
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.rgb_en = VOP_REG(RK3399_SYS_CTRL, 0x1, 12),
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@ -290,7 +296,7 @@ static const struct vop_ctrl rk3399_ctrl_data = {
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.vpost_st_end = VOP_REG(RK3399_POST_DSP_VACT_INFO, 0x1fff1fff, 0),
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.line_flag_num[0] = VOP_REG(RK3399_LINE_FLAG, 0xffff, 0),
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.line_flag_num[1] = VOP_REG(RK3399_LINE_FLAG, 0xffff, 16),
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.cfg_done = VOP_REG_MASK(RK3399_REG_CFG_DONE, 0x1, 0),
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.cfg_done = VOP_REG_MASK_SYNC(RK3399_REG_CFG_DONE, 0x1, 0),
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};
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static const int rk3399_vop_intrs[] = {
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@ -306,9 +312,9 @@ static const int rk3399_vop_intrs[] = {
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static const struct vop_intr rk3399_vop_intr = {
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.intrs = rk3399_vop_intrs,
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.nintrs = ARRAY_SIZE(rk3399_vop_intrs),
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.status = VOP_REG_MASK(RK3399_INTR_STATUS0, 0xffff, 0),
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.enable = VOP_REG_MASK(RK3399_INTR_EN0, 0xffff, 0),
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.clear = VOP_REG_MASK(RK3399_INTR_CLEAR0, 0xffff, 0),
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.status = VOP_REG_MASK_SYNC(RK3399_INTR_STATUS0, 0xffff, 0),
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.enable = VOP_REG_MASK_SYNC(RK3399_INTR_EN0, 0xffff, 0),
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.clear = VOP_REG_MASK_SYNC(RK3399_INTR_CLEAR0, 0xffff, 0),
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};
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static const struct vop_data rk3399_vop_big = {
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