Samsung DT 2nd updates for v3.14

- add DMA controller, SPI, and TMU DT nodes for exynos5420
 - add PWM DT nodes for exynos5250 and exynos5420
 - drop interrupt controller properties from MCT nodes
   because MCT is not an interrupt controller
 - move MCT nodes to exynos4x12 from board because it is
   a per-processor interrupt and same 4212 and 4412
 - use one cell for MCT interrupt map for exynos4 SoCs
 - update Exynos MCT DT bindings accordingly
 - fix missing spaces after labels for exynos
 - fix mmc status property for exynos5250-snow
 - add MCLK for codec for exynos5250-smdk5250
 - disable SPI and I2C by default for exynos5250 SoC
   and enable into requiring some boards
 - rename cros5250-common to exynos5250-cros-common
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Merge tag 'samsung-dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/dt

From Kukjin Kim:
Samsung DT 2nd updates for v3.14
- add DMA controller, SPI, and TMU DT nodes for exynos5420
- add PWM DT nodes for exynos5250 and exynos5420
- drop interrupt controller properties from MCT nodes
  because MCT is not an interrupt controller
- move MCT nodes to exynos4x12 from board because it is
  a per-processor interrupt and same 4212 and 4412
- use one cell for MCT interrupt map for exynos4 SoCs
- update Exynos MCT DT bindings accordingly
- fix missing spaces after labels for exynos
- fix mmc status property for exynos5250-snow
- add MCLK for codec for exynos5250-smdk5250
- disable SPI and I2C by default for exynos5250 SoC
  and enable into requiring some boards
- rename cros5250-common to exynos5250-cros-common

* tag 'samsung-dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: (27 commits)
  ARM: dts: Rename Exynos5250 ChromeOS common file to have exynos prefix
  ARM: dts: Disable I2C controllers by default on Exynos5250
  ARM: dts: Leave Exynos5250 SPI controller disabled by default
  ARM: dts: Add CODEC MCLK for SMDK5250
  ARM: dts: Add device nodes for TMU blocks for exynos5420
  ARM: dts: Fix status property of mmc nodes for snow board
  ARM: dts: Fix missing spaces after labels for exynos
  ARM: dts: Simplify MCT interrupt map for exynos4 SoCs
  ARM: dts: Move MCT node to exynos4x12.dtsi
  ARM: dts: Drop interrupt controller properties from MCT nodes for exynos4 SoCs
  Documentation: devicetree: Update Exynos MCT bindings description
  ARM: dts: add pwm DT nodes to Exynos5250 and Exynos5420
  ARM: dts: Add SPI nodes to the exynos5420 device tree file
  ARM: dts: Add DMA controller node info on Exynos5420
  ARM: dts: Use MSHC controller for eMMC memory for exynos4412-trats2
  ARM: dts: Fix definition of MSHC device tree nodes for exynos4x12
  ARM: dts: add clock provider for mshc node for Exynos4412 SOC
  clk: samsung: exynos4: Fix definition of div_mmc_pre4 divider
  ARM: dts: Fix exynos5250-snow's search key to be L_META
  ARM: dts: Add the missing "\" key in non-US keyboards for exynos5250-snow
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2013-12-23 18:54:04 -08:00
commit 954e198eac
22 changed files with 348 additions and 189 deletions

View file

@ -31,38 +31,58 @@ Required properties:
7: ..
i: Local Timer Interrupt n
Example 1: In this example, the system uses only the first global timer
interrupt generated by MCT and the remaining three global timer
interrupts are unused. Two local timer interrupts have been
specified.
For MCT block that uses a per-processor interrupt for local timers, such
as ones compatible with "samsung,exynos4412-mct", only one local timer
interrupt might be specified, meaning that all local timers use the same
per processor interrupt.
Example 1: In this example, the IP contains two local timers, using separate
interrupts, so two local timer interrupts have been specified,
in addition to four global timer interrupts.
mct@10050000 {
compatible = "samsung,exynos4210-mct";
reg = <0x10050000 0x800>;
interrupts = <0 57 0>, <0 0 0>, <0 0 0>, <0 0 0>,
interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>,
<0 42 0>, <0 48 0>;
};
Example 2: In this example, the MCT global and local timer interrupts are
connected to two separate interrupt controllers. Hence, an
interrupt-map is created to map the interrupts to the respective
interrupt controllers.
Example 2: In this example, the timer interrupts are connected to two separate
interrupt controllers. Hence, an interrupt-map is created to map
the interrupts to the respective interrupt controllers.
mct@101C0000 {
compatible = "samsung,exynos4210-mct";
reg = <0x101C0000 0x800>;
interrupt-controller;
#interrups-cells = <2>;
interrupt-parent = <&mct_map>;
interrupts = <0 0>, <1 0>, <2 0>, <3 0>,
<4 0>, <5 0>;
interrupts = <0>, <1>, <2>, <3>, <4>, <5>;
mct_map: mct-map {
#interrupt-cells = <2>;
#interrupt-cells = <1>;
#address-cells = <0>;
#size-cells = <0>;
interrupt-map = <0x0 0 &combiner 23 3>,
<0x4 0 &gic 0 120 0>,
<0x5 0 &gic 0 121 0>;
interrupt-map = <0 &gic 0 57 0>,
<1 &gic 0 69 0>,
<2 &combiner 12 6>,
<3 &combiner 12 7>,
<4 &gic 0 42 0>,
<5 &gic 0 48 0>;
};
};
Example 3: In this example, the IP contains four local timers, but using
a per-processor interrupt to handle them. Either all the local
timer interrupts can be specified, with the same interrupt specifier
value or just the first one.
mct@10050000 {
compatible = "samsung,exynos4412-mct";
reg = <0x10050000 0x800>;
/* Both ways are possible in this case. Either: */
interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>,
<0 42 0>;
/* or: */
interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>,
<0 42 0>, <0 42 0>, <0 42 0>, <0 42 0>;
};

View file

@ -85,14 +85,14 @@
reg = <0x10023CE0 0x20>;
};
gic:interrupt-controller@10490000 {
gic: interrupt-controller@10490000 {
compatible = "arm,cortex-a9-gic";
#interrupt-cells = <3>;
interrupt-controller;
reg = <0x10490000 0x1000>, <0x10480000 0x100>;
};
combiner:interrupt-controller@10440000 {
combiner: interrupt-controller@10440000 {
compatible = "samsung,exynos4210-combiner";
#interrupt-cells = <2>;
interrupt-controller;

View file

@ -313,7 +313,7 @@
display-timings {
native-mode = <&timing0>;
timing0: timing {
clock-frequency = <50000>;
clock-frequency = <47500000>;
hactive = <1024>;
vactive = <600>;
hfront-porch = <64>;

View file

@ -36,11 +36,11 @@
reg = <0x10023CA0 0x20>;
};
gic:interrupt-controller@10490000 {
gic: interrupt-controller@10490000 {
cpu-offset = <0x8000>;
};
combiner:interrupt-controller@10440000 {
combiner: interrupt-controller@10440000 {
samsung,combiner-nr = <16>;
interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
<0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
@ -51,24 +51,21 @@
mct@10050000 {
compatible = "samsung,exynos4210-mct";
reg = <0x10050000 0x800>;
interrupt-controller;
#interrups-cells = <2>;
interrupt-parent = <&mct_map>;
interrupts = <0 0>, <1 0>, <2 0>, <3 0>,
<4 0>, <5 0>;
interrupts = <0>, <1>, <2>, <3>, <4>, <5>;
clocks = <&clock 3>, <&clock 344>;
clock-names = "fin_pll", "mct";
mct_map: mct-map {
#interrupt-cells = <2>;
#interrupt-cells = <1>;
#address-cells = <0>;
#size-cells = <0>;
interrupt-map = <0x0 0 &gic 0 57 0>,
<0x1 0 &gic 0 69 0>,
<0x2 0 &combiner 12 6>,
<0x3 0 &combiner 12 7>,
<0x4 0 &gic 0 42 0>,
<0x5 0 &gic 0 48 0>;
interrupt-map = <0 &gic 0 57 0>,
<1 &gic 0 69 0>,
<2 &combiner 12 6>,
<3 &combiner 12 7>,
<4 &gic 0 42 0>,
<5 &gic 0 48 0>;
};
};

View file

@ -22,7 +22,7 @@
/ {
compatible = "samsung,exynos4212";
gic:interrupt-controller@10490000 {
gic: interrupt-controller@10490000 {
cpu-offset = <0x8000>;
};
@ -34,26 +34,4 @@
<0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>,
<0 107 0>, <0 108 0>;
};
mct@10050000 {
compatible = "samsung,exynos4412-mct";
reg = <0x10050000 0x800>;
interrupt-controller;
#interrups-cells = <2>;
interrupt-parent = <&mct_map>;
interrupts = <0 0>, <1 0>, <2 0>, <3 0>,
<4 0>, <5 0>;
mct_map: mct-map {
#interrupt-cells = <2>;
#address-cells = <0>;
#size-cells = <0>;
interrupt-map = <0x0 0 &gic 0 57 0>,
<0x1 0 &combiner 12 5>,
<0x2 0 &combiner 12 6>,
<0x3 0 &combiner 12 7>,
<0x4 0 &gic 1 12 0>,
<0x5 0 &gic 1 12 0>;
};
};
};

View file

@ -38,9 +38,7 @@
};
};
mshc@12550000 {
#address-cells = <1>;
#size-cells = <0>;
mmc@12550000 {
pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>;
pinctrl-names = "default";
vmmc-supply = <&ldo20_reg &buck8_reg>;
@ -49,7 +47,6 @@
num-slots = <1>;
supports-highspeed;
broken-cd;
fifo-depth = <0x80>;
card-detect-delay = <200>;
samsung,dw-mshc-ciu-div = <3>;
samsung,dw-mshc-sdr-timing = <2 3>;

View file

@ -122,9 +122,7 @@
status = "okay";
};
mshc@12550000 {
#address-cells = <1>;
#size-cells = <0>;
mmc@12550000 {
pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>;
pinctrl-names = "default";
status = "okay";
@ -132,7 +130,6 @@
num-slots = <1>;
supports-highspeed;
broken-cd;
fifo-depth = <0x80>;
card-detect-delay = <200>;
samsung,dw-mshc-ciu-div = <3>;
samsung,dw-mshc-sdr-timing = <2 3>;
@ -159,7 +156,7 @@
display-timings {
native-mode = <&timing0>;
timing0: timing {
clock-frequency = <50000>;
clock-frequency = <47500000>;
hactive = <1024>;
vactive = <600>;
hfront-porch = <64>;

View file

@ -442,13 +442,25 @@
};
};
sdhci@12510000 {
bus-width = <8>;
mmc@12550000 {
num-slots = <1>;
supports-highspeed;
broken-cd;
non-removable;
pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus8>;
pinctrl-names = "default";
card-detect-delay = <200>;
vmmc-supply = <&vemmc_reg>;
clock-frequency = <400000000>;
samsung,dw-mshc-ciu-div = <0>;
samsung,dw-mshc-sdr-timing = <2 3>;
samsung,dw-mshc-ddr-timing = <1 2>;
pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>;
pinctrl-names = "default";
status = "okay";
slot@0 {
reg = <0>;
bus-width = <8>;
};
};
serial@13800000 {

View file

@ -22,7 +22,7 @@
/ {
compatible = "samsung,exynos4412";
gic:interrupt-controller@10490000 {
gic: interrupt-controller@10490000 {
cpu-offset = <0x4000>;
};
@ -35,37 +35,4 @@
<0 107 0>, <0 108 0>, <0 48 0>, <0 42 0>;
};
mct@10050000 {
compatible = "samsung,exynos4412-mct";
reg = <0x10050000 0x800>;
interrupt-controller;
#interrups-cells = <2>;
interrupt-parent = <&mct_map>;
interrupts = <0 0>, <1 0>, <2 0>, <3 0>,
<4 0>, <5 0>, <6 0>, <7 0>;
clocks = <&clock 3>, <&clock 344>;
clock-names = "fin_pll", "mct";
mct_map: mct-map {
#interrupt-cells = <2>;
#address-cells = <0>;
#size-cells = <0>;
interrupt-map = <0x0 0 &gic 0 57 0>,
<0x1 0 &combiner 12 5>,
<0x2 0 &combiner 12 6>,
<0x3 0 &combiner 12 7>,
<0x4 0 &gic 1 12 0>,
<0x5 0 &gic 1 12 0>,
<0x6 0 &gic 1 12 0>,
<0x7 0 &gic 1 12 0>;
};
};
mshc@12550000 {
compatible = "samsung,exynos4412-dw-mshc";
reg = <0x12550000 0x1000>;
interrupts = <0 77 0>;
#address-cells = <1>;
#size-cells = <0>;
};
};

View file

@ -28,6 +28,7 @@
pinctrl3 = &pinctrl_3;
fimc-lite0 = &fimc_lite_0;
fimc-lite1 = &fimc_lite_1;
mshc0 = &mshc_0;
};
pd_isp: isp-power-domain@10023CA0 {
@ -41,6 +42,26 @@
#clock-cells = <1>;
};
mct@10050000 {
compatible = "samsung,exynos4412-mct";
reg = <0x10050000 0x800>;
interrupt-parent = <&mct_map>;
interrupts = <0>, <1>, <2>, <3>, <4>;
clocks = <&clock 3>, <&clock 344>;
clock-names = "fin_pll", "mct";
mct_map: mct-map {
#interrupt-cells = <1>;
#address-cells = <0>;
#size-cells = <0>;
interrupt-map = <0 &gic 0 57 0>,
<1 &combiner 12 5>,
<2 &combiner 12 6>,
<3 &combiner 12 7>,
<4 &gic 1 12 0>;
};
};
pinctrl_0: pinctrl@11400000 {
compatible = "samsung,exynos4x12-pinctrl";
reg = <0x11400000 0x1000>;
@ -176,4 +197,16 @@
};
};
};
mshc_0: mmc@12550000 {
compatible = "samsung,exynos4412-dw-mshc";
reg = <0x12550000 0x1000>;
interrupts = <0 77 0>;
#address-cells = <1>;
#size-cells = <0>;
fifo-depth = <0x80>;
clocks = <&clock 301>, <&clock 149>;
clock-names = "biu", "ciu";
status = "disabled";
};
};

View file

@ -23,7 +23,7 @@
reg = <0x10000000 0x100>;
};
combiner:interrupt-controller@10440000 {
combiner: interrupt-controller@10440000 {
compatible = "samsung,exynos4210-combiner";
#interrupt-cells = <2>;
interrupt-controller;
@ -39,7 +39,7 @@
<0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>;
};
gic:interrupt-controller@10481000 {
gic: interrupt-controller@10481000 {
compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
#interrupt-cells = <3>;
interrupt-controller;

View file

@ -34,6 +34,7 @@
samsung,i2c-sda-delay = <100>;
samsung,i2c-max-bus-freq = <20000>;
samsung,i2c-slave-addr = <0x66>;
status = "okay";
s5m8767_pmic@66 {
compatible = "samsung,s5m8767-pmic";
@ -302,11 +303,13 @@
buck7_reg: BUCK7 {
regulator-name = "PVDD_BUCK7";
regulator-always-on;
op_mode = <1>;
};
buck8_reg: BUCK8 {
regulator-name = "PVDD_BUCK8";
regulator-always-on;
op_mode = <1>;
};
buck9_reg: BUCK9 {
@ -319,11 +322,9 @@
};
};
i2c@12C70000 {
status = "disabled";
};
i2c@12C80000 {
status = "okay";
samsung,i2c-sda-delay = <100>;
samsung,i2c-max-bus-freq = <66000>;
samsung,i2c-slave-addr = <0x50>;
@ -335,7 +336,10 @@
};
i2c@12C90000 {
status = "okay";
wm1811a@1a {
compatible = "wlf,wm1811";
reg = <0x1a>;
@ -353,23 +357,9 @@
};
};
i2c@12CA0000 {
status = "disabled";
};
i2c@12CB0000 {
status = "disabled";
};
i2c@12CC0000 {
status = "disabled";
};
i2c@12CD0000 {
status = "disabled";
};
i2c@12CE0000 {
status = "okay";
samsung,i2c-sda-delay = <100>;
samsung,i2c-max-bus-freq = <66000>;
samsung,i2c-slave-addr = <0x38>;
@ -380,10 +370,6 @@
};
};
i2c@121D0000 {
status = "disabled";
};
mmc_0: mmc@12200000 {
status = "okay";
num-slots = <1>;
@ -426,18 +412,6 @@
status = "okay";
};
spi_0: spi@12d20000 {
status = "disabled";
};
spi_1: spi@12d30000 {
status = "disabled";
};
spi_2: spi@12d40000 {
status = "disabled";
};
gpio_keys {
compatible = "gpio-keys";

View file

@ -37,6 +37,7 @@
};
i2c@12C60000 {
status = "okay";
samsung,i2c-sda-delay = <100>;
samsung,i2c-max-bus-freq = <378000>;
@ -185,6 +186,7 @@
};
i2c@12C70000 {
status = "okay";
samsung,i2c-sda-delay = <100>;
samsung,i2c-max-bus-freq = <378000>;
@ -198,6 +200,7 @@
};
i2c@12C80000 {
status = "okay";
samsung,i2c-sda-delay = <100>;
samsung,i2c-max-bus-freq = <66000>;
@ -208,30 +211,31 @@
};
i2c@12C90000 {
status = "okay";
samsung,i2c-sda-delay = <100>;
samsung,i2c-max-bus-freq = <66000>;
};
i2c@12CA0000 {
status = "okay";
samsung,i2c-sda-delay = <100>;
samsung,i2c-max-bus-freq = <66000>;
};
i2c@12CB0000 {
status = "okay";
samsung,i2c-sda-delay = <100>;
samsung,i2c-max-bus-freq = <66000>;
};
i2c@12CC0000 {
status = "disabled";
};
i2c@12CD0000 {
status = "okay";
samsung,i2c-sda-delay = <100>;
samsung,i2c-max-bus-freq = <66000>;
};
i2c@12CE0000 {
status = "okay";
samsung,i2c-sda-delay = <100>;
samsung,i2c-max-bus-freq = <378000>;
@ -258,10 +262,6 @@
};
};
mmc@12210000 {
status = "disabled";
};
mmc@12220000 {
num-slots = <1>;
supports-highspeed;
@ -295,19 +295,12 @@
};
};
spi_0: spi@12d20000 {
status = "disabled";
};
spi_1: spi@12d30000 {
status = "okay";
samsung,spi-src-clk = <0>;
num-cs = <1>;
};
spi_2: spi@12d40000 {
status = "disabled";
};
hdmi {
hpd-gpio = <&gpx3 7 0>;
};

View file

@ -30,6 +30,7 @@
i2c@12C60000 {
samsung,i2c-sda-delay = <100>;
samsung,i2c-max-bus-freq = <20000>;
status = "okay";
eeprom@50 {
compatible = "samsung,s524ad0xd1";
@ -37,7 +38,7 @@
};
};
vdd:fixed-regulator@0 {
vdd: fixed-regulator@0 {
compatible = "regulator-fixed";
regulator-name = "vdd-supply";
regulator-min-microvolt = <1800000>;
@ -45,7 +46,7 @@
regulator-always-on;
};
dbvdd:fixed-regulator@1 {
dbvdd: fixed-regulator@1 {
compatible = "regulator-fixed";
regulator-name = "dbvdd-supply";
regulator-min-microvolt = <3300000>;
@ -53,7 +54,7 @@
regulator-always-on;
};
spkvdd:fixed-regulator@2 {
spkvdd: fixed-regulator@2 {
compatible = "regulator-fixed";
regulator-name = "spkvdd-supply";
regulator-min-microvolt = <5000000>;
@ -64,6 +65,7 @@
i2c@12C70000 {
samsung,i2c-sda-delay = <100>;
samsung,i2c-max-bus-freq = <20000>;
status = "okay";
eeprom@51 {
compatible = "samsung,s524ad0xd1";
@ -77,6 +79,9 @@
gpio-controller;
#gpio-cells = <2>;
clocks = <&codec_mclk>;
clock-names = "MCLK1";
AVDD2-supply = <&vdd>;
CPVDD-supply = <&vdd>;
DBVDD-supply = <&dbvdd>;
@ -89,6 +94,7 @@
samsung,i2c-sda-delay = <100>;
samsung,i2c-max-bus-freq = <40000>;
samsung,i2c-slave-addr = <0x38>;
status = "okay";
sata-phy {
compatible = "samsung,sata-phy";
@ -103,6 +109,7 @@
i2c@12C80000 {
samsung,i2c-sda-delay = <100>;
samsung,i2c-max-bus-freq = <66000>;
status = "okay";
hdmiddc@50 {
compatible = "samsung,exynos4210-hdmiddc";
@ -110,29 +117,10 @@
};
};
i2c@12C90000 {
status = "disabled";
};
i2c@12CA0000 {
status = "disabled";
};
i2c@12CB0000 {
status = "disabled";
};
i2c@12CC0000 {
status = "disabled";
};
i2c@12CD0000 {
status = "disabled";
};
i2c@12CE0000 {
samsung,i2c-sda-delay = <100>;
samsung,i2c-max-bus-freq = <66000>;
status = "okay";
hdmiphy@38 {
compatible = "samsung,exynos4212-hdmiphy";
@ -181,6 +169,8 @@
};
spi_1: spi@12d30000 {
status = "okay";
w25q80bw@0 {
#address-cells = <1>;
#size-cells = <1>;
@ -206,10 +196,6 @@
};
};
spi_2: spi@12d40000 {
status = "disabled";
};
hdmi {
hpd-gpio = <&gpx3 7 0>;
};
@ -271,5 +257,11 @@
compatible = "samsung,clock-xxti";
clock-frequency = <24000000>;
};
codec_mclk: codec-mclk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <16934000>;
};
};
};

View file

@ -10,7 +10,7 @@
/dts-v1/;
#include "exynos5250.dtsi"
#include "cros5250-common.dtsi"
#include "exynos5250-cros-common.dtsi"
/ {
model = "Google Snow";
@ -85,7 +85,7 @@
keypad,num-rows = <8>;
keypad,num-columns = <13>;
google,needs-ghost-filter;
linux,keymap = <0x0001003a /* CAPSLK */
linux,keymap = <0x0001007d /* L_META */
0x0002003b /* F1 */
0x00030030 /* B */
0x00040044 /* F10 */
@ -130,6 +130,7 @@
0x04060024 /* J */
0x04080027 /* ; */
0x04090026 /* L */
0x040a002b /* \ */
0x040b001c /* ENTER */
0x0501002c /* Z */
@ -171,11 +172,20 @@
};
};
mmc@12200000 {
status = "okay";
};
mmc@12220000 {
status = "okay";
};
/*
* On Snow we've got SIP WiFi and so can keep drive strengths low to
* reduce EMI.
*/
mmc@12230000 {
status = "okay";
slot@0 {
pinctrl-names = "default";
pinctrl-0 = <&sd3_clk &sd3_cmd &sd3_bus4>;

View file

@ -60,11 +60,13 @@
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <0>;
clock-frequency = <1700000000>;
};
cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <1>;
clock-frequency = <1700000000>;
};
};
@ -242,6 +244,7 @@
clock-names = "i2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c0_bus>;
status = "disabled";
};
i2c_1: i2c@12C70000 {
@ -254,6 +257,7 @@
clock-names = "i2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c1_bus>;
status = "disabled";
};
i2c_2: i2c@12C80000 {
@ -266,6 +270,7 @@
clock-names = "i2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c2_bus>;
status = "disabled";
};
i2c_3: i2c@12C90000 {
@ -278,6 +283,7 @@
clock-names = "i2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c3_bus>;
status = "disabled";
};
i2c_4: i2c@12CA0000 {
@ -290,6 +296,7 @@
clock-names = "i2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c4_bus>;
status = "disabled";
};
i2c_5: i2c@12CB0000 {
@ -302,6 +309,7 @@
clock-names = "i2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c5_bus>;
status = "disabled";
};
i2c_6: i2c@12CC0000 {
@ -314,6 +322,7 @@
clock-names = "i2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c6_bus>;
status = "disabled";
};
i2c_7: i2c@12CD0000 {
@ -326,6 +335,7 @@
clock-names = "i2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c7_bus>;
status = "disabled";
};
i2c_8: i2c@12CE0000 {
@ -336,6 +346,7 @@
#size-cells = <0>;
clocks = <&clock 302>;
clock-names = "i2c";
status = "disabled";
};
i2c@121D0000 {
@ -345,10 +356,12 @@
#size-cells = <0>;
clocks = <&clock 288>;
clock-names = "i2c";
status = "disabled";
};
spi_0: spi@12d20000 {
compatible = "samsung,exynos4210-spi";
status = "disabled";
reg = <0x12d20000 0x100>;
interrupts = <0 66 0>;
dmas = <&pdma0 5
@ -364,6 +377,7 @@
spi_1: spi@12d30000 {
compatible = "samsung,exynos4210-spi";
status = "disabled";
reg = <0x12d30000 0x100>;
interrupts = <0 67 0>;
dmas = <&pdma1 5
@ -379,6 +393,7 @@
spi_2: spi@12d40000 {
compatible = "samsung,exynos4210-spi";
status = "disabled";
reg = <0x12d40000 0x100>;
interrupts = <0 68 0>;
dmas = <&pdma0 7
@ -546,6 +561,15 @@
};
};
pwm: pwm@12dd0000 {
compatible = "samsung,exynos4210-pwm";
reg = <0x12dd0000 0x100>;
samsung,pwm-outputs = <0>, <1>, <2>, <3>;
#pwm-cells = <3>;
clocks = <&clock 311>;
clock-names = "timers";
};
amba {
#address-cells = <1>;
#size-cells = <1>;

View file

@ -64,7 +64,7 @@
samsung,pins = "gpx0-7";
samsung,pin-function = <3>;
samsung,pin-pud = <0>;
samaung,pin-drv = <0>;
samsung,pin-drv = <0>;
};
};

View file

@ -43,6 +43,9 @@
i2c10 = &hsi2c_10;
gsc0 = &gsc_0;
gsc1 = &gsc_1;
spi0 = &spi_0;
spi1 = &spi_1;
spi2 = &spi_2;
};
cpus {
@ -271,6 +274,106 @@
status = "okay";
};
amba {
#address-cells = <1>;
#size-cells = <1>;
compatible = "arm,amba-bus";
interrupt-parent = <&gic>;
ranges;
pdma0: pdma@121A0000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x121A0000 0x1000>;
interrupts = <0 34 0>;
clocks = <&clock 362>;
clock-names = "apb_pclk";
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <32>;
};
pdma1: pdma@121B0000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x121B0000 0x1000>;
interrupts = <0 35 0>;
clocks = <&clock 363>;
clock-names = "apb_pclk";
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <32>;
};
mdma0: mdma@10800000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x10800000 0x1000>;
interrupts = <0 33 0>;
clocks = <&clock 473>;
clock-names = "apb_pclk";
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <1>;
};
mdma1: mdma@11C10000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x11C10000 0x1000>;
interrupts = <0 124 0>;
clocks = <&clock 442>;
clock-names = "apb_pclk";
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <1>;
};
};
spi_0: spi@12d20000 {
compatible = "samsung,exynos4210-spi";
reg = <0x12d20000 0x100>;
interrupts = <0 66 0>;
dmas = <&pdma0 5
&pdma0 4>;
dma-names = "tx", "rx";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&spi0_bus>;
clocks = <&clock 271>, <&clock 135>;
clock-names = "spi", "spi_busclk0";
status = "disabled";
};
spi_1: spi@12d30000 {
compatible = "samsung,exynos4210-spi";
reg = <0x12d30000 0x100>;
interrupts = <0 67 0>;
dmas = <&pdma1 5
&pdma1 4>;
dma-names = "tx", "rx";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&spi1_bus>;
clocks = <&clock 272>, <&clock 136>;
clock-names = "spi", "spi_busclk0";
status = "disabled";
};
spi_2: spi@12d40000 {
compatible = "samsung,exynos4210-spi";
reg = <0x12d40000 0x100>;
interrupts = <0 68 0>;
dmas = <&pdma0 7
&pdma0 6>;
dma-names = "tx", "rx";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&spi2_bus>;
clocks = <&clock 273>, <&clock 137>;
clock-names = "spi", "spi_busclk0";
status = "disabled";
};
serial@12C00000 {
clocks = <&clock 257>, <&clock 128>;
clock-names = "uart", "clk_uart_baud0";
@ -291,6 +394,15 @@
clock-names = "uart", "clk_uart_baud0";
};
pwm: pwm@12dd0000 {
compatible = "samsung,exynos4210-pwm";
reg = <0x12dd0000 0x100>;
samsung,pwm-outputs = <0>, <1>, <2>, <3>;
#pwm-cells = <3>;
clocks = <&clock 279>;
clock-names = "timers";
};
dp_phy: video-phy@10040728 {
compatible = "samsung,exynos5250-dp-video-phy";
reg = <0x10040728 4>;
@ -500,4 +612,44 @@
clock-names = "gscl";
samsung,power-domain = <&gsc_pd>;
};
tmu_cpu0: tmu@10060000 {
compatible = "samsung,exynos5420-tmu";
reg = <0x10060000 0x100>;
interrupts = <0 65 0>;
clocks = <&clock 318>;
clock-names = "tmu_apbif";
};
tmu_cpu1: tmu@10064000 {
compatible = "samsung,exynos5420-tmu";
reg = <0x10064000 0x100>;
interrupts = <0 183 0>;
clocks = <&clock 318>;
clock-names = "tmu_apbif";
};
tmu_cpu2: tmu@10068000 {
compatible = "samsung,exynos5420-tmu-ext-triminfo";
reg = <0x10068000 0x100>, <0x1006c000 0x4>;
interrupts = <0 184 0>;
clocks = <&clock 318>, <&clock 318>;
clock-names = "tmu_apbif", "tmu_triminfo_apbif";
};
tmu_cpu3: tmu@1006c000 {
compatible = "samsung,exynos5420-tmu-ext-triminfo";
reg = <0x1006c000 0x100>, <0x100a0000 0x4>;
interrupts = <0 185 0>;
clocks = <&clock 318>, <&clock 319>;
clock-names = "tmu_apbif", "tmu_triminfo_apbif";
};
tmu_gpu: tmu@100a0000 {
compatible = "samsung,exynos5420-tmu-ext-triminfo";
reg = <0x100a0000 0x100>, <0x10068000 0x4>;
interrupts = <0 215 0>;
clocks = <&clock 319>, <&clock 318>;
clock-names = "tmu_apbif", "tmu_triminfo_apbif";
};
};

View file

@ -29,7 +29,7 @@
#clock-cells = <1>;
};
gic:interrupt-controller@2E0000 {
gic: interrupt-controller@2E0000 {
compatible = "arm,cortex-a15-gic";
#interrupt-cells = <3>;
interrupt-controller;

View file

@ -36,7 +36,9 @@
#include <plat/devs.h>
#include <plat/fb.h>
#include <linux/platform_data/mtd-nand-s3c2410.h>
#include <linux/platform_data/mmc-sdhci-s3c.h>
#include <plat/regs-serial.h>
#include <plat/sdhci.h>
#include <linux/platform_data/touchscreen-s3c2410.h>
#include <video/platform_lcd.h>
@ -214,6 +216,13 @@ static struct platform_device mini6410_lcd_powerdev = {
.dev.platform_data = &mini6410_lcd_power_data,
};
static struct s3c_sdhci_platdata mini6410_hsmmc1_pdata = {
.max_width = 4,
.cd_type = S3C_SDHCI_CD_GPIO,
.ext_cd_gpio = S3C64XX_GPN(10),
.ext_cd_gpio_invert = true,
};
static struct platform_device *mini6410_devices[] __initdata = {
&mini6410_device_eth,
&s3c_device_hsmmc0,
@ -321,6 +330,7 @@ static void __init mini6410_machine_init(void)
s3c_nand_set_platdata(&mini6410_nand_info);
s3c_fb_set_platdata(&mini6410_lcd_pdata[features.lcd_index]);
s3c_sdhci1_set_platdata(&mini6410_hsmmc1_pdata);
s3c24xx_ts_set_platdata(NULL);
/* configure nCS1 width to 16 bits */

View file

@ -145,6 +145,8 @@ static inline void arch_enable_uart_fifo(void)
if (!(fifocon & S3C2410_UFCON_RESETBOTH))
break;
}
uart_wr(S3C2410_UFCON, S3C2410_UFCON_FIFOMODE);
}
}
#else

View file

@ -530,7 +530,8 @@ static struct samsung_div_clock exynos4_div_clks[] __initdata = {
DIV(sclk_i2s1, "sclk_i2s1", "sclk_audio1", DIV_PERIL5, 0, 6),
DIV(sclk_i2s2, "sclk_i2s2", "sclk_audio2", DIV_PERIL5, 8, 6),
DIV(none, "div_mmc4", "mout_mmc4", DIV_FSYS3, 0, 4),
DIV(none, "div_mmc_pre4", "div_mmc4", DIV_FSYS3, 8, 8),
DIV_F(none, "div_mmc_pre4", "div_mmc4", DIV_FSYS3, 8, 8,
CLK_SET_RATE_PARENT, 0),
DIV(none, "div_uart0", "mout_uart0", DIV_PERIL0, 0, 4),
DIV(none, "div_uart1", "mout_uart1", DIV_PERIL0, 4, 4),
DIV(none, "div_uart2", "mout_uart2", DIV_PERIL0, 8, 4),