bnxt_en: Add support for devlink info command
Display the following information via devlink info command: - Driver name - Board id - Broad revision - Board Serial number - Board FW version - FW parameter set version - FW App version - FW management version - FW RoCE version Standard output example: $ devlink dev info pci/0000:3b:00.0 pci/0000:3b:00.0: driver bnxt_en serial_number 00-10-18-FF-FE-AD-05-00 versions: fixed: asic.id D802 asic.rev 1 running: fw 216.1.124.0 fw.psid 0.0.0 fw.app 216.1.122.0 fw.mgmt 864.0.32.0 fw.roce 216.1.15.0 [ This version has incorporated changes suggested by Jakub Kicinski to use generic devlink version tags. ] v2: Use fw.psid Cc: Jiri Pirko <jiri@mellanox.com> Cc: Jakub Kicinski <kuba@kernel.org> Signed-off-by: Vasundhara Volam <vasundhara-v.volam@broadcom.com> Signed-off-by: Michael Chan <michael.chan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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41c0d917d1
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9599e036b1
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@ -284,11 +284,15 @@ void bnxt_dl_health_recovery_done(struct bnxt *bp)
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devlink_health_reporter_recovery_done(hlth->fw_reset_reporter);
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}
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static int bnxt_dl_info_get(struct devlink *dl, struct devlink_info_req *req,
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struct netlink_ext_ack *extack);
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static const struct devlink_ops bnxt_dl_ops = {
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#ifdef CONFIG_BNXT_SRIOV
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.eswitch_mode_set = bnxt_dl_eswitch_mode_set,
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.eswitch_mode_get = bnxt_dl_eswitch_mode_get,
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#endif /* CONFIG_BNXT_SRIOV */
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.info_get = bnxt_dl_info_get,
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.flash_update = bnxt_dl_flash_update,
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};
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@ -355,6 +359,136 @@ static void bnxt_copy_from_nvm_data(union devlink_param_value *dst,
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dst->vu8 = (u8)val32;
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}
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static int bnxt_hwrm_get_nvm_cfg_ver(struct bnxt *bp,
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union devlink_param_value *nvm_cfg_ver)
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{
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struct hwrm_nvm_get_variable_input req = {0};
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union bnxt_nvm_data *data;
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dma_addr_t data_dma_addr;
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int rc;
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bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_VARIABLE, -1, -1);
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data = dma_alloc_coherent(&bp->pdev->dev, sizeof(*data),
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&data_dma_addr, GFP_KERNEL);
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if (!data)
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return -ENOMEM;
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req.dest_data_addr = cpu_to_le64(data_dma_addr);
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req.data_len = cpu_to_le16(BNXT_NVM_CFG_VER_BITS);
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req.option_num = cpu_to_le16(NVM_OFF_NVM_CFG_VER);
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rc = hwrm_send_message_silent(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
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if (!rc)
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bnxt_copy_from_nvm_data(nvm_cfg_ver, data,
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BNXT_NVM_CFG_VER_BITS,
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BNXT_NVM_CFG_VER_BYTES);
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dma_free_coherent(&bp->pdev->dev, sizeof(*data), data, data_dma_addr);
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return rc;
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}
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static int bnxt_dl_info_get(struct devlink *dl, struct devlink_info_req *req,
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struct netlink_ext_ack *extack)
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{
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struct bnxt *bp = bnxt_get_bp_from_dl(dl);
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union devlink_param_value nvm_cfg_ver;
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struct hwrm_ver_get_output *ver_resp;
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char mgmt_ver[FW_VER_STR_LEN];
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char roce_ver[FW_VER_STR_LEN];
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char fw_ver[FW_VER_STR_LEN];
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char buf[32];
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int rc;
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rc = devlink_info_driver_name_put(req, DRV_MODULE_NAME);
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if (rc)
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return rc;
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sprintf(buf, "%X", bp->chip_num);
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rc = devlink_info_version_fixed_put(req,
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DEVLINK_INFO_VERSION_GENERIC_ASIC_ID, buf);
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if (rc)
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return rc;
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ver_resp = &bp->ver_resp;
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sprintf(buf, "%X", ver_resp->chip_rev);
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rc = devlink_info_version_fixed_put(req,
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DEVLINK_INFO_VERSION_GENERIC_ASIC_REV, buf);
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if (rc)
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return rc;
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if (BNXT_PF(bp)) {
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sprintf(buf, "%02X-%02X-%02X-%02X-%02X-%02X-%02X-%02X",
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bp->dsn[7], bp->dsn[6], bp->dsn[5], bp->dsn[4],
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bp->dsn[3], bp->dsn[2], bp->dsn[1], bp->dsn[0]);
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rc = devlink_info_serial_number_put(req, buf);
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if (rc)
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return rc;
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}
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if (strlen(ver_resp->active_pkg_name)) {
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rc =
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devlink_info_version_running_put(req,
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DEVLINK_INFO_VERSION_GENERIC_FW,
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ver_resp->active_pkg_name);
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if (rc)
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return rc;
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}
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if (BNXT_PF(bp) && !bnxt_hwrm_get_nvm_cfg_ver(bp, &nvm_cfg_ver)) {
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u32 ver = nvm_cfg_ver.vu32;
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sprintf(buf, "%X.%X.%X", (ver >> 16) & 0xF, (ver >> 8) & 0xF,
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ver & 0xF);
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rc = devlink_info_version_running_put(req,
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DEVLINK_INFO_VERSION_GENERIC_FW_PSID, buf);
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if (rc)
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return rc;
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}
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if (ver_resp->flags & VER_GET_RESP_FLAGS_EXT_VER_AVAIL) {
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snprintf(fw_ver, FW_VER_STR_LEN, "%d.%d.%d.%d",
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ver_resp->hwrm_fw_major, ver_resp->hwrm_fw_minor,
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ver_resp->hwrm_fw_build, ver_resp->hwrm_fw_patch);
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snprintf(mgmt_ver, FW_VER_STR_LEN, "%d.%d.%d.%d",
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ver_resp->mgmt_fw_major, ver_resp->mgmt_fw_minor,
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ver_resp->mgmt_fw_build, ver_resp->mgmt_fw_patch);
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snprintf(roce_ver, FW_VER_STR_LEN, "%d.%d.%d.%d",
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ver_resp->roce_fw_major, ver_resp->roce_fw_minor,
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ver_resp->roce_fw_build, ver_resp->roce_fw_patch);
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} else {
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snprintf(fw_ver, FW_VER_STR_LEN, "%d.%d.%d.%d",
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ver_resp->hwrm_fw_maj_8b, ver_resp->hwrm_fw_min_8b,
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ver_resp->hwrm_fw_bld_8b, ver_resp->hwrm_fw_rsvd_8b);
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snprintf(mgmt_ver, FW_VER_STR_LEN, "%d.%d.%d.%d",
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ver_resp->mgmt_fw_maj_8b, ver_resp->mgmt_fw_min_8b,
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ver_resp->mgmt_fw_bld_8b, ver_resp->mgmt_fw_rsvd_8b);
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snprintf(roce_ver, FW_VER_STR_LEN, "%d.%d.%d.%d",
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ver_resp->roce_fw_maj_8b, ver_resp->roce_fw_min_8b,
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ver_resp->roce_fw_bld_8b, ver_resp->roce_fw_rsvd_8b);
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}
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rc = devlink_info_version_running_put(req,
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DEVLINK_INFO_VERSION_GENERIC_FW_APP, fw_ver);
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if (rc)
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return rc;
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if (!(bp->flags & BNXT_FLAG_CHIP_P5)) {
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rc = devlink_info_version_running_put(req,
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DEVLINK_INFO_VERSION_GENERIC_FW_MGMT, mgmt_ver);
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if (rc)
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return rc;
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rc = devlink_info_version_running_put(req,
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DEVLINK_INFO_VERSION_GENERIC_FW_ROCE, roce_ver);
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if (rc)
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return rc;
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}
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return 0;
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}
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static int bnxt_hwrm_nvm_req(struct bnxt *bp, u32 param_id, void *msg,
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int msg_len, union devlink_param_value *val)
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{
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@ -38,6 +38,10 @@ static inline void bnxt_link_bp_to_dl(struct bnxt *bp, struct devlink *dl)
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#define NVM_OFF_IGNORE_ARI 164
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#define NVM_OFF_DIS_GRE_VER_CHECK 171
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#define NVM_OFF_ENABLE_SRIOV 401
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#define NVM_OFF_NVM_CFG_VER 602
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#define BNXT_NVM_CFG_VER_BITS 24
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#define BNXT_NVM_CFG_VER_BYTES 4
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#define BNXT_MSIX_VEC_MAX 1280
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#define BNXT_MSIX_VEC_MIN_MAX 128
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