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MIPS: GCW0: Reduce system timer and clocksource to 750 kHz 

The default clock (12 MHz) is too fast for the system timer.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Tested-by: Mathieu Malaterre <malat@debian.org>
Tested-by: Artur Rojek <contact@artur-rojek.eu>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: James Hogan <jhogan@kernel.org>
Cc: Jonathan Corbet <corbet@lwn.net>
Cc: Lee Jones <lee.jones@linaro.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-doc@vger.kernel.org
Cc: linux-mips@vger.kernel.org
Cc: linux-clk@vger.kernel.org
Cc: od@zcrc.me
alistair/sunxi64-5.4-dsi
Paul Cercueil 2019-07-24 13:16:14 -04:00 committed by Paul Burton
parent 157c887aff
commit 967a710040
No known key found for this signature in database
GPG Key ID: 3EA79FACB57500DD
1 changed files with 10 additions and 0 deletions
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10
arch/mips/boot/dts/ingenic/gcw0.dts
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@ -2,6 +2,7 @@
/dts-v1/;
#include "jz4770.dtsi"
#include <dt-bindings/clock/ingenic,tcu.h>
/ {
compatible = "gcw,zero", "ingenic,jz4770";
@ -60,3 +61,12 @@
/* The WiFi module is connected to the UHC. */
status = "okay";
};
&tcu {
/* 750 kHz for the system timer and clocksource */
assigned-clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER2>;
assigned-clock-rates = <750000>, <750000>;
/* PWM1 is in use, so reserve channel #2 for the clocksource */
ingenic,pwm-channels-mask = <0xfa>;
};