arm64: dts: ls1046a: use constants in the clockgen phandle
Now that we have constants, use them. This is just a mechanical change. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Shawn Guo <shawnguo@kernel.org>master
Michael Walle
Shawn Guo
parent
7525022da2
commit
973fb5e174
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@ -8,6 +8,7 @@
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* Mingkai Hu <mingkai.hu@nxp.com>
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*/
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#include <dt-bindings/clock/fsl,qoriq-clockgen.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/thermal/thermal.h>
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@ -39,7 +40,7 @@
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device_type = "cpu";
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compatible = "arm,cortex-a72";
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reg = <0x0>;
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clocks = <&clockgen 1 0>;
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clocks = <&clockgen QORIQ_CLK_CMUX 0>;
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next-level-cache = <&l2>;
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cpu-idle-states = <&CPU_PH20>;
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#cooling-cells = <2>;
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@ -49,7 +50,7 @@
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device_type = "cpu";
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compatible = "arm,cortex-a72";
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reg = <0x1>;
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clocks = <&clockgen 1 0>;
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clocks = <&clockgen QORIQ_CLK_CMUX 0>;
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next-level-cache = <&l2>;
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cpu-idle-states = <&CPU_PH20>;
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#cooling-cells = <2>;
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@ -59,7 +60,7 @@
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device_type = "cpu";
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compatible = "arm,cortex-a72";
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reg = <0x2>;
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clocks = <&clockgen 1 0>;
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clocks = <&clockgen QORIQ_CLK_CMUX 0>;
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next-level-cache = <&l2>;
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cpu-idle-states = <&CPU_PH20>;
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#cooling-cells = <2>;
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@ -69,7 +70,7 @@
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device_type = "cpu";
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compatible = "arm,cortex-a72";
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reg = <0x3>;
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clocks = <&clockgen 1 0>;
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clocks = <&clockgen QORIQ_CLK_CMUX 0>;
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next-level-cache = <&l2>;
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cpu-idle-states = <&CPU_PH20>;
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#cooling-cells = <2>;
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@ -295,7 +296,10 @@
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reg-names = "QuadSPI", "QuadSPI-memory";
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interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
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clock-names = "qspi_en", "qspi";
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clocks = <&clockgen 4 1>, <&clockgen 4 1>;
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clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
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QORIQ_CLK_PLL_DIV(2)>,
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<&clockgen QORIQ_CLK_PLATFORM_PLL
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QORIQ_CLK_PLL_DIV(2)>;
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status = "disabled";
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};
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@ -303,7 +307,7 @@
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compatible = "fsl,ls1046a-esdhc", "fsl,esdhc";
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reg = <0x0 0x1560000 0x0 0x10000>;
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interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clockgen 2 1>;
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clocks = <&clockgen QORIQ_CLK_HWACCEL 1>;
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voltage-ranges = <1800 1800 3300 3300>;
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sdhci,auto-cmd12;
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big-endian;
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@ -479,7 +483,8 @@
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reg = <0x0 0x2100000 0x0 0x10000>;
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interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
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clock-names = "dspi";
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clocks = <&clockgen 4 1>;
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clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
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QORIQ_CLK_PLL_DIV(2)>;
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spi-num-chipselects = <5>;
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big-endian;
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status = "disabled";
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@ -491,7 +496,8 @@
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#size-cells = <0>;
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reg = <0x0 0x2180000 0x0 0x10000>;
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interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clockgen 4 1>;
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clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
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QORIQ_CLK_PLL_DIV(2)>;
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dmas = <&edma0 1 39>,
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<&edma0 1 38>;
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dma-names = "tx", "rx";
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@ -504,7 +510,8 @@
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#size-cells = <0>;
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reg = <0x0 0x2190000 0x0 0x10000>;
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interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clockgen 4 1>;
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clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
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QORIQ_CLK_PLL_DIV(2)>;
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status = "disabled";
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};
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@ -514,7 +521,8 @@
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#size-cells = <0>;
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reg = <0x0 0x21a0000 0x0 0x10000>;
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interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clockgen 4 1>;
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clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
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QORIQ_CLK_PLL_DIV(2)>;
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status = "disabled";
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};
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@ -524,7 +532,8 @@
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#size-cells = <0>;
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reg = <0x0 0x21b0000 0x0 0x10000>;
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interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clockgen 4 1>;
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clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
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QORIQ_CLK_PLL_DIV(2)>;
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status = "disabled";
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};
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@ -532,7 +541,8 @@
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compatible = "fsl,ns16550", "ns16550a";
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reg = <0x00 0x21c0500 0x0 0x100>;
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interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clockgen 4 1>;
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clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
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QORIQ_CLK_PLL_DIV(2)>;
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status = "disabled";
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};
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@ -540,7 +550,8 @@
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compatible = "fsl,ns16550", "ns16550a";
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reg = <0x00 0x21c0600 0x0 0x100>;
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interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clockgen 4 1>;
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clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
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QORIQ_CLK_PLL_DIV(2)>;
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status = "disabled";
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};
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@ -548,7 +559,8 @@
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compatible = "fsl,ns16550", "ns16550a";
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reg = <0x0 0x21d0500 0x0 0x100>;
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interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clockgen 4 1>;
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clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
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QORIQ_CLK_PLL_DIV(2)>;
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status = "disabled";
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};
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@ -556,7 +568,8 @@
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compatible = "fsl,ns16550", "ns16550a";
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reg = <0x0 0x21d0600 0x0 0x100>;
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interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clockgen 4 1>;
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clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
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QORIQ_CLK_PLL_DIV(2)>;
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status = "disabled";
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};
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@ -604,7 +617,8 @@
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compatible = "fsl,ls1021a-lpuart";
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reg = <0x0 0x2950000 0x0 0x1000>;
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interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clockgen 4 0>;
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clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
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QORIQ_CLK_PLL_DIV(1)>;
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clock-names = "ipg";
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status = "disabled";
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};
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@ -613,7 +627,8 @@
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compatible = "fsl,ls1021a-lpuart";
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reg = <0x0 0x2960000 0x0 0x1000>;
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interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clockgen 4 1>;
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clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
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QORIQ_CLK_PLL_DIV(2)>;
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clock-names = "ipg";
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status = "disabled";
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};
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@ -622,7 +637,8 @@
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compatible = "fsl,ls1021a-lpuart";
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reg = <0x0 0x2970000 0x0 0x1000>;
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interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clockgen 4 1>;
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clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
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QORIQ_CLK_PLL_DIV(2)>;
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clock-names = "ipg";
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status = "disabled";
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};
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@ -631,7 +647,8 @@
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compatible = "fsl,ls1021a-lpuart";
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reg = <0x0 0x2980000 0x0 0x1000>;
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interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clockgen 4 1>;
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clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
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QORIQ_CLK_PLL_DIV(2)>;
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clock-names = "ipg";
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status = "disabled";
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};
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@ -640,7 +657,8 @@
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compatible = "fsl,ls1021a-lpuart";
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reg = <0x0 0x2990000 0x0 0x1000>;
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interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clockgen 4 1>;
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clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
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QORIQ_CLK_PLL_DIV(2)>;
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clock-names = "ipg";
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status = "disabled";
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};
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@ -649,7 +667,8 @@
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compatible = "fsl,ls1021a-lpuart";
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reg = <0x0 0x29a0000 0x0 0x1000>;
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interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clockgen 4 1>;
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clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
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QORIQ_CLK_PLL_DIV(2)>;
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clock-names = "ipg";
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status = "disabled";
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};
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@ -658,7 +677,8 @@
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compatible = "fsl,imx21-wdt";
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reg = <0x0 0x2ad0000 0x0 0x10000>;
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interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clockgen 4 1>;
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clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
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QORIQ_CLK_PLL_DIV(2)>;
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big-endian;
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};
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@ -674,8 +694,10 @@
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dma-channels = <32>;
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big-endian;
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clock-names = "dmamux0", "dmamux1";
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clocks = <&clockgen 4 1>,
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<&clockgen 4 1>;
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clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
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QORIQ_CLK_PLL_DIV(2)>,
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<&clockgen QORIQ_CLK_PLATFORM_PLL
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QORIQ_CLK_PLL_DIV(2)>;
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};
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usb0: usb@2f00000 {
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@ -714,7 +736,8 @@
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<0x0 0x20140520 0x0 0x4>;
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reg-names = "ahci", "sata-ecc";
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interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clockgen 4 1>;
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clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
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QORIQ_CLK_PLL_DIV(2)>;
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};
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msi1: msi-controller@1580000 {
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