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clk: stm32mp1: fix bit width of hse_rtc divider 

Fix the bit width of the hse rtc divider because it's off by one.

Fixes: 2c87c9d331 ("clk: stm32mp1: add RTC clock")
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
hifive-unleashed-5.1
Gabriel Fernandez 2019-02-14 11:40:47 +01:00 committed by Stephen Boyd
parent f9b76fd24d
commit 97621d22df
1 changed files with 1 additions and 1 deletions
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2
drivers/clk/clk-stm32mp1.c
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@ -1962,7 +1962,7 @@ static const struct clock_config stm32mp1_clock_cfg[] = {
_DIV(RCC_ETHCKSELR, 4, 4, 0, NULL)),
/* RTC clock */
DIV(NO_ID, "ck_hse_rtc", "ck_hse", 0, RCC_RTCDIVR, 0, 7, 0),
DIV(NO_ID, "ck_hse_rtc", "ck_hse", 0, RCC_RTCDIVR, 0, 6, 0),
COMPOSITE(RTC, "ck_rtc", rtc_src, CLK_OPS_PARENT_ENABLE |
CLK_SET_RATE_PARENT,