ARM: mcpm: Add baremetal voting mutexes
This patch adds a simple low-level voting mutex implementation
to be used to arbitrate during first man selection when no load/store
exclusive instructions are usable.
For want of a better name, these are called "vlocks". (I was
tempted to call them ballot locks, but "block" is way too confusing
an abbreviation...)
There is no function to wait for the lock to be released, and no
vlock_lock() function since we don't need these at the moment.
These could straightforwardly be added if vlocks get used for other
purposes.
For architectural correctness even Strongly-Ordered memory accesses
require barriers in order to guarantee that multiple CPUs have a
coherent view of the ordering of memory accesses. Whether or not
this matters depends on hardware implementation details of the
memory system. Since the purpose of this code is to provide a clean,
generic locking mechanism with no platform-specific dependencies the
barriers should be present to avoid unpleasant surprises on future
platforms.
Note:
* When taking the lock, we don't care about implicit background
memory operations and other signalling which may be pending,
because those are not part of the critical section anyway.
A DMB is sufficient to ensure correctly observed ordering if
the explicit memory accesses in vlock_trylock.
* No barrier is required after checking the election result,
because the result is determined by the store to
VLOCK_OWNER_OFFSET and is already globally observed due to the
barriers in voting_end. This means that global agreement on
the winner is guaranteed, even before the winner is known
locally.
Signed-off-by: Dave Martin <dave.martin@linaro.org>
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Will Deacon <will.deacon@arm.com>
hifive-unleashed-5.1
Dave Martin
Nicolas Pitre
parent
7fe31d28e8
commit
9762f12d3e
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vlocks for Bare-Metal Mutual Exclusion
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======================================
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Voting Locks, or "vlocks" provide a simple low-level mutual exclusion
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mechanism, with reasonable but minimal requirements on the memory
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system.
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These are intended to be used to coordinate critical activity among CPUs
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which are otherwise non-coherent, in situations where the hardware
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provides no other mechanism to support this and ordinary spinlocks
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cannot be used.
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vlocks make use of the atomicity provided by the memory system for
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writes to a single memory location. To arbitrate, every CPU "votes for
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itself", by storing a unique number to a common memory location. The
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final value seen in that memory location when all the votes have been
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cast identifies the winner.
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In order to make sure that the election produces an unambiguous result
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in finite time, a CPU will only enter the election in the first place if
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no winner has been chosen and the election does not appear to have
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started yet.
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Algorithm
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---------
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The easiest way to explain the vlocks algorithm is with some pseudo-code:
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int currently_voting[NR_CPUS] = { 0, };
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int last_vote = -1; /* no votes yet */
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bool vlock_trylock(int this_cpu)
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{
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/* signal our desire to vote */
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currently_voting[this_cpu] = 1;
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if (last_vote != -1) {
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/* someone already volunteered himself */
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currently_voting[this_cpu] = 0;
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return false; /* not ourself */
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}
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/* let's suggest ourself */
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last_vote = this_cpu;
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currently_voting[this_cpu] = 0;
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/* then wait until everyone else is done voting */
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for_each_cpu(i) {
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while (currently_voting[i] != 0)
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/* wait */;
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}
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/* result */
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if (last_vote == this_cpu)
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return true; /* we won */
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return false;
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}
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bool vlock_unlock(void)
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{
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last_vote = -1;
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}
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The currently_voting[] array provides a way for the CPUs to determine
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whether an election is in progress, and plays a role analogous to the
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"entering" array in Lamport's bakery algorithm [1].
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However, once the election has started, the underlying memory system
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atomicity is used to pick the winner. This avoids the need for a static
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priority rule to act as a tie-breaker, or any counters which could
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overflow.
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As long as the last_vote variable is globally visible to all CPUs, it
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will contain only one value that won't change once every CPU has cleared
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its currently_voting flag.
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Features and limitations
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------------------------
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* vlocks are not intended to be fair. In the contended case, it is the
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_last_ CPU which attempts to get the lock which will be most likely
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to win.
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vlocks are therefore best suited to situations where it is necessary
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to pick a unique winner, but it does not matter which CPU actually
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wins.
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* Like other similar mechanisms, vlocks will not scale well to a large
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number of CPUs.
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vlocks can be cascaded in a voting hierarchy to permit better scaling
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if necessary, as in the following hypothetical example for 4096 CPUs:
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/* first level: local election */
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my_town = towns[(this_cpu >> 4) & 0xf];
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I_won = vlock_trylock(my_town, this_cpu & 0xf);
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if (I_won) {
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/* we won the town election, let's go for the state */
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my_state = states[(this_cpu >> 8) & 0xf];
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I_won = vlock_lock(my_state, this_cpu & 0xf));
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if (I_won) {
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/* and so on */
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I_won = vlock_lock(the_whole_country, this_cpu & 0xf];
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if (I_won) {
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/* ... */
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}
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vlock_unlock(the_whole_country);
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}
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vlock_unlock(my_state);
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}
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vlock_unlock(my_town);
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ARM implementation
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------------------
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The current ARM implementation [2] contains some optimisations beyond
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the basic algorithm:
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* By packing the members of the currently_voting array close together,
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we can read the whole array in one transaction (providing the number
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of CPUs potentially contending the lock is small enough). This
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reduces the number of round-trips required to external memory.
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In the ARM implementation, this means that we can use a single load
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and comparison:
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LDR Rt, [Rn]
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CMP Rt, #0
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...in place of code equivalent to:
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LDRB Rt, [Rn]
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CMP Rt, #0
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LDRBEQ Rt, [Rn, #1]
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CMPEQ Rt, #0
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LDRBEQ Rt, [Rn, #2]
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CMPEQ Rt, #0
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LDRBEQ Rt, [Rn, #3]
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CMPEQ Rt, #0
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This cuts down on the fast-path latency, as well as potentially
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reducing bus contention in contended cases.
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The optimisation relies on the fact that the ARM memory system
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guarantees coherency between overlapping memory accesses of
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different sizes, similarly to many other architectures. Note that
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we do not care which element of currently_voting appears in which
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bits of Rt, so there is no need to worry about endianness in this
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optimisation.
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If there are too many CPUs to read the currently_voting array in
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one transaction then multiple transations are still required. The
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implementation uses a simple loop of word-sized loads for this
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case. The number of transactions is still fewer than would be
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required if bytes were loaded individually.
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In principle, we could aggregate further by using LDRD or LDM, but
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to keep the code simple this was not attempted in the initial
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implementation.
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* vlocks are currently only used to coordinate between CPUs which are
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unable to enable their caches yet. This means that the
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implementation removes many of the barriers which would be required
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when executing the algorithm in cached memory.
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packing of the currently_voting array does not work with cached
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memory unless all CPUs contending the lock are cache-coherent, due
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to cache writebacks from one CPU clobbering values written by other
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CPUs. (Though if all the CPUs are cache-coherent, you should be
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probably be using proper spinlocks instead anyway).
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* The "no votes yet" value used for the last_vote variable is 0 (not
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-1 as in the pseudocode). This allows statically-allocated vlocks
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to be implicitly initialised to an unlocked state simply by putting
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them in .bss.
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An offset is added to each CPU's ID for the purpose of setting this
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variable, so that no CPU uses the value 0 for its ID.
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Colophon
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--------
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Originally created and documented by Dave Martin for Linaro Limited, for
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use in ARM-based big.LITTLE platforms, with review and input gratefully
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received from Nicolas Pitre and Achin Gupta. Thanks to Nicolas for
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grabbing most of this text out of the relevant mail thread and writing
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up the pseudocode.
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Copyright (C) 2012-2013 Linaro Limited
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Distributed under the terms of Version 2 of the GNU General Public
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License, as defined in linux/COPYING.
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References
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----------
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[1] Lamport, L. "A New Solution of Dijkstra's Concurrent Programming
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Problem", Communications of the ACM 17, 8 (August 1974), 453-455.
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http://en.wikipedia.org/wiki/Lamport%27s_bakery_algorithm
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[2] linux/arch/arm/common/vlock.S, www.kernel.org.
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@ -0,0 +1,108 @@
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/*
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* vlock.S - simple voting lock implementation for ARM
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*
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* Created by: Dave Martin, 2012-08-16
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* Copyright: (C) 2012-2013 Linaro Limited
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*
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* This algorithm is described in more detail in
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* Documentation/arm/vlocks.txt.
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*/
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#include <linux/linkage.h>
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#include "vlock.h"
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/* Select different code if voting flags can fit in a single word. */
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#if VLOCK_VOTING_SIZE > 4
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#define FEW(x...)
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#define MANY(x...) x
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#else
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#define FEW(x...) x
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#define MANY(x...)
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#endif
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@ voting lock for first-man coordination
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.macro voting_begin rbase:req, rcpu:req, rscratch:req
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mov \rscratch, #1
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strb \rscratch, [\rbase, \rcpu]
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dmb
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.endm
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.macro voting_end rbase:req, rcpu:req, rscratch:req
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dmb
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mov \rscratch, #0
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strb \rscratch, [\rbase, \rcpu]
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dsb
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sev
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.endm
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/*
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* The vlock structure must reside in Strongly-Ordered or Device memory.
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* This implementation deliberately eliminates most of the barriers which
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* would be required for other memory types, and assumes that independent
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* writes to neighbouring locations within a cacheline do not interfere
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* with one another.
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*/
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@ r0: lock structure base
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@ r1: CPU ID (0-based index within cluster)
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ENTRY(vlock_trylock)
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add r1, r1, #VLOCK_VOTING_OFFSET
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voting_begin r0, r1, r2
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ldrb r2, [r0, #VLOCK_OWNER_OFFSET] @ check whether lock is held
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cmp r2, #VLOCK_OWNER_NONE
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bne trylock_fail @ fail if so
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@ Control dependency implies strb not observable before previous ldrb.
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strb r1, [r0, #VLOCK_OWNER_OFFSET] @ submit my vote
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voting_end r0, r1, r2 @ implies DMB
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@ Wait for the current round of voting to finish:
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MANY( mov r3, #VLOCK_VOTING_OFFSET )
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0:
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MANY( ldr r2, [r0, r3] )
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FEW( ldr r2, [r0, #VLOCK_VOTING_OFFSET] )
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cmp r2, #0
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wfene
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bne 0b
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MANY( add r3, r3, #4 )
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MANY( cmp r3, #VLOCK_VOTING_OFFSET + VLOCK_VOTING_SIZE )
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MANY( bne 0b )
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@ Check who won:
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dmb
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ldrb r2, [r0, #VLOCK_OWNER_OFFSET]
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eor r0, r1, r2 @ zero if I won, else nonzero
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bx lr
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trylock_fail:
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voting_end r0, r1, r2
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mov r0, #1 @ nonzero indicates that I lost
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bx lr
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ENDPROC(vlock_trylock)
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@ r0: lock structure base
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ENTRY(vlock_unlock)
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dmb
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mov r1, #VLOCK_OWNER_NONE
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strb r1, [r0, #VLOCK_OWNER_OFFSET]
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dsb
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sev
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bx lr
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ENDPROC(vlock_unlock)
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@ -0,0 +1,29 @@
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/*
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* vlock.h - simple voting lock implementation
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*
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* Created by: Dave Martin, 2012-08-16
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* Copyright: (C) 2012-2013 Linaro Limited
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __VLOCK_H
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#define __VLOCK_H
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#include <asm/mcpm.h>
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/* Offsets and sizes are rounded to a word (4 bytes) */
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#define VLOCK_OWNER_OFFSET 0
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#define VLOCK_VOTING_OFFSET 4
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#define VLOCK_VOTING_SIZE ((MAX_CPUS_PER_CLUSTER + 3) / 4 * 4)
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#define VLOCK_SIZE (VLOCK_VOTING_OFFSET + VLOCK_VOTING_SIZE)
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#define VLOCK_OWNER_NONE 0
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#endif /* ! __VLOCK_H */
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