MIPS: Octeon: refactor swiotlb code
Share a common set of swiotlb operations, and to instead branch out in __phys_to_dma/__dma_to_phys for the PCI vs non-PCI case. Also use const structures for the PCI methods so that attackers can't use them as exploit vectors. Signed-off-by: Christoph Hellwig <hch@lst.de> Patchwork: https://patchwork.linux-mips.org/patch/19532/ Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: David Daney <david.daney@cavium.com> Cc: Kevin Cernekee <cernekee@gmail.com> Cc: Jiaxun Yang <jiaxun.yang@flygoat.com> Cc: Tom Bogendoerfer <tsbogend@alpha.franken.de> Cc: Huacai Chen <chenhc@lemote.com> Cc: iommu@lists.linux-foundation.org Cc: linux-mips@linux-mips.orghifive-unleashed-5.1
Christoph Hellwig
Paul Burton
parent
e20c5074f8
commit
97f9f9763a
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@ -23,10 +23,16 @@
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#include <asm/octeon/octeon.h>
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#ifdef CONFIG_PCI
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#include <linux/pci.h>
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#include <asm/octeon/pci-octeon.h>
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#include <asm/octeon/cvmx-npi-defs.h>
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#include <asm/octeon/cvmx-pci-defs.h>
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struct octeon_dma_map_ops {
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dma_addr_t (*phys_to_dma)(struct device *dev, phys_addr_t paddr);
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phys_addr_t (*dma_to_phys)(struct device *dev, dma_addr_t daddr);
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};
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static dma_addr_t octeon_hole_phys_to_dma(phys_addr_t paddr)
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{
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if (paddr >= CVMX_PCIE_BAR1_PHYS_BASE && paddr < (CVMX_PCIE_BAR1_PHYS_BASE + CVMX_PCIE_BAR1_PHYS_SIZE))
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@ -60,6 +66,11 @@ static phys_addr_t octeon_gen1_dma_to_phys(struct device *dev, dma_addr_t daddr)
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return daddr;
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}
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static const struct octeon_dma_map_ops octeon_gen1_ops = {
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.phys_to_dma = octeon_gen1_phys_to_dma,
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.dma_to_phys = octeon_gen1_dma_to_phys,
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};
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static dma_addr_t octeon_gen2_phys_to_dma(struct device *dev, phys_addr_t paddr)
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{
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return octeon_hole_phys_to_dma(paddr);
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@ -70,6 +81,11 @@ static phys_addr_t octeon_gen2_dma_to_phys(struct device *dev, dma_addr_t daddr)
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return octeon_hole_dma_to_phys(daddr);
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}
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static const struct octeon_dma_map_ops octeon_gen2_ops = {
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.phys_to_dma = octeon_gen2_phys_to_dma,
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.dma_to_phys = octeon_gen2_dma_to_phys,
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};
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static dma_addr_t octeon_big_phys_to_dma(struct device *dev, phys_addr_t paddr)
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{
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if (paddr >= 0x410000000ull && paddr < 0x420000000ull)
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@ -92,6 +108,11 @@ static phys_addr_t octeon_big_dma_to_phys(struct device *dev, dma_addr_t daddr)
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return daddr;
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}
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static const struct octeon_dma_map_ops octeon_big_ops = {
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.phys_to_dma = octeon_big_phys_to_dma,
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.dma_to_phys = octeon_big_dma_to_phys,
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};
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static dma_addr_t octeon_small_phys_to_dma(struct device *dev,
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phys_addr_t paddr)
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{
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@ -120,6 +141,32 @@ static phys_addr_t octeon_small_dma_to_phys(struct device *dev,
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return daddr;
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}
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static const struct octeon_dma_map_ops octeon_small_ops = {
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.phys_to_dma = octeon_small_phys_to_dma,
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.dma_to_phys = octeon_small_dma_to_phys,
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};
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static const struct octeon_dma_map_ops *octeon_pci_dma_ops;
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void __init octeon_pci_dma_init(void)
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{
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switch (octeon_dma_bar_type) {
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case OCTEON_DMA_BAR_TYPE_PCIE:
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octeon_pci_dma_ops = &octeon_gen1_ops;
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break;
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case OCTEON_DMA_BAR_TYPE_PCIE2:
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octeon_pci_dma_ops = &octeon_gen2_ops;
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break;
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case OCTEON_DMA_BAR_TYPE_BIG:
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octeon_pci_dma_ops = &octeon_big_ops;
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break;
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case OCTEON_DMA_BAR_TYPE_SMALL:
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octeon_pci_dma_ops = &octeon_small_ops;
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break;
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default:
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BUG();
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}
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}
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#endif /* CONFIG_PCI */
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static dma_addr_t octeon_dma_map_page(struct device *dev, struct page *page,
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@ -165,57 +212,37 @@ static void *octeon_dma_alloc_coherent(struct device *dev, size_t size,
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return ret;
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}
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static dma_addr_t octeon_unity_phys_to_dma(struct device *dev, phys_addr_t paddr)
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{
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return paddr;
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}
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static phys_addr_t octeon_unity_dma_to_phys(struct device *dev, dma_addr_t daddr)
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{
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return daddr;
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}
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struct octeon_dma_map_ops {
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const struct dma_map_ops dma_map_ops;
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dma_addr_t (*phys_to_dma)(struct device *dev, phys_addr_t paddr);
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phys_addr_t (*dma_to_phys)(struct device *dev, dma_addr_t daddr);
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};
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dma_addr_t __phys_to_dma(struct device *dev, phys_addr_t paddr)
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{
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struct octeon_dma_map_ops *ops = container_of(get_dma_ops(dev),
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struct octeon_dma_map_ops,
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dma_map_ops);
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return ops->phys_to_dma(dev, paddr);
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#ifdef CONFIG_PCI
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if (dev && dev_is_pci(dev))
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return octeon_pci_dma_ops->phys_to_dma(dev, paddr);
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#endif
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return paddr;
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}
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phys_addr_t __dma_to_phys(struct device *dev, dma_addr_t daddr)
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{
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struct octeon_dma_map_ops *ops = container_of(get_dma_ops(dev),
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struct octeon_dma_map_ops,
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dma_map_ops);
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return ops->dma_to_phys(dev, daddr);
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#ifdef CONFIG_PCI
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if (dev && dev_is_pci(dev))
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return octeon_pci_dma_ops->dma_to_phys(dev, daddr);
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#endif
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return daddr;
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}
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static struct octeon_dma_map_ops octeon_linear_dma_map_ops = {
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.dma_map_ops = {
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.alloc = octeon_dma_alloc_coherent,
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.free = swiotlb_free,
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.map_page = octeon_dma_map_page,
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.unmap_page = swiotlb_unmap_page,
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.map_sg = octeon_dma_map_sg,
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.unmap_sg = swiotlb_unmap_sg_attrs,
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.sync_single_for_cpu = swiotlb_sync_single_for_cpu,
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.sync_single_for_device = octeon_dma_sync_single_for_device,
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.sync_sg_for_cpu = swiotlb_sync_sg_for_cpu,
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.sync_sg_for_device = octeon_dma_sync_sg_for_device,
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.mapping_error = swiotlb_dma_mapping_error,
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.dma_supported = swiotlb_dma_supported
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},
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.phys_to_dma = octeon_unity_phys_to_dma,
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.dma_to_phys = octeon_unity_dma_to_phys
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static const struct dma_map_ops octeon_swiotlb_ops = {
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.alloc = octeon_dma_alloc_coherent,
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.free = swiotlb_free,
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.map_page = octeon_dma_map_page,
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.unmap_page = swiotlb_unmap_page,
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.map_sg = octeon_dma_map_sg,
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.unmap_sg = swiotlb_unmap_sg_attrs,
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.sync_single_for_cpu = swiotlb_sync_single_for_cpu,
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.sync_single_for_device = octeon_dma_sync_single_for_device,
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.sync_sg_for_cpu = swiotlb_sync_sg_for_cpu,
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.sync_sg_for_device = octeon_dma_sync_sg_for_device,
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.mapping_error = swiotlb_dma_mapping_error,
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.dma_supported = swiotlb_dma_supported
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};
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char *octeon_swiotlb;
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@ -281,51 +308,5 @@ void __init plat_swiotlb_setup(void)
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if (swiotlb_init_with_tbl(octeon_swiotlb, swiotlb_nslabs, 1) == -ENOMEM)
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panic("Cannot allocate SWIOTLB buffer");
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mips_dma_map_ops = &octeon_linear_dma_map_ops.dma_map_ops;
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mips_dma_map_ops = &octeon_swiotlb_ops;
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}
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#ifdef CONFIG_PCI
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static struct octeon_dma_map_ops _octeon_pci_dma_map_ops = {
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.dma_map_ops = {
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.alloc = octeon_dma_alloc_coherent,
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.free = swiotlb_free,
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.map_page = octeon_dma_map_page,
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.unmap_page = swiotlb_unmap_page,
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.map_sg = octeon_dma_map_sg,
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.unmap_sg = swiotlb_unmap_sg_attrs,
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.sync_single_for_cpu = swiotlb_sync_single_for_cpu,
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.sync_single_for_device = octeon_dma_sync_single_for_device,
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.sync_sg_for_cpu = swiotlb_sync_sg_for_cpu,
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.sync_sg_for_device = octeon_dma_sync_sg_for_device,
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.mapping_error = swiotlb_dma_mapping_error,
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.dma_supported = swiotlb_dma_supported
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},
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};
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const struct dma_map_ops *octeon_pci_dma_map_ops;
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void __init octeon_pci_dma_init(void)
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{
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switch (octeon_dma_bar_type) {
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case OCTEON_DMA_BAR_TYPE_PCIE2:
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_octeon_pci_dma_map_ops.phys_to_dma = octeon_gen2_phys_to_dma;
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_octeon_pci_dma_map_ops.dma_to_phys = octeon_gen2_dma_to_phys;
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break;
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case OCTEON_DMA_BAR_TYPE_PCIE:
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_octeon_pci_dma_map_ops.phys_to_dma = octeon_gen1_phys_to_dma;
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_octeon_pci_dma_map_ops.dma_to_phys = octeon_gen1_dma_to_phys;
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break;
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case OCTEON_DMA_BAR_TYPE_BIG:
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_octeon_pci_dma_map_ops.phys_to_dma = octeon_big_phys_to_dma;
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_octeon_pci_dma_map_ops.dma_to_phys = octeon_big_dma_to_phys;
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break;
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case OCTEON_DMA_BAR_TYPE_SMALL:
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_octeon_pci_dma_map_ops.phys_to_dma = octeon_small_phys_to_dma;
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_octeon_pci_dma_map_ops.dma_to_phys = octeon_small_dma_to_phys;
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break;
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default:
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BUG();
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}
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octeon_pci_dma_map_ops = &_octeon_pci_dma_map_ops.dma_map_ops;
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}
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#endif /* CONFIG_PCI */
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@ -72,8 +72,6 @@ static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size)
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dma_addr_t __phys_to_dma(struct device *dev, phys_addr_t paddr);
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phys_addr_t __dma_to_phys(struct device *dev, dma_addr_t daddr);
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struct dma_map_ops;
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extern const struct dma_map_ops *octeon_pci_dma_map_ops;
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extern char *octeon_swiotlb;
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#endif /* __ASM_MACH_CAVIUM_OCTEON_DMA_COHERENCE_H */
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@ -166,8 +166,6 @@ int pcibios_plat_dev_init(struct pci_dev *dev)
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pci_write_config_dword(dev, pos + PCI_ERR_ROOT_STATUS, dconfig);
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}
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dev->dev.dma_ops = octeon_pci_dma_map_ops;
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return 0;
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}
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