drm/i915/bxt: Add WaDisableSbeCacheDispatchPortSharing
Note that we also need this for skl. Signed-off-by: Nick Hoath <nicholas.hoath@intel.com> Reviewed-by: Imre Deak <imre.deak@intel.com> [danvet: Note that we also need this for skl, requested by Imre.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -6738,6 +6738,7 @@ enum skl_disp_power_wells {
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#define GEN7_HALF_SLICE_CHICKEN1_GT2 0xf100
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#define GEN7_MAX_PS_THREAD_DEP (8<<12)
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#define GEN7_SINGLE_SUBSCAN_DISPATCH_ENABLE (1<<10)
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#define GEN7_SBE_SS_CACHE_DISPATCH_PORT_SHARING_DISABLE (1<<4)
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#define GEN7_PSD_SINGLE_PORT_DISPATCH_ENABLE (1<<3)
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#define GEN9_HALF_SLICE_CHICKEN5 0xe188
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@ -1050,6 +1050,13 @@ static int bxt_init_workarounds(struct intel_engine_cs *ring)
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WA_SET_BIT_MASKED(GEN8_ROW_CHICKEN,
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STALL_DOP_GATING_DISABLE);
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/* WaDisableSbeCacheDispatchPortSharing:bxt */
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if (INTEL_REVID(dev) <= BXT_REVID_B0) {
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WA_SET_BIT_MASKED(
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GEN7_HALF_SLICE_CHICKEN1,
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GEN7_SBE_SS_CACHE_DISPATCH_PORT_SHARING_DISABLE);
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}
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return 0;
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}
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