arm64: dts: marvell: describe the PIC and PMU on Armada 7K/8K
This commit adds the necessary Device Tree description for the PIC interrupt controller and the PMU available in the Marvell Armada 7K and Armada 8K SoCs. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
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@ -128,6 +128,12 @@
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<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>;
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};
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pmu {
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compatible = "arm,cortex-a72-pmu";
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interrupt-parent = <&pic>;
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interrupts = <17>;
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};
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odmi: odmi@300000 {
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compatible = "marvell,odmi-controller";
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interrupt-controller;
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@ -140,6 +146,14 @@
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marvell,spi-base = <128>, <136>, <144>, <152>;
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};
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pic: interrupt-controller@3f0100 {
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compatible = "marvell,armada-8k-pic";
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reg = <0x3f0100 0x10>;
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#interrupt-cells = <1>;
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interrupt-controller;
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interrupts = <GIC_PPI 15 IRQ_TYPE_LEVEL_HIGH>;
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};
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xor@400000 {
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compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
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reg = <0x400000 0x1000>,
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