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drm/i915/perf: use the lrc_desc to get the ctx hw id in gen8-10 

The upper 32 bits of the lrc_desc (bits 52-32 to be precise) are the
context hw id in GEN8-10, so use them and have one less thing to
maintain in the unlikely case we change the descriptor sw fields.

v2: If we use the lrc_desc, we must apply the ctx_id_mask too (Lionel)

Signed-off-by: Michel Thierry <michel.thierry@intel.com>
Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180604233250.609-1-michel.thierry@intel.com
hifive-unleashed-5.1
Michel Thierry 2018-06-04 16:32:49 -07:00 committed by Lionel Landwerlin
parent 746c8f143a
commit 9904b1560e
1 changed files with 4 additions and 1 deletions
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5
drivers/gpu/drm/i915/i915_perf.c
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@ -1279,9 +1279,12 @@ static int oa_get_render_ctx_id(struct i915_perf_stream *stream)
i915->perf.oa.specific_ctx_id_mask =
(1U << (GEN8_CTX_ID_WIDTH - 1)) - 1;
} else {
i915->perf.oa.specific_ctx_id = stream->ctx->hw_id;
i915->perf.oa.specific_ctx_id_mask =
(1U << GEN8_CTX_ID_WIDTH) - 1;
i915->perf.oa.specific_ctx_id =
upper_32_bits(ce->lrc_desc);
i915->perf.oa.specific_ctx_id &=
i915->perf.oa.specific_ctx_id_mask;
}
break;