powerpc: 8xx: fix whitespace and indentation
Rolling forward PCMCIA driver, it was discovered that the indentation in existing one, as well as in BSP side are very odd. This patch is just result of Lindent run ontop of culprit files. Signed-off-by: Vitaly Bordug <vitb@kernel.crashing.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Olof Johansson <olof@lixom.net> Cc: Dominik Brodowski <linux@dominikbrodowski.net> Cc: Paul Mackerras <paulus@samba.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Kumar Gala <galak@gate.crashing.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This commit is contained in:
Vitaly Bordug
Linus Torvalds
parent
2a7326b5bb
commit
99121c0da3
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@ -40,7 +40,7 @@
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#include <asm/prom.h>
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extern void cpm_reset(void);
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extern void mpc8xx_show_cpuinfo(struct seq_file*);
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extern void mpc8xx_show_cpuinfo(struct seq_file *);
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extern void mpc8xx_restart(char *cmd);
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extern void mpc8xx_calibrate_decr(void);
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extern int mpc8xx_set_rtc_time(struct rtc_time *tm);
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@ -48,9 +48,9 @@ extern void mpc8xx_get_rtc_time(struct rtc_time *tm);
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extern void m8xx_pic_init(void);
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extern unsigned int mpc8xx_get_irq(void);
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static void init_smc1_uart_ioports(struct fs_uart_platform_info* fpi);
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static void init_smc2_uart_ioports(struct fs_uart_platform_info* fpi);
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static void init_scc3_ioports(struct fs_platform_info* ptr);
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static void init_smc1_uart_ioports(struct fs_uart_platform_info *fpi);
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static void init_smc2_uart_ioports(struct fs_uart_platform_info *fpi);
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static void init_scc3_ioports(struct fs_platform_info *ptr);
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#ifdef CONFIG_PCMCIA_M8XX
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static void pcmcia_hw_setup(int slot, int enable)
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@ -73,7 +73,7 @@ static int pcmcia_set_voltage(int slot, int vcc, int vpp)
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bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
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switch(vcc) {
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switch (vcc) {
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case 0:
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break;
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case 33:
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@ -86,12 +86,12 @@ static int pcmcia_set_voltage(int slot, int vcc, int vpp)
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return 1;
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}
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switch(vpp) {
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switch (vpp) {
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case 0:
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break;
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case 33:
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case 50:
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if(vcc == vpp)
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if (vcc == vpp)
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reg |= BCSR1_PCCVPP1;
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else
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return 1;
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@ -127,7 +127,7 @@ void __init mpc885ads_board_setup(void)
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#endif
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bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
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cp = (cpm8xx_t *)immr_map(im_cpm);
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cp = (cpm8xx_t *) immr_map(im_cpm);
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if (bcsr_io == NULL) {
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printk(KERN_CRIT "Could not remap BCSR\n");
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@ -140,13 +140,13 @@ void __init mpc885ads_board_setup(void)
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out_8(&(cp->cp_smc[0].smc_smcm), tmpval8);
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clrbits16(&cp->cp_smc[0].smc_smcmr, SMCMR_REN | SMCMR_TEN); /* brg1 */
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#else
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setbits32(bcsr_io,BCSR1_RS232EN_1);
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setbits32(bcsr_io, BCSR1_RS232EN_1);
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out_be16(&cp->cp_smc[0].smc_smcmr, 0);
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out_8(&cp->cp_smc[0].smc_smce, 0);
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#endif
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#ifdef CONFIG_SERIAL_CPM_SMC2
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clrbits32(bcsr_io,BCSR1_RS232EN_2);
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clrbits32(bcsr_io, BCSR1_RS232EN_2);
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clrbits32(&cp->cp_simode, 0xe0000000 >> 1);
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setbits32(&cp->cp_simode, 0x20000000 >> 1); /* brg2 */
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tmpval8 = in_8(&(cp->cp_smc[1].smc_smcm)) | (SMCM_RX | SMCM_TX);
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@ -155,7 +155,7 @@ void __init mpc885ads_board_setup(void)
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init_smc2_uart_ioports(0);
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#else
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setbits32(bcsr_io,BCSR1_RS232EN_2);
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setbits32(bcsr_io, BCSR1_RS232EN_2);
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out_be16(&cp->cp_smc[1].smc_smcmr, 0);
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out_8(&cp->cp_smc[1].smc_smce, 0);
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#endif
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@ -164,16 +164,16 @@ void __init mpc885ads_board_setup(void)
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#ifdef CONFIG_FS_ENET
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/* use MDC for MII (common) */
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io_port = (iop8xx_t*)immr_map(im_ioport);
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io_port = (iop8xx_t *) immr_map(im_ioport);
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setbits16(&io_port->iop_pdpar, 0x0080);
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clrbits16(&io_port->iop_pddir, 0x0080);
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bcsr_io = ioremap(BCSR5, sizeof(unsigned long));
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clrbits32(bcsr_io,BCSR5_MII1_EN);
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clrbits32(bcsr_io,BCSR5_MII1_RST);
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clrbits32(bcsr_io, BCSR5_MII1_EN);
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clrbits32(bcsr_io, BCSR5_MII1_RST);
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#ifndef CONFIG_FC_ENET_HAS_SCC
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clrbits32(bcsr_io,BCSR5_MII2_EN);
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clrbits32(bcsr_io,BCSR5_MII2_RST);
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clrbits32(bcsr_io, BCSR5_MII2_EN);
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clrbits32(bcsr_io, BCSR5_MII2_RST);
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#endif
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iounmap(bcsr_io);
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@ -182,17 +182,16 @@ void __init mpc885ads_board_setup(void)
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#endif
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#ifdef CONFIG_PCMCIA_M8XX
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/*Set up board specific hook-ups*/
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/*Set up board specific hook-ups */
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m8xx_pcmcia_ops.hw_ctrl = pcmcia_hw_setup;
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m8xx_pcmcia_ops.voltage_set = pcmcia_set_voltage;
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#endif
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}
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static void init_fec1_ioports(struct fs_platform_info* ptr)
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static void init_fec1_ioports(struct fs_platform_info *ptr)
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{
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cpm8xx_t *cp = (cpm8xx_t *)immr_map(im_cpm);
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iop8xx_t *io_port = (iop8xx_t *)immr_map(im_ioport);
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cpm8xx_t *cp = (cpm8xx_t *) immr_map(im_cpm);
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iop8xx_t *io_port = (iop8xx_t *) immr_map(im_ioport);
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/* configure FEC1 pins */
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setbits16(&io_port->iop_papar, 0xf830);
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@ -214,11 +213,10 @@ static void init_fec1_ioports(struct fs_platform_info* ptr)
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immr_unmap(cp);
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}
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static void init_fec2_ioports(struct fs_platform_info* ptr)
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static void init_fec2_ioports(struct fs_platform_info *ptr)
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{
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cpm8xx_t *cp = (cpm8xx_t *)immr_map(im_cpm);
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iop8xx_t *io_port = (iop8xx_t *)immr_map(im_ioport);
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cpm8xx_t *cp = (cpm8xx_t *) immr_map(im_cpm);
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iop8xx_t *io_port = (iop8xx_t *) immr_map(im_ioport);
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/* configure FEC2 pins */
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setbits32(&cp->cp_pepar, 0x0003fffc);
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@ -248,15 +246,15 @@ void init_fec_ioports(struct fs_platform_info *fpi)
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}
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}
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static void init_scc3_ioports(struct fs_platform_info* fpi)
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static void init_scc3_ioports(struct fs_platform_info *fpi)
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{
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unsigned *bcsr_io;
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iop8xx_t *io_port;
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cpm8xx_t *cp;
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bcsr_io = ioremap(BCSR_ADDR, BCSR_SIZE);
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io_port = (iop8xx_t *)immr_map(im_ioport);
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cp = (cpm8xx_t *)immr_map(im_cpm);
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io_port = (iop8xx_t *) immr_map(im_ioport);
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cp = (cpm8xx_t *) immr_map(im_cpm);
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if (bcsr_io == NULL) {
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printk(KERN_CRIT "Could not remap BCSR\n");
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@ -265,9 +263,9 @@ static void init_scc3_ioports(struct fs_platform_info* fpi)
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/* Enable the PHY.
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*/
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clrbits32(bcsr_io+4, BCSR4_ETH10_RST);
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clrbits32(bcsr_io + 4, BCSR4_ETH10_RST);
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udelay(1000);
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setbits32(bcsr_io+4, BCSR4_ETH10_RST);
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setbits32(bcsr_io + 4, BCSR4_ETH10_RST);
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/* Configure port A pins for Txd and Rxd.
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*/
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setbits16(&io_port->iop_papar, PA_ENET_RXD | PA_ENET_TXD);
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@ -283,8 +281,7 @@ static void init_scc3_ioports(struct fs_platform_info* fpi)
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*/
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setbits32(&cp->cp_pepar, PE_ENET_TCLK | PE_ENET_RCLK);
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clrbits32(&cp->cp_pepar, PE_ENET_TENA);
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clrbits32(&cp->cp_pedir,
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PE_ENET_TCLK | PE_ENET_RCLK | PE_ENET_TENA);
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clrbits32(&cp->cp_pedir, PE_ENET_TCLK | PE_ENET_RCLK | PE_ENET_TENA);
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clrbits32(&cp->cp_peso, PE_ENET_TCLK | PE_ENET_RCLK);
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setbits32(&cp->cp_peso, PE_ENET_TENA);
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@ -308,7 +305,7 @@ static void init_scc3_ioports(struct fs_platform_info* fpi)
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clrbits32(&cp->cp_pedir, PE_ENET_TENA);
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setbits32(&cp->cp_peso, PE_ENET_TENA);
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setbits32(bcsr_io+4, BCSR1_ETHEN);
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setbits32(bcsr_io + 4, BCSR1_ETHEN);
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iounmap(bcsr_io);
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immr_unmap(io_port);
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immr_unmap(cp);
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@ -328,14 +325,12 @@ void init_scc_ioports(struct fs_platform_info *fpi)
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}
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}
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static void init_smc1_uart_ioports(struct fs_uart_platform_info* ptr)
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static void init_smc1_uart_ioports(struct fs_uart_platform_info *ptr)
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{
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unsigned *bcsr_io;
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cpm8xx_t *cp;
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cp = (cpm8xx_t *)immr_map(im_cpm);
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cp = (cpm8xx_t *) immr_map(im_cpm);
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setbits32(&cp->cp_pepar, 0x000000c0);
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clrbits32(&cp->cp_pedir, 0x000000c0);
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clrbits32(&cp->cp_peso, 0x00000040);
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@ -348,16 +343,16 @@ static void init_smc1_uart_ioports(struct fs_uart_platform_info* ptr)
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printk(KERN_CRIT "Could not remap BCSR1\n");
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return;
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}
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clrbits32(bcsr_io,BCSR1_RS232EN_1);
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clrbits32(bcsr_io, BCSR1_RS232EN_1);
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iounmap(bcsr_io);
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}
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static void init_smc2_uart_ioports(struct fs_uart_platform_info* fpi)
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static void init_smc2_uart_ioports(struct fs_uart_platform_info *fpi)
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{
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unsigned *bcsr_io;
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cpm8xx_t *cp;
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cp = (cpm8xx_t *)immr_map(im_cpm);
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cp = (cpm8xx_t *) immr_map(im_cpm);
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setbits32(&cp->cp_pepar, 0x00000c00);
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clrbits32(&cp->cp_pedir, 0x00000c00);
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clrbits32(&cp->cp_peso, 0x00000400);
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@ -370,7 +365,7 @@ static void init_smc2_uart_ioports(struct fs_uart_platform_info* fpi)
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printk(KERN_CRIT "Could not remap BCSR1\n");
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return;
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}
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clrbits32(bcsr_io,BCSR1_RS232EN_2);
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clrbits32(bcsr_io, BCSR1_RS232EN_2);
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iounmap(bcsr_io);
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}
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@ -444,15 +439,11 @@ static int __init mpc885ads_probe(void)
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return 1;
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}
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define_machine(mpc885_ads) {
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.name = "MPC885 ADS",
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.probe = mpc885ads_probe,
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.setup_arch = mpc885ads_setup_arch,
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.init_IRQ = m8xx_pic_init,
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.show_cpuinfo = mpc8xx_show_cpuinfo,
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.get_irq = mpc8xx_get_irq,
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.restart = mpc8xx_restart,
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.calibrate_decr = mpc8xx_calibrate_decr,
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.set_rtc_time = mpc8xx_set_rtc_time,
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.get_rtc_time = mpc8xx_get_rtc_time,
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};
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define_machine(mpc885_ads)
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{
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.name = "MPC885 ADS",.probe = mpc885ads_probe,.setup_arch =
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mpc885ads_setup_arch,.init_IRQ =
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m8xx_pic_init,.show_cpuinfo = mpc8xx_show_cpuinfo,.get_irq =
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mpc8xx_get_irq,.restart = mpc8xx_restart,.calibrate_decr =
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mpc8xx_calibrate_decr,.set_rtc_time =
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mpc8xx_set_rtc_time,.get_rtc_time = mpc8xx_get_rtc_time,};
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@ -224,7 +224,7 @@ struct event_table {
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static const char driver_name[] = "m8xx-pcmcia";
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struct socket_info {
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void (*handler)(void *info, u32 events);
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void (*handler) (void *info, u32 events);
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void *info;
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u32 slot;
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@ -248,8 +248,7 @@ static struct socket_info socket[PCMCIA_SOCKETS_NO];
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#define M8XX_SIZES_NO 32
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static const u32 m8xx_size_to_gray[M8XX_SIZES_NO] =
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{
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static const u32 m8xx_size_to_gray[M8XX_SIZES_NO] = {
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0x00000001, 0x00000002, 0x00000008, 0x00000004,
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0x00000080, 0x00000040, 0x00000010, 0x00000020,
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0x00008000, 0x00004000, 0x00001000, 0x00002000,
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@ -289,8 +288,9 @@ static int voltage_set(int slot, int vcc, int vpp)
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{
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u32 reg = 0;
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switch(vcc) {
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case 0: break;
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switch (vcc) {
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case 0:
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break;
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case 33:
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reg |= BCSR1_PCVCTL4;
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break;
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@ -301,11 +301,12 @@ static int voltage_set(int slot, int vcc, int vpp)
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return 1;
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}
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switch(vpp) {
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case 0: break;
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switch (vpp) {
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case 0:
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break;
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case 33:
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case 50:
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if(vcc == vpp)
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if (vcc == vpp)
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reg |= BCSR1_PCVCTL6;
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else
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return 1;
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@ -316,16 +317,20 @@ static int voltage_set(int slot, int vcc, int vpp)
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return 1;
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}
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if(!((vcc == 50) || (vcc == 0)))
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if (!((vcc == 50) || (vcc == 0)))
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return 1;
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/* first, turn off all power */
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out_be32(((u32 *)RPX_CSR_ADDR), in_be32(((u32 *)RPX_CSR_ADDR)) & ~(BCSR1_PCVCTL4 | BCSR1_PCVCTL5 | BCSR1_PCVCTL6 | BCSR1_PCVCTL7));
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out_be32(((u32 *) RPX_CSR_ADDR),
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in_be32(((u32 *) RPX_CSR_ADDR)) & ~(BCSR1_PCVCTL4 |
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BCSR1_PCVCTL5 |
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BCSR1_PCVCTL6 |
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BCSR1_PCVCTL7));
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/* enable new powersettings */
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out_be32(((u32 *)RPX_CSR_ADDR), in_be32(((u32 *)RPX_CSR_ADDR)) | reg);
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out_be32(((u32 *) RPX_CSR_ADDR), in_be32(((u32 *) RPX_CSR_ADDR)) | reg);
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return 0;
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}
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@ -346,7 +351,7 @@ static int voltage_set(int slot, int vcc, int vpp)
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{
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u32 reg = 0;
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switch(vcc) {
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switch (vcc) {
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case 0:
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break;
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case 33:
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@ -359,12 +364,12 @@ static int voltage_set(int slot, int vcc, int vpp)
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return 1;
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}
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switch(vpp) {
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switch (vpp) {
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case 0:
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break;
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case 33:
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case 50:
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if(vcc == vpp)
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if (vcc == vpp)
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reg |= BCSR1_PCCVPP1;
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else
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return 1;
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@ -379,10 +384,12 @@ static int voltage_set(int slot, int vcc, int vpp)
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}
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/* first, turn off all power */
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out_be32((u32 *)BCSR1, in_be32((u32 *)BCSR1) & ~(BCSR1_PCCVCC_MASK | BCSR1_PCCVPP_MASK));
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out_be32((u32 *) BCSR1,
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in_be32((u32 *) BCSR1) & ~(BCSR1_PCCVCC_MASK |
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BCSR1_PCCVPP_MASK));
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/* enable new powersettings */
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out_be32((u32 *)BCSR1, in_be32((u32 *)BCSR1) | reg);
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out_be32((u32 *) BCSR1, in_be32((u32 *) BCSR1) | reg);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -391,12 +398,12 @@ static int voltage_set(int slot, int vcc, int vpp)
|
|||
|
||||
static void hardware_enable(int slot)
|
||||
{
|
||||
out_be32((u32 *)BCSR1, in_be32((u32 *)BCSR1) & ~BCSR1_PCCEN);
|
||||
out_be32((u32 *) BCSR1, in_be32((u32 *) BCSR1) & ~BCSR1_PCCEN);
|
||||
}
|
||||
|
||||
static void hardware_disable(int slot)
|
||||
{
|
||||
out_be32((u32 *)BCSR1, in_be32((u32 *)BCSR1) | BCSR1_PCCEN);
|
||||
out_be32((u32 *) BCSR1, in_be32((u32 *) BCSR1) | BCSR1_PCCEN);
|
||||
}
|
||||
|
||||
#endif
|
||||
|
|
@ -436,7 +443,7 @@ static int voltage_set(int slot, int vcc, int vpp)
|
|||
{
|
||||
u8 reg = 0;
|
||||
|
||||
switch(vcc) {
|
||||
switch (vcc) {
|
||||
case 0:
|
||||
break;
|
||||
case 33:
|
||||
|
|
@ -449,12 +456,12 @@ static int voltage_set(int slot, int vcc, int vpp)
|
|||
return 1;
|
||||
}
|
||||
|
||||
switch(vpp) {
|
||||
switch (vpp) {
|
||||
case 0:
|
||||
break;
|
||||
case 33:
|
||||
case 50:
|
||||
if(vcc == vpp)
|
||||
if (vcc == vpp)
|
||||
reg |= CSR2_VPP_VCC;
|
||||
else
|
||||
return 1;
|
||||
|
|
@ -469,10 +476,11 @@ static int voltage_set(int slot, int vcc, int vpp)
|
|||
}
|
||||
|
||||
/* first, turn off all power */
|
||||
out_8((u8 *)MBX_CSR2_ADDR, in_8((u8 *)MBX_CSR2_ADDR) & ~(CSR2_VCC_MASK | CSR2_VPP_MASK));
|
||||
out_8((u8 *) MBX_CSR2_ADDR,
|
||||
in_8((u8 *) MBX_CSR2_ADDR) & ~(CSR2_VCC_MASK | CSR2_VPP_MASK));
|
||||
|
||||
/* enable new powersettings */
|
||||
out_8((u8 *)MBX_CSR2_ADDR, in_8((u8 *)MBX_CSR2_ADDR) | reg);
|
||||
out_8((u8 *) MBX_CSR2_ADDR, in_8((u8 *) MBX_CSR2_ADDR) | reg);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -495,7 +503,7 @@ static int voltage_set(int slot, int vcc, int vpp)
|
|||
u8 regread;
|
||||
cpld_regs *ccpld = get_cpld();
|
||||
|
||||
switch(vcc) {
|
||||
switch (vcc) {
|
||||
case 0:
|
||||
break;
|
||||
case 33:
|
||||
|
|
@ -508,12 +516,12 @@ static int voltage_set(int slot, int vcc, int vpp)
|
|||
return 1;
|
||||
}
|
||||
|
||||
switch(vpp) {
|
||||
switch (vpp) {
|
||||
case 0:
|
||||
break;
|
||||
case 33:
|
||||
case 50:
|
||||
if(vcc == vpp)
|
||||
if (vcc == vpp)
|
||||
reg |= PCMCIA_VPP_VCC;
|
||||
else
|
||||
return 1;
|
||||
|
|
@ -529,9 +537,12 @@ static int voltage_set(int slot, int vcc, int vpp)
|
|||
|
||||
reg = reg >> (slot << 2);
|
||||
regread = in_8(&ccpld->fpga_pc_ctl);
|
||||
if (reg != (regread & ((PCMCIA_VCC_MASK | PCMCIA_VPP_MASK) >> (slot << 2)))) {
|
||||
if (reg !=
|
||||
(regread & ((PCMCIA_VCC_MASK | PCMCIA_VPP_MASK) >> (slot << 2)))) {
|
||||
/* enable new powersettings */
|
||||
regread = regread & ~((PCMCIA_VCC_MASK | PCMCIA_VPP_MASK) >> (slot << 2));
|
||||
regread =
|
||||
regread & ~((PCMCIA_VCC_MASK | PCMCIA_VPP_MASK) >>
|
||||
(slot << 2));
|
||||
out_8(&ccpld->fpga_pc_ctl, reg | regread);
|
||||
msleep(100);
|
||||
}
|
||||
|
|
@ -562,13 +573,13 @@ static irqreturn_t m8xx_interrupt(int irq, void *dev)
|
|||
pipr = in_be32(&pcmcia->pcmc_pipr);
|
||||
per = in_be32(&pcmcia->pcmc_per);
|
||||
|
||||
for(i = 0; i < PCMCIA_SOCKETS_NO; i++) {
|
||||
for (i = 0; i < PCMCIA_SOCKETS_NO; i++) {
|
||||
s = &socket[i];
|
||||
e = &s->events[0];
|
||||
events = 0;
|
||||
|
||||
while(e->regbit) {
|
||||
if(pscr & e->regbit)
|
||||
while (e->regbit) {
|
||||
if (pscr & e->regbit)
|
||||
events |= e->eventbit;
|
||||
|
||||
e++;
|
||||
|
|
@ -579,13 +590,11 @@ static irqreturn_t m8xx_interrupt(int irq, void *dev)
|
|||
* not too nice done,
|
||||
* we depend on that CD2 is the bit to the left of CD1...
|
||||
*/
|
||||
if(events & SS_DETECT)
|
||||
if(((pipr & M8XX_PCMCIA_CD2(i)) >> 1) ^
|
||||
(pipr & M8XX_PCMCIA_CD1(i)))
|
||||
{
|
||||
if (events & SS_DETECT)
|
||||
if (((pipr & M8XX_PCMCIA_CD2(i)) >> 1) ^
|
||||
(pipr & M8XX_PCMCIA_CD1(i))) {
|
||||
events &= ~SS_DETECT;
|
||||
}
|
||||
|
||||
#ifdef PCMCIA_GLITCHY_CD
|
||||
/*
|
||||
* I've experienced CD problems with my ADS board.
|
||||
|
|
@ -593,24 +602,23 @@ static irqreturn_t m8xx_interrupt(int irq, void *dev)
|
|||
* real change of Card detection.
|
||||
*/
|
||||
|
||||
if((events & SS_DETECT) &&
|
||||
if ((events & SS_DETECT) &&
|
||||
((pipr &
|
||||
(M8XX_PCMCIA_CD2(i) | M8XX_PCMCIA_CD1(i))) == 0) &&
|
||||
(s->state.Vcc | s->state.Vpp)) {
|
||||
events &= ~SS_DETECT;
|
||||
/*printk( "CD glitch workaround - CD = 0x%08x!\n",
|
||||
(pipr & (M8XX_PCMCIA_CD2(i)
|
||||
| M8XX_PCMCIA_CD1(i))));*/
|
||||
| M8XX_PCMCIA_CD1(i)))); */
|
||||
}
|
||||
#endif
|
||||
|
||||
/* call the handler */
|
||||
|
||||
dprintk("slot %u: events = 0x%02x, pscr = 0x%08x, "
|
||||
"pipr = 0x%08x\n",
|
||||
i, events, pscr, pipr);
|
||||
"pipr = 0x%08x\n", i, events, pscr, pipr);
|
||||
|
||||
if(events) {
|
||||
if (events) {
|
||||
spin_lock(&pending_event_lock);
|
||||
pending_events[i] |= events;
|
||||
spin_unlock(&pending_event_lock);
|
||||
|
|
@ -643,11 +651,11 @@ static u32 m8xx_get_graycode(u32 size)
|
|||
{
|
||||
u32 k;
|
||||
|
||||
for(k = 0; k < M8XX_SIZES_NO; k++)
|
||||
if(m8xx_size_to_gray[k] == size)
|
||||
for (k = 0; k < M8XX_SIZES_NO; k++)
|
||||
if (m8xx_size_to_gray[k] == size)
|
||||
break;
|
||||
|
||||
if((k == M8XX_SIZES_NO) || (m8xx_size_to_gray[k] == -1))
|
||||
if ((k == M8XX_SIZES_NO) || (m8xx_size_to_gray[k] == -1))
|
||||
k = -1;
|
||||
|
||||
return k;
|
||||
|
|
@ -657,7 +665,7 @@ static u32 m8xx_get_speed(u32 ns, u32 is_io, u32 bus_freq)
|
|||
{
|
||||
u32 reg, clocks, psst, psl, psht;
|
||||
|
||||
if(!ns) {
|
||||
if (!ns) {
|
||||
|
||||
/*
|
||||
* We get called with IO maps setup to 0ns
|
||||
|
|
@ -665,7 +673,7 @@ static u32 m8xx_get_speed(u32 ns, u32 is_io, u32 bus_freq)
|
|||
* They should be 255ns.
|
||||
*/
|
||||
|
||||
if(is_io)
|
||||
if (is_io)
|
||||
ns = 255;
|
||||
else
|
||||
ns = 100; /* fast memory if 0 */
|
||||
|
|
@ -682,10 +690,10 @@ static u32 m8xx_get_speed(u32 ns, u32 is_io, u32 bus_freq)
|
|||
#define ADJ 180 /* 80 % longer accesstime - to be sure */
|
||||
|
||||
clocks = ((bus_freq / 1000) * ns) / 1000;
|
||||
clocks = (clocks * ADJ) / (100*1000);
|
||||
if(clocks >= PCMCIA_BMT_LIMIT) {
|
||||
printk( "Max access time limit reached\n");
|
||||
clocks = PCMCIA_BMT_LIMIT-1;
|
||||
clocks = (clocks * ADJ) / (100 * 1000);
|
||||
if (clocks >= PCMCIA_BMT_LIMIT) {
|
||||
printk("Max access time limit reached\n");
|
||||
clocks = PCMCIA_BMT_LIMIT - 1;
|
||||
}
|
||||
|
||||
psst = clocks / 7; /* setup time */
|
||||
|
|
@ -797,8 +805,8 @@ static int m8xx_get_status(struct pcmcia_socket *sock, unsigned int *value)
|
|||
reg = (pipr & M8XX_PCMCIA_VS_MASK(lsock))
|
||||
>> M8XX_PCMCIA_VS_SHIFT(lsock);
|
||||
|
||||
if(socket_get(lsock) == PCMCIA_SOCKET_KEY_LV) {
|
||||
switch(reg) {
|
||||
if (socket_get(lsock) == PCMCIA_SOCKET_KEY_LV) {
|
||||
switch (reg) {
|
||||
case 1:
|
||||
*value |= SS_3VCARD;
|
||||
break; /* GND, NC - 3.3V only */
|
||||
|
|
@ -812,7 +820,7 @@ static int m8xx_get_status(struct pcmcia_socket *sock, unsigned int *value)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int m8xx_set_socket(struct pcmcia_socket *sock, socket_state_t *state)
|
||||
static int m8xx_set_socket(struct pcmcia_socket *sock, socket_state_t * state)
|
||||
{
|
||||
int lsock = container_of(sock, struct socket_info, socket)->slot;
|
||||
struct socket_info *s = &socket[lsock];
|
||||
|
|
@ -821,20 +829,20 @@ static int m8xx_set_socket(struct pcmcia_socket *sock, socket_state_t *state)
|
|||
unsigned long flags;
|
||||
pcmconf8xx_t *pcmcia = socket[0].pcmcia;
|
||||
|
||||
dprintk( "SetSocket(%d, flags %#3.3x, Vcc %d, Vpp %d, "
|
||||
dprintk("SetSocket(%d, flags %#3.3x, Vcc %d, Vpp %d, "
|
||||
"io_irq %d, csc_mask %#2.2x)\n", lsock, state->flags,
|
||||
state->Vcc, state->Vpp, state->io_irq, state->csc_mask);
|
||||
|
||||
/* First, set voltage - bail out if invalid */
|
||||
if(voltage_set(lsock, state->Vcc, state->Vpp))
|
||||
if (voltage_set(lsock, state->Vcc, state->Vpp))
|
||||
return -EINVAL;
|
||||
|
||||
|
||||
/* Take care of reset... */
|
||||
if(state->flags & SS_RESET)
|
||||
if (state->flags & SS_RESET)
|
||||
out_be32(M8XX_PGCRX(lsock), in_be32(M8XX_PGCRX(lsock)) | M8XX_PGCRX_CXRESET); /* active high */
|
||||
else
|
||||
out_be32(M8XX_PGCRX(lsock), in_be32(M8XX_PGCRX(lsock)) & ~M8XX_PGCRX_CXRESET);
|
||||
out_be32(M8XX_PGCRX(lsock),
|
||||
in_be32(M8XX_PGCRX(lsock)) & ~M8XX_PGCRX_CXRESET);
|
||||
|
||||
/* ... and output enable. */
|
||||
|
||||
|
|
@ -846,10 +854,11 @@ static int m8xx_set_socket(struct pcmcia_socket *sock, socket_state_t *state)
|
|||
no pullups are present -> the cards act wierd.
|
||||
So right now the buffers are enabled if the power is on. */
|
||||
|
||||
if(state->Vcc || state->Vpp)
|
||||
if (state->Vcc || state->Vpp)
|
||||
out_be32(M8XX_PGCRX(lsock), in_be32(M8XX_PGCRX(lsock)) & ~M8XX_PGCRX_CXOE); /* active low */
|
||||
else
|
||||
out_be32(M8XX_PGCRX(lsock), in_be32(M8XX_PGCRX(lsock)) | M8XX_PGCRX_CXOE);
|
||||
out_be32(M8XX_PGCRX(lsock),
|
||||
in_be32(M8XX_PGCRX(lsock)) | M8XX_PGCRX_CXOE);
|
||||
|
||||
/*
|
||||
* We'd better turn off interrupts before
|
||||
|
|
@ -866,17 +875,17 @@ static int m8xx_set_socket(struct pcmcia_socket *sock, socket_state_t *state)
|
|||
e = &s->events[0];
|
||||
reg = 0;
|
||||
|
||||
if(state->csc_mask & SS_DETECT) {
|
||||
if (state->csc_mask & SS_DETECT) {
|
||||
e->eventbit = SS_DETECT;
|
||||
reg |= e->regbit = (M8XX_PCMCIA_CD2(lsock)
|
||||
| M8XX_PCMCIA_CD1(lsock));
|
||||
e++;
|
||||
}
|
||||
if(state->flags & SS_IOCARD) {
|
||||
if (state->flags & SS_IOCARD) {
|
||||
/*
|
||||
* I/O card
|
||||
*/
|
||||
if(state->csc_mask & SS_STSCHG) {
|
||||
if (state->csc_mask & SS_STSCHG) {
|
||||
e->eventbit = SS_STSCHG;
|
||||
reg |= e->regbit = M8XX_PCMCIA_BVD1(lsock);
|
||||
e++;
|
||||
|
|
@ -884,9 +893,10 @@ static int m8xx_set_socket(struct pcmcia_socket *sock, socket_state_t *state)
|
|||
/*
|
||||
* If io_irq is non-zero we should enable irq.
|
||||
*/
|
||||
if(state->io_irq) {
|
||||
if (state->io_irq) {
|
||||
out_be32(M8XX_PGCRX(lsock),
|
||||
in_be32(M8XX_PGCRX(lsock)) | mk_int_int_mask(s->hwirq) << 24);
|
||||
in_be32(M8XX_PGCRX(lsock)) |
|
||||
mk_int_int_mask(s->hwirq) << 24);
|
||||
/*
|
||||
* Strange thing here:
|
||||
* The manual does not tell us which interrupt
|
||||
|
|
@ -897,26 +907,25 @@ static int m8xx_set_socket(struct pcmcia_socket *sock, socket_state_t *state)
|
|||
* have to be cleared in PSCR in the interrupt handler.
|
||||
*/
|
||||
reg |= M8XX_PCMCIA_RDY_L(lsock);
|
||||
}
|
||||
else
|
||||
out_be32(M8XX_PGCRX(lsock), in_be32(M8XX_PGCRX(lsock)) & 0x00ffffff);
|
||||
}
|
||||
else {
|
||||
} else
|
||||
out_be32(M8XX_PGCRX(lsock),
|
||||
in_be32(M8XX_PGCRX(lsock)) & 0x00ffffff);
|
||||
} else {
|
||||
/*
|
||||
* Memory card
|
||||
*/
|
||||
if(state->csc_mask & SS_BATDEAD) {
|
||||
if (state->csc_mask & SS_BATDEAD) {
|
||||
e->eventbit = SS_BATDEAD;
|
||||
reg |= e->regbit = M8XX_PCMCIA_BVD1(lsock);
|
||||
e++;
|
||||
}
|
||||
if(state->csc_mask & SS_BATWARN) {
|
||||
if (state->csc_mask & SS_BATWARN) {
|
||||
e->eventbit = SS_BATWARN;
|
||||
reg |= e->regbit = M8XX_PCMCIA_BVD2(lsock);
|
||||
e++;
|
||||
}
|
||||
/* What should I trigger on - low/high,raise,fall? */
|
||||
if(state->csc_mask & SS_READY) {
|
||||
if (state->csc_mask & SS_READY) {
|
||||
e->eventbit = SS_READY;
|
||||
reg |= e->regbit = 0; //??
|
||||
e++;
|
||||
|
|
@ -940,7 +949,9 @@ static int m8xx_set_socket(struct pcmcia_socket *sock, socket_state_t *state)
|
|||
* Ones will enable the interrupt.
|
||||
*/
|
||||
|
||||
reg |= in_be32(&pcmcia->pcmc_per) & (M8XX_PCMCIA_MASK(0) | M8XX_PCMCIA_MASK(1));
|
||||
reg |=
|
||||
in_be32(&pcmcia->
|
||||
pcmc_per) & (M8XX_PCMCIA_MASK(0) | M8XX_PCMCIA_MASK(1));
|
||||
out_be32(&pcmcia->pcmc_per, reg);
|
||||
|
||||
spin_unlock_irqrestore(&events_lock, flags);
|
||||
|
|
@ -961,11 +972,10 @@ static int m8xx_set_io_map(struct pcmcia_socket *sock, struct pccard_io_map *io)
|
|||
unsigned int reg, winnr;
|
||||
pcmconf8xx_t *pcmcia = s->pcmcia;
|
||||
|
||||
|
||||
#define M8XX_SIZE (io->stop - io->start + 1)
|
||||
#define M8XX_BASE (PCMCIA_IO_WIN_BASE + io->start)
|
||||
|
||||
dprintk( "SetIOMap(%d, %d, %#2.2x, %d ns, "
|
||||
dprintk("SetIOMap(%d, %d, %#2.2x, %d ns, "
|
||||
"%#4.4x-%#4.4x)\n", lsock, io->map, io->flags,
|
||||
io->speed, io->start, io->stop);
|
||||
|
||||
|
|
@ -973,37 +983,37 @@ static int m8xx_set_io_map(struct pcmcia_socket *sock, struct pccard_io_map *io)
|
|||
|| (io->stop > 0xffff) || (io->stop < io->start))
|
||||
return -EINVAL;
|
||||
|
||||
if((reg = m8xx_get_graycode(M8XX_SIZE)) == -1)
|
||||
if ((reg = m8xx_get_graycode(M8XX_SIZE)) == -1)
|
||||
return -EINVAL;
|
||||
|
||||
if(io->flags & MAP_ACTIVE) {
|
||||
if (io->flags & MAP_ACTIVE) {
|
||||
|
||||
dprintk( "io->flags & MAP_ACTIVE\n");
|
||||
dprintk("io->flags & MAP_ACTIVE\n");
|
||||
|
||||
winnr = (PCMCIA_MEM_WIN_NO * PCMCIA_SOCKETS_NO)
|
||||
+ (lsock * PCMCIA_IO_WIN_NO) + io->map;
|
||||
|
||||
/* setup registers */
|
||||
|
||||
w = (void *) &pcmcia->pcmc_pbr0;
|
||||
w = (void *)&pcmcia->pcmc_pbr0;
|
||||
w += winnr;
|
||||
|
||||
out_be32(&w->or, 0); /* turn off window first */
|
||||
out_be32(&w->br, M8XX_BASE);
|
||||
|
||||
reg <<= 27;
|
||||
reg |= M8XX_PCMCIA_POR_IO |(lsock << 2);
|
||||
reg |= M8XX_PCMCIA_POR_IO | (lsock << 2);
|
||||
|
||||
reg |= m8xx_get_speed(io->speed, 1, s->bus_freq);
|
||||
|
||||
if(io->flags & MAP_WRPROT)
|
||||
if (io->flags & MAP_WRPROT)
|
||||
reg |= M8XX_PCMCIA_POR_WRPROT;
|
||||
|
||||
/*if(io->flags & (MAP_16BIT | MAP_AUTOSZ))*/
|
||||
if(io->flags & MAP_16BIT)
|
||||
/*if(io->flags & (MAP_16BIT | MAP_AUTOSZ)) */
|
||||
if (io->flags & MAP_16BIT)
|
||||
reg |= M8XX_PCMCIA_POR_16BIT;
|
||||
|
||||
if(io->flags & MAP_ACTIVE)
|
||||
if (io->flags & MAP_ACTIVE)
|
||||
reg |= M8XX_PCMCIA_POR_VALID;
|
||||
|
||||
out_be32(&w->or, reg);
|
||||
|
|
@ -1017,7 +1027,7 @@ static int m8xx_set_io_map(struct pcmcia_socket *sock, struct pccard_io_map *io)
|
|||
|
||||
/* setup registers */
|
||||
|
||||
w = (void *) &pcmcia->pcmc_pbr0;
|
||||
w = (void *)&pcmcia->pcmc_pbr0;
|
||||
w += winnr;
|
||||
|
||||
out_be32(&w->or, 0); /* turn off window */
|
||||
|
|
@ -1029,15 +1039,14 @@ static int m8xx_set_io_map(struct pcmcia_socket *sock, struct pccard_io_map *io)
|
|||
|
||||
/* copy the struct and modify the copy */
|
||||
s->io_win[io->map] = *io;
|
||||
s->io_win[io->map].flags &= (MAP_WRPROT
|
||||
| MAP_16BIT
|
||||
| MAP_ACTIVE);
|
||||
s->io_win[io->map].flags &= (MAP_WRPROT | MAP_16BIT | MAP_ACTIVE);
|
||||
dprintk("SetIOMap exit\n");
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int m8xx_set_mem_map(struct pcmcia_socket *sock, struct pccard_mem_map *mem)
|
||||
static int m8xx_set_mem_map(struct pcmcia_socket *sock,
|
||||
struct pccard_mem_map *mem)
|
||||
{
|
||||
int lsock = container_of(sock, struct socket_info, socket)->slot;
|
||||
struct socket_info *s = &socket[lsock];
|
||||
|
|
@ -1046,7 +1055,7 @@ static int m8xx_set_mem_map(struct pcmcia_socket *sock, struct pccard_mem_map *m
|
|||
unsigned int reg, winnr;
|
||||
pcmconf8xx_t *pcmcia = s->pcmcia;
|
||||
|
||||
dprintk( "SetMemMap(%d, %d, %#2.2x, %d ns, "
|
||||
dprintk("SetMemMap(%d, %d, %#2.2x, %d ns, "
|
||||
"%#5.5lx, %#5.5x)\n", lsock, mem->map, mem->flags,
|
||||
mem->speed, mem->static_start, mem->card_start);
|
||||
|
||||
|
|
@ -1054,11 +1063,11 @@ static int m8xx_set_mem_map(struct pcmcia_socket *sock, struct pccard_mem_map *m
|
|||
// || ((mem->s) >= PCMCIA_MEM_WIN_SIZE)
|
||||
|| (mem->card_start >= 0x04000000)
|
||||
|| (mem->static_start & 0xfff) /* 4KByte resolution */
|
||||
|| (mem->card_start & 0xfff))
|
||||
||(mem->card_start & 0xfff))
|
||||
return -EINVAL;
|
||||
|
||||
if((reg = m8xx_get_graycode(PCMCIA_MEM_WIN_SIZE)) == -1) {
|
||||
printk( "Cannot set size to 0x%08x.\n", PCMCIA_MEM_WIN_SIZE);
|
||||
if ((reg = m8xx_get_graycode(PCMCIA_MEM_WIN_SIZE)) == -1) {
|
||||
printk("Cannot set size to 0x%08x.\n", PCMCIA_MEM_WIN_SIZE);
|
||||
return -EINVAL;
|
||||
}
|
||||
reg <<= 27;
|
||||
|
|
@ -1067,23 +1076,23 @@ static int m8xx_set_mem_map(struct pcmcia_socket *sock, struct pccard_mem_map *m
|
|||
|
||||
/* Setup the window in the pcmcia controller */
|
||||
|
||||
w = (void *) &pcmcia->pcmc_pbr0;
|
||||
w = (void *)&pcmcia->pcmc_pbr0;
|
||||
w += winnr;
|
||||
|
||||
reg |= lsock << 2;
|
||||
|
||||
reg |= m8xx_get_speed(mem->speed, 0, s->bus_freq);
|
||||
|
||||
if(mem->flags & MAP_ATTRIB)
|
||||
if (mem->flags & MAP_ATTRIB)
|
||||
reg |= M8XX_PCMCIA_POR_ATTRMEM;
|
||||
|
||||
if(mem->flags & MAP_WRPROT)
|
||||
if (mem->flags & MAP_WRPROT)
|
||||
reg |= M8XX_PCMCIA_POR_WRPROT;
|
||||
|
||||
if(mem->flags & MAP_16BIT)
|
||||
if (mem->flags & MAP_16BIT)
|
||||
reg |= M8XX_PCMCIA_POR_16BIT;
|
||||
|
||||
if(mem->flags & MAP_ACTIVE)
|
||||
if (mem->flags & MAP_ACTIVE)
|
||||
reg |= M8XX_PCMCIA_POR_VALID;
|
||||
|
||||
out_be32(&w->or, reg);
|
||||
|
|
@ -1091,7 +1100,7 @@ static int m8xx_set_mem_map(struct pcmcia_socket *sock, struct pccard_mem_map *m
|
|||
dprintk("Socket %u: Mapped memory window %u at %#8.8x, "
|
||||
"OR = %#8.8x.\n", lsock, mem->map, w->br, w->or);
|
||||
|
||||
if(mem->flags & MAP_ACTIVE) {
|
||||
if (mem->flags & MAP_ACTIVE) {
|
||||
/* get the new base address */
|
||||
mem->static_start = PCMCIA_MEM_WIN_BASE +
|
||||
(PCMCIA_MEM_WIN_SIZE * winnr)
|
||||
|
|
@ -1107,10 +1116,7 @@ static int m8xx_set_mem_map(struct pcmcia_socket *sock, struct pccard_mem_map *m
|
|||
old = &s->mem_win[mem->map];
|
||||
|
||||
*old = *mem;
|
||||
old->flags &= (MAP_ATTRIB
|
||||
| MAP_WRPROT
|
||||
| MAP_16BIT
|
||||
| MAP_ACTIVE);
|
||||
old->flags &= (MAP_ATTRIB | MAP_WRPROT | MAP_16BIT | MAP_ACTIVE);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -1121,7 +1127,7 @@ static int m8xx_sock_init(struct pcmcia_socket *sock)
|
|||
pccard_io_map io = { 0, 0, 0, 0, 1 };
|
||||
pccard_mem_map mem = { 0, 0, 0, 0, 0, 0 };
|
||||
|
||||
dprintk( "sock_init(%d)\n", s);
|
||||
dprintk("sock_init(%d)\n", s);
|
||||
|
||||
m8xx_set_socket(sock, &dead_socket);
|
||||
for (i = 0; i < PCMCIA_IO_WIN_NO; i++) {
|
||||
|
|
@ -1151,7 +1157,8 @@ static struct pccard_operations m8xx_services = {
|
|||
.set_mem_map = m8xx_set_mem_map,
|
||||
};
|
||||
|
||||
static int __init m8xx_probe(struct of_device *ofdev, const struct of_device_id *match)
|
||||
static int __init m8xx_probe(struct of_device *ofdev,
|
||||
const struct of_device_id *match)
|
||||
{
|
||||
struct pcmcia_win *w;
|
||||
unsigned int i, m, hwirq;
|
||||
|
|
@ -1162,7 +1169,7 @@ static int __init m8xx_probe(struct of_device *ofdev, const struct of_device_id
|
|||
pcmcia_info("%s\n", version);
|
||||
|
||||
pcmcia = of_iomap(np, 0);
|
||||
if(pcmcia == NULL)
|
||||
if (pcmcia == NULL)
|
||||
return -EINVAL;
|
||||
|
||||
pcmcia_schlvl = irq_of_parse_and_map(np, 0);
|
||||
|
|
@ -1173,32 +1180,33 @@ static int __init m8xx_probe(struct of_device *ofdev, const struct of_device_id
|
|||
m8xx_pgcrx[0] = &pcmcia->pcmc_pgcra;
|
||||
m8xx_pgcrx[1] = &pcmcia->pcmc_pgcrb;
|
||||
|
||||
|
||||
pcmcia_info(PCMCIA_BOARD_MSG " using " PCMCIA_SLOT_MSG
|
||||
" with IRQ %u (%d). \n", pcmcia_schlvl, hwirq);
|
||||
|
||||
/* Configure Status change interrupt */
|
||||
|
||||
if(request_irq(pcmcia_schlvl, m8xx_interrupt, IRQF_SHARED,
|
||||
if (request_irq(pcmcia_schlvl, m8xx_interrupt, IRQF_SHARED,
|
||||
driver_name, socket)) {
|
||||
pcmcia_error("Cannot allocate IRQ %u for SCHLVL!\n",
|
||||
pcmcia_schlvl);
|
||||
return -1;
|
||||
}
|
||||
|
||||
w = (void *) &pcmcia->pcmc_pbr0;
|
||||
w = (void *)&pcmcia->pcmc_pbr0;
|
||||
|
||||
out_be32(&pcmcia->pcmc_pscr, M8XX_PCMCIA_MASK(0)| M8XX_PCMCIA_MASK(1));
|
||||
out_be32(&pcmcia->pcmc_pscr, M8XX_PCMCIA_MASK(0) | M8XX_PCMCIA_MASK(1));
|
||||
clrbits32(&pcmcia->pcmc_per, M8XX_PCMCIA_MASK(0) | M8XX_PCMCIA_MASK(1));
|
||||
|
||||
/* connect interrupt and disable CxOE */
|
||||
|
||||
out_be32(M8XX_PGCRX(0), M8XX_PGCRX_CXOE | (mk_int_int_mask(hwirq) << 16));
|
||||
out_be32(M8XX_PGCRX(1), M8XX_PGCRX_CXOE | (mk_int_int_mask(hwirq) << 16));
|
||||
out_be32(M8XX_PGCRX(0),
|
||||
M8XX_PGCRX_CXOE | (mk_int_int_mask(hwirq) << 16));
|
||||
out_be32(M8XX_PGCRX(1),
|
||||
M8XX_PGCRX_CXOE | (mk_int_int_mask(hwirq) << 16));
|
||||
|
||||
/* intialize the fixed memory windows */
|
||||
|
||||
for(i = 0; i < PCMCIA_SOCKETS_NO; i++){
|
||||
for (i = 0; i < PCMCIA_SOCKETS_NO; i++) {
|
||||
for (m = 0; m < PCMCIA_MEM_WIN_NO; m++) {
|
||||
out_be32(&w->br, PCMCIA_MEM_WIN_BASE +
|
||||
(PCMCIA_MEM_WIN_SIZE
|
||||
|
|
@ -1218,10 +1226,11 @@ static int __init m8xx_probe(struct of_device *ofdev, const struct of_device_id
|
|||
hardware_enable(0);
|
||||
hardware_enable(1);
|
||||
|
||||
for (i = 0 ; i < PCMCIA_SOCKETS_NO; i++) {
|
||||
for (i = 0; i < PCMCIA_SOCKETS_NO; i++) {
|
||||
socket[i].slot = i;
|
||||
socket[i].socket.owner = THIS_MODULE;
|
||||
socket[i].socket.features = SS_CAP_PCCARD | SS_CAP_MEM_ALIGN | SS_CAP_STATIC_MAP;
|
||||
socket[i].socket.features =
|
||||
SS_CAP_PCCARD | SS_CAP_MEM_ALIGN | SS_CAP_STATIC_MAP;
|
||||
socket[i].socket.irq_mask = 0x000;
|
||||
socket[i].socket.map_size = 0x1000;
|
||||
socket[i].socket.io_offset = 0;
|
||||
|
|
@ -1234,7 +1243,6 @@ static int __init m8xx_probe(struct of_device *ofdev, const struct of_device_id
|
|||
socket[i].bus_freq = ppc_proc_freq;
|
||||
socket[i].hwirq = hwirq;
|
||||
|
||||
|
||||
}
|
||||
|
||||
for (i = 0; i < PCMCIA_SOCKETS_NO; i++) {
|
||||
|
|
@ -1246,14 +1254,14 @@ static int __init m8xx_probe(struct of_device *ofdev, const struct of_device_id
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int m8xx_remove(struct of_device* ofdev)
|
||||
static int m8xx_remove(struct of_device *ofdev)
|
||||
{
|
||||
u32 m, i;
|
||||
struct pcmcia_win *w;
|
||||
pcmconf8xx_t *pcmcia = socket[0].pcmcia;
|
||||
|
||||
for (i = 0; i < PCMCIA_SOCKETS_NO; i++) {
|
||||
w = (void *) &pcmcia->pcmc_pbr0;
|
||||
w = (void *)&pcmcia->pcmc_pbr0;
|
||||
|
||||
out_be32(&pcmcia->pcmc_pscr, M8XX_PCMCIA_MASK(i));
|
||||
out_be32(&pcmcia->pcmc_per,
|
||||
|
|
@ -1308,7 +1316,7 @@ static struct of_device_id m8xx_pcmcia_match[] = {
|
|||
MODULE_DEVICE_TABLE(of, m8xx_pcmcia_match);
|
||||
|
||||
static struct of_platform_driver m8xx_pcmcia_driver = {
|
||||
.name = (char *) driver_name,
|
||||
.name = (char *)driver_name,
|
||||
.match_table = m8xx_pcmcia_match,
|
||||
.probe = m8xx_probe,
|
||||
.remove = m8xx_remove,
|
||||
|
|
|
|||
Loading…
Reference in a new issue