[PATCH] ppc32: Correct an instruction in the boot code
In the flush and invalidate bootcode on PPC4xx we were accidentally using the wrong instruction. Use cmplw, which reads from a register like we want. Signed-off-by: Tom Rini <trini@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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@ -252,7 +252,7 @@ _GLOBAL(flush_instruction_cache)
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1: dcbf r0,r3 # Flush the data cache
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icbi r0,r3 # Invalidate the instruction cache
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addi r3,r3,0x10 # Increment by one cache line
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cmplwi cr0,r3,r4 # Are we at the end yet?
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cmplw cr0,r3,r4 # Are we at the end yet?
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blt 1b # No, keep flushing and invalidating
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#else
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/* Enable, invalidate and then disable the L1 icache/dcache. */
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