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MIPS: mm: Remove redundant drop_mmu_context() cpu argument 

The drop_mmu_context() function accepts a cpu argument, but it
implicitly expects that this is always equal to smp_processor_id() by
allocating & configuring an ASID on the local CPU when the mm is active
on the CPU indicated by the cpu argument.

All callers do provide the value of smp_processor_id() to the cpu
argument.

Remove the redundant argument and have drop_mmu_context() call
smp_processor_id() itself, making it clearer that the cpu variable
always represents the local CPU.

Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: linux-mips@vger.kernel.org
hifive-unleashed-5.1
Paul Burton 2019-02-02 01:43:16 +00:00
parent c653bd04f7
commit 9a27324fde
No known key found for this signature in database
GPG Key ID: 3EA79FACB57500DD
5 changed files with 10 additions and 8 deletions
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4
arch/mips/include/asm/mmu_context.h
View File

@ -174,13 +174,15 @@ static inline void destroy_context(struct mm_struct *mm)
* we will get a new one for it.
*/
static inline void
drop_mmu_context(struct mm_struct *mm, unsigned cpu)
drop_mmu_context(struct mm_struct *mm)
{
unsigned long flags;
unsigned int cpu;
local_irq_save(flags);
htw_stop();
cpu = smp_processor_id();
if (cpumask_test_cpu(cpu, mm_cpumask(mm))) {
get_new_mmu_context(mm, cpu);
write_c0_entryhi(cpu_asid(cpu, mm));

2
arch/mips/mm/c-r4k.c
View File

@ -700,7 +700,7 @@ static inline void local_r4k_flush_cache_page(void *args)
int cpu = smp_processor_id();
if (cpu_context(cpu, mm) != 0)
drop_mmu_context(mm, cpu);
drop_mmu_context(mm);
} else
vaddr ? r4k_blast_icache_page(addr) :
r4k_blast_icache_user_page(addr);

4
arch/mips/mm/tlb-r3k.c
View File

@ -75,7 +75,7 @@ void local_flush_tlb_mm(struct mm_struct *mm)
#ifdef DEBUG_TLB
printk("[tlbmm<%lu>]", (unsigned long)cpu_context(cpu, mm));
#endif
drop_mmu_context(mm, cpu);
drop_mmu_context(mm);
}
}
@ -117,7 +117,7 @@ void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
}
write_c0_entryhi(oldpid);
} else {
drop_mmu_context(mm, cpu);
drop_mmu_context(mm);
}
local_irq_restore(flags);
}

4
arch/mips/mm/tlb-r4k.c
View File

@ -115,7 +115,7 @@ void local_flush_tlb_mm(struct mm_struct *mm)
cpu = smp_processor_id();
if (cpu_context(cpu, mm) != 0) {
drop_mmu_context(mm, cpu);
drop_mmu_context(mm);
}
preempt_enable();
@ -163,7 +163,7 @@ void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
write_c0_entryhi(oldpid);
htw_start();
} else {
drop_mmu_context(mm, cpu);
drop_mmu_context(mm);
}
flush_micro_tlb();
local_irq_restore(flags);

4
arch/mips/mm/tlb-r8k.c
View File

@ -55,7 +55,7 @@ void local_flush_tlb_mm(struct mm_struct *mm)
int cpu = smp_processor_id();
if (cpu_context(cpu, mm) != 0)
drop_mmu_context(mm, cpu);
drop_mmu_context(mm);
}
void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
@ -75,7 +75,7 @@ void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
local_irq_save(flags);
if (size > TFP_TLB_SIZE / 2) {
drop_mmu_context(mm, cpu);
drop_mmu_context(mm);
goto out_restore;
}