powerpc/powernv: Use PCI slot reset infrastructure
The (OPAL) firmware might provide the PCI slot reset capability which is identified by property "ibm,reset-by-firmware" on the PCI slot associated device node. This routes the reset request to firmware if "ibm,reset-by-firmware" exists in the PCI slot device node. Otherwise, the reset is done inside kernel as before. Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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@ -36,6 +36,7 @@
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#include <asm/msi_bitmap.h>
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#include <asm/opal.h>
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#include <asm/ppc-pci.h>
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#include <asm/pnv-pci.h>
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#include "powernv.h"
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#include "pci.h"
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@ -815,7 +816,7 @@ out:
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return 0;
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}
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static int pnv_eeh_bridge_reset(struct pci_dev *dev, int option)
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static int __pnv_eeh_bridge_reset(struct pci_dev *dev, int option)
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{
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struct pci_dn *pdn = pci_get_pdn_by_devfn(dev->bus, dev->devfn);
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struct eeh_dev *edev = pdn_to_eeh_dev(pdn);
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@ -866,6 +867,44 @@ static int pnv_eeh_bridge_reset(struct pci_dev *dev, int option)
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return 0;
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}
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static int pnv_eeh_bridge_reset(struct pci_dev *pdev, int option)
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{
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struct pci_controller *hose = pci_bus_to_host(pdev->bus);
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struct pnv_phb *phb = hose->private_data;
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struct device_node *dn = pci_device_to_OF_node(pdev);
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uint64_t id = PCI_SLOT_ID(phb->opal_id,
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(pdev->bus->number << 8) | pdev->devfn);
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uint8_t scope;
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int64_t rc;
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/* Hot reset to the bus if firmware cannot handle */
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if (!dn || !of_get_property(dn, "ibm,reset-by-firmware", NULL))
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return __pnv_eeh_bridge_reset(pdev, option);
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switch (option) {
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case EEH_RESET_FUNDAMENTAL:
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scope = OPAL_RESET_PCI_FUNDAMENTAL;
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break;
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case EEH_RESET_HOT:
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scope = OPAL_RESET_PCI_HOT;
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break;
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case EEH_RESET_DEACTIVATE:
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return 0;
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default:
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dev_dbg(&pdev->dev, "%s: Unsupported reset %d\n",
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__func__, option);
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return -EINVAL;
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}
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rc = opal_pci_reset(id, scope, OPAL_ASSERT_RESET);
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if (rc <= OPAL_SUCCESS)
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goto out;
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rc = pnv_eeh_poll(id);
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out:
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return (rc == OPAL_SUCCESS) ? 0 : -EIO;
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}
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void pnv_pci_reset_secondary_bus(struct pci_dev *dev)
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{
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struct pci_controller *hose;
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