i2c-omap: convert 'rev1' flag to generic 'rev' u8
i2c-omap discriminates only between "revision 1" or "greater than revision 1." A following patch introduces code that must also discriminate between rev2.x, rev3.6, and rev3.12 controllers. Support this by storing the full revision data from the I2C_REV register, rather than just a single bit. The revision definitions may need to be extended for other ES levels that aren't currently available here. rev3.6 is what's present on the 2430SDP here (unknown ES revision); rev3.12 is used on the 3430ES2 here. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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@ -38,6 +38,13 @@
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#include <linux/clk.h>
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#include <linux/io.h>
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/* I2C controller revisions */
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#define OMAP_I2C_REV_2 0x20
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/* I2C controller revisions present on specific hardware */
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#define OMAP_I2C_REV_ON_2430 0x36
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#define OMAP_I2C_REV_ON_3430 0x3C
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/* timeout waiting for the controller to respond */
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#define OMAP_I2C_TIMEOUT (msecs_to_jiffies(1000))
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@ -139,7 +146,7 @@ struct omap_i2c_dev {
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* fifo_size==0 implies no fifo
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* if set, should be trsh+1
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*/
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unsigned rev1:1;
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u8 rev;
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unsigned b_hw:1; /* bad h/w fixes */
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unsigned idle:1;
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u16 iestate; /* Saved interrupt register */
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@ -209,7 +216,7 @@ static void omap_i2c_idle(struct omap_i2c_dev *dev)
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dev->iestate = omap_i2c_read_reg(dev, OMAP_I2C_IE_REG);
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omap_i2c_write_reg(dev, OMAP_I2C_IE_REG, 0);
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if (dev->rev1) {
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if (dev->rev < OMAP_I2C_REV_2) {
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iv = omap_i2c_read_reg(dev, OMAP_I2C_IV_REG); /* Read clears */
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} else {
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omap_i2c_write_reg(dev, OMAP_I2C_STAT_REG, dev->iestate);
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@ -231,7 +238,7 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
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unsigned long timeout;
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unsigned long internal_clk = 0;
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if (!dev->rev1) {
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if (dev->rev >= OMAP_I2C_REV_2) {
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omap_i2c_write_reg(dev, OMAP_I2C_SYSC_REG, OMAP_I2C_SYSC_SRST);
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/* For some reason we need to set the EN bit before the
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* reset done bit gets set. */
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@ -710,6 +717,7 @@ omap_i2c_probe(struct platform_device *pdev)
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struct omap_i2c_dev *dev;
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struct i2c_adapter *adap;
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struct resource *mem, *irq, *ioarea;
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void *isr;
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int r;
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u32 speed = 0;
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@ -760,8 +768,7 @@ omap_i2c_probe(struct platform_device *pdev)
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omap_i2c_unidle(dev);
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if (cpu_is_omap15xx())
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dev->rev1 = omap_i2c_read_reg(dev, OMAP_I2C_REV_REG) < 0x20;
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dev->rev = omap_i2c_read_reg(dev, OMAP_I2C_REV_REG) & 0xff;
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if (cpu_is_omap2430() || cpu_is_omap34xx()) {
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u16 s;
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@ -782,16 +789,16 @@ omap_i2c_probe(struct platform_device *pdev)
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/* reset ASAP, clearing any IRQs */
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omap_i2c_init(dev);
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r = request_irq(dev->irq, dev->rev1 ? omap_i2c_rev1_isr : omap_i2c_isr,
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0, pdev->name, dev);
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isr = (dev->rev < OMAP_I2C_REV_2) ? omap_i2c_rev1_isr : omap_i2c_isr;
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r = request_irq(dev->irq, isr, 0, pdev->name, dev);
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if (r) {
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dev_err(dev->dev, "failure requesting irq %i\n", dev->irq);
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goto err_unuse_clocks;
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}
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r = omap_i2c_read_reg(dev, OMAP_I2C_REV_REG) & 0xff;
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dev_info(dev->dev, "bus %d rev%d.%d at %d kHz\n",
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pdev->id, r >> 4, r & 0xf, dev->speed);
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pdev->id, dev->rev >> 4, dev->rev & 0xf, dev->speed);
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omap_i2c_idle(dev);
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