net/phy: add IC+ IP101A and support APS.
This patch adds the IC+ IP101A Single port 10/100 PHY and supports the APS (i.e. power saving mode while link is down) for both IP1001 and IP101A (where this mode is supported). Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>hifive-unleashed-5.1
parent
e3feb266c3
commit
9c9b1f24f2
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@ -30,10 +30,17 @@
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#include <asm/irq.h>
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#include <asm/irq.h>
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#include <asm/uaccess.h>
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#include <asm/uaccess.h>
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MODULE_DESCRIPTION("ICPlus IP175C/IC1001 PHY drivers");
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MODULE_DESCRIPTION("ICPlus IP175C/IP101A/IC1001 PHY drivers");
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MODULE_AUTHOR("Michael Barkowski");
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MODULE_AUTHOR("Michael Barkowski");
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MODULE_LICENSE("GPL");
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MODULE_LICENSE("GPL");
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/* IP101A/IP1001 */
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#define IP10XX_SPEC_CTRL_STATUS 16 /* Spec. Control Register */
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#define IP1001_SPEC_CTRL_STATUS_2 20 /* IP1001 Spec. Control Reg 2 */
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#define IP1001_PHASE_SEL_MASK 3 /* IP1001 RX/TXPHASE_SEL */
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#define IP1001_APS_ON 11 /* IP1001 APS Mode bit */
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#define IP101A_APS_ON 2 /* IP101A APS Mode bit */
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static int ip175c_config_init(struct phy_device *phydev)
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static int ip175c_config_init(struct phy_device *phydev)
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{
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{
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int err, i;
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int err, i;
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@ -89,27 +96,58 @@ static int ip175c_config_init(struct phy_device *phydev)
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return 0;
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return 0;
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}
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}
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static int ip1001_config_init(struct phy_device *phydev)
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static int ip1xx_reset(struct phy_device *phydev)
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{
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{
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int err, value;
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int err, bmcr;
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/* Software Reset PHY */
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/* Software Reset PHY */
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value = phy_read(phydev, MII_BMCR);
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bmcr = phy_read(phydev, MII_BMCR);
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value |= BMCR_RESET;
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bmcr |= BMCR_RESET;
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err = phy_write(phydev, MII_BMCR, value);
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err = phy_write(phydev, MII_BMCR, bmcr);
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if (err < 0)
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if (err < 0)
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return err;
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return err;
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do {
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do {
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value = phy_read(phydev, MII_BMCR);
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bmcr = phy_read(phydev, MII_BMCR);
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} while (value & BMCR_RESET);
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} while (bmcr & BMCR_RESET);
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return err;
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}
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static int ip1001_config_init(struct phy_device *phydev)
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{
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int c;
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c = ip1xx_reset(phydev);
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if (c < 0)
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return c;
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/* Enable Auto Power Saving mode */
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c = phy_read(phydev, IP1001_SPEC_CTRL_STATUS_2);
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c |= IP1001_APS_ON;
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if (c < 0)
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return c;
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/* Additional delay (2ns) used to adjust RX clock phase
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/* Additional delay (2ns) used to adjust RX clock phase
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* at GMII/ RGMII interface */
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* at GMII/ RGMII interface */
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value = phy_read(phydev, 16);
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c = phy_read(phydev, IP10XX_SPEC_CTRL_STATUS);
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value |= 0x3;
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c |= IP1001_PHASE_SEL_MASK;
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return phy_write(phydev, 16, value);
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return phy_write(phydev, IP10XX_SPEC_CTRL_STATUS, c);
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}
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static int ip101a_config_init(struct phy_device *phydev)
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{
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int c;
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c = ip1xx_reset(phydev);
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if (c < 0)
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return c;
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/* Enable Auto Power Saving mode */
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c = phy_read(phydev, IP10XX_SPEC_CTRL_STATUS);
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c |= IP101A_APS_ON;
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return c;
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}
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}
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static int ip175c_read_status(struct phy_device *phydev)
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static int ip175c_read_status(struct phy_device *phydev)
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@ -158,6 +196,20 @@ static struct phy_driver ip1001_driver = {
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.driver = { .owner = THIS_MODULE,},
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.driver = { .owner = THIS_MODULE,},
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};
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};
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static struct phy_driver ip101a_driver = {
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.phy_id = 0x02430c54,
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.name = "ICPlus IP101A",
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.phy_id_mask = 0x0ffffff0,
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.features = PHY_BASIC_FEATURES | SUPPORTED_Pause |
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SUPPORTED_Asym_Pause,
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.config_init = &ip101a_config_init,
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.config_aneg = &genphy_config_aneg,
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.read_status = &genphy_read_status,
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.suspend = genphy_suspend,
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.resume = genphy_resume,
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.driver = { .owner = THIS_MODULE,},
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};
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static int __init icplus_init(void)
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static int __init icplus_init(void)
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{
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{
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int ret = 0;
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int ret = 0;
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@ -166,12 +218,17 @@ static int __init icplus_init(void)
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if (ret < 0)
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if (ret < 0)
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return -ENODEV;
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return -ENODEV;
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ret = phy_driver_register(&ip101a_driver);
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if (ret < 0)
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return -ENODEV;
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return phy_driver_register(&ip175c_driver);
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return phy_driver_register(&ip175c_driver);
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}
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}
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static void __exit icplus_exit(void)
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static void __exit icplus_exit(void)
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{
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{
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phy_driver_unregister(&ip1001_driver);
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phy_driver_unregister(&ip1001_driver);
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phy_driver_unregister(&ip101a_driver);
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phy_driver_unregister(&ip175c_driver);
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phy_driver_unregister(&ip175c_driver);
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}
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}
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