ASoC: mediatek: common: add some helpers to control mtk_memif
1. Add the following helper in mtk-afe-fe-dai to control to control mtk_memif - mtk_memif_set_enable - mtk_memif_set_disable - mtk_memif_set_addr - mtk_memif_set_channel - mtk_memif_set_rate - mtk_memif_set_rate_substream - mtk_memif_set_format - mtk_memif_set_pbuf_size 2.extend mtk_base_memif_data struct for new platform Signed-off-by: Eason Yen <eason.yen@mediatek.com> Link: https://lore.kernel.org/r/1573814926-15805-2-git-send-email-eason.yen@mediatek.com Signed-off-by: Mark Brown <broonie@kernel.org>alistair/sensors
Eason Yen
Mark Brown
parent
573892b6e6
commit
9cdf85a19b
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@ -361,6 +361,222 @@ int mtk_afe_dai_resume(struct snd_soc_dai *dai)
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}
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EXPORT_SYMBOL_GPL(mtk_afe_dai_resume);
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int mtk_memif_set_enable(struct mtk_base_afe *afe, int id)
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{
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struct mtk_base_afe_memif *memif = &afe->memif[id];
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if (memif->data->enable_shift < 0) {
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dev_warn(afe->dev, "%s(), error, id %d, enable_shift < 0\n",
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__func__, id);
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return 0;
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}
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return mtk_regmap_update_bits(afe->regmap, memif->data->enable_reg,
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1, 1, memif->data->enable_shift);
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}
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EXPORT_SYMBOL_GPL(mtk_memif_set_enable);
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int mtk_memif_set_disable(struct mtk_base_afe *afe, int id)
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{
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struct mtk_base_afe_memif *memif = &afe->memif[id];
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if (memif->data->enable_shift < 0) {
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dev_warn(afe->dev, "%s(), error, id %d, enable_shift < 0\n",
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__func__, id);
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return 0;
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}
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return mtk_regmap_update_bits(afe->regmap, memif->data->enable_reg,
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1, 0, memif->data->enable_shift);
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}
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EXPORT_SYMBOL_GPL(mtk_memif_set_disable);
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int mtk_memif_set_addr(struct mtk_base_afe *afe, int id,
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unsigned char *dma_area,
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dma_addr_t dma_addr,
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size_t dma_bytes)
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{
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struct mtk_base_afe_memif *memif = &afe->memif[id];
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int msb_at_bit33 = upper_32_bits(dma_addr) ? 1 : 0;
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unsigned int phys_buf_addr = lower_32_bits(dma_addr);
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unsigned int phys_buf_addr_upper_32 = upper_32_bits(dma_addr);
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memif->dma_area = dma_area;
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memif->dma_addr = dma_addr;
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memif->dma_bytes = dma_bytes;
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/* start */
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mtk_regmap_write(afe->regmap, memif->data->reg_ofs_base,
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phys_buf_addr);
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/* end */
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if (memif->data->reg_ofs_end)
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mtk_regmap_write(afe->regmap,
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memif->data->reg_ofs_end,
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phys_buf_addr + dma_bytes - 1);
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else
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mtk_regmap_write(afe->regmap,
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memif->data->reg_ofs_base +
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AFE_BASE_END_OFFSET,
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phys_buf_addr + dma_bytes - 1);
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/* set start, end, upper 32 bits */
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if (memif->data->reg_ofs_base_msb) {
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mtk_regmap_write(afe->regmap, memif->data->reg_ofs_base_msb,
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phys_buf_addr_upper_32);
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mtk_regmap_write(afe->regmap,
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memif->data->reg_ofs_end_msb,
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phys_buf_addr_upper_32);
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}
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/* set MSB to 33-bit */
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if (memif->data->msb_reg >= 0)
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mtk_regmap_update_bits(afe->regmap, memif->data->msb_reg,
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1, msb_at_bit33, memif->data->msb_shift);
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return 0;
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}
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EXPORT_SYMBOL_GPL(mtk_memif_set_addr);
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int mtk_memif_set_channel(struct mtk_base_afe *afe,
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int id, unsigned int channel)
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{
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struct mtk_base_afe_memif *memif = &afe->memif[id];
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unsigned int mono;
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if (memif->data->mono_shift < 0)
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return 0;
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if (memif->data->quad_ch_mask) {
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unsigned int quad_ch = (channel == 4) ? 1 : 0;
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mtk_regmap_update_bits(afe->regmap, memif->data->quad_ch_reg,
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memif->data->quad_ch_mask,
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quad_ch, memif->data->quad_ch_shift);
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}
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if (memif->data->mono_invert)
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mono = (channel == 1) ? 0 : 1;
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else
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mono = (channel == 1) ? 1 : 0;
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return mtk_regmap_update_bits(afe->regmap, memif->data->mono_reg,
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1, mono, memif->data->mono_shift);
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}
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EXPORT_SYMBOL_GPL(mtk_memif_set_channel);
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static int mtk_memif_set_rate_fs(struct mtk_base_afe *afe,
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int id, int fs)
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{
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struct mtk_base_afe_memif *memif = &afe->memif[id];
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if (memif->data->fs_shift >= 0)
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mtk_regmap_update_bits(afe->regmap, memif->data->fs_reg,
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memif->data->fs_maskbit,
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fs, memif->data->fs_shift);
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return 0;
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}
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int mtk_memif_set_rate(struct mtk_base_afe *afe,
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int id, unsigned int rate)
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{
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int fs = 0;
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if (!afe->get_dai_fs) {
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dev_err(afe->dev, "%s(), error, afe->get_dai_fs == NULL\n",
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__func__);
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return -EINVAL;
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}
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fs = afe->get_dai_fs(afe, id, rate);
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if (fs < 0)
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return -EINVAL;
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return mtk_memif_set_rate_fs(afe, id, fs);
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}
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EXPORT_SYMBOL_GPL(mtk_memif_set_rate);
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int mtk_memif_set_rate_substream(struct snd_pcm_substream *substream,
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int id, unsigned int rate)
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{
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struct snd_soc_pcm_runtime *rtd = substream->private_data;
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struct snd_soc_component *component =
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snd_soc_rtdcom_lookup(rtd, AFE_PCM_NAME);
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struct mtk_base_afe *afe = snd_soc_component_get_drvdata(component);
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int fs = 0;
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if (!afe->memif_fs) {
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dev_err(afe->dev, "%s(), error, afe->memif_fs == NULL\n",
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__func__);
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return -EINVAL;
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}
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fs = afe->memif_fs(substream, rate);
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if (fs < 0)
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return -EINVAL;
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return mtk_memif_set_rate_fs(afe, id, fs);
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}
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EXPORT_SYMBOL_GPL(mtk_memif_set_rate_substream);
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int mtk_memif_set_format(struct mtk_base_afe *afe,
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int id, snd_pcm_format_t format)
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{
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struct mtk_base_afe_memif *memif = &afe->memif[id];
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int hd_audio = 0;
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int hd_align = 0;
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/* set hd mode */
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switch (format) {
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case SNDRV_PCM_FORMAT_S16_LE:
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case SNDRV_PCM_FORMAT_U16_LE:
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hd_audio = 0;
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break;
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case SNDRV_PCM_FORMAT_S32_LE:
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case SNDRV_PCM_FORMAT_U32_LE:
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hd_audio = 1;
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hd_align = 1;
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break;
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case SNDRV_PCM_FORMAT_S24_LE:
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case SNDRV_PCM_FORMAT_U24_LE:
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hd_audio = 1;
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break;
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default:
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dev_err(afe->dev, "%s() error: unsupported format %d\n",
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__func__, format);
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break;
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}
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mtk_regmap_update_bits(afe->regmap, memif->data->hd_reg,
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1, hd_audio, memif->data->hd_shift);
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mtk_regmap_update_bits(afe->regmap, memif->data->hd_align_reg,
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1, hd_align, memif->data->hd_align_mshift);
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return 0;
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}
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EXPORT_SYMBOL_GPL(mtk_memif_set_format);
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int mtk_memif_set_pbuf_size(struct mtk_base_afe *afe,
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int id, int pbuf_size)
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{
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const struct mtk_base_memif_data *memif_data = afe->memif[id].data;
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if (memif_data->pbuf_mask == 0 || memif_data->minlen_mask == 0)
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return 0;
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mtk_regmap_update_bits(afe->regmap, memif_data->pbuf_reg,
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memif_data->pbuf_mask,
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pbuf_size, memif_data->pbuf_shift);
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mtk_regmap_update_bits(afe->regmap, memif_data->minlen_reg,
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memif_data->minlen_mask,
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pbuf_size, memif_data->minlen_shift);
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return 0;
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}
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EXPORT_SYMBOL_GPL(mtk_memif_set_pbuf_size);
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MODULE_DESCRIPTION("Mediatek simple fe dai operator");
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MODULE_AUTHOR("Garlic Tseng <garlic.tseng@mediatek.com>");
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MODULE_LICENSE("GPL v2");
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@ -34,4 +34,20 @@ int mtk_dynamic_irq_release(struct mtk_base_afe *afe, int irq_id);
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int mtk_afe_dai_suspend(struct snd_soc_dai *dai);
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int mtk_afe_dai_resume(struct snd_soc_dai *dai);
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int mtk_memif_set_enable(struct mtk_base_afe *afe, int id);
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int mtk_memif_set_disable(struct mtk_base_afe *afe, int id);
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int mtk_memif_set_addr(struct mtk_base_afe *afe, int id,
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unsigned char *dma_area,
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dma_addr_t dma_addr,
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size_t dma_bytes);
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int mtk_memif_set_channel(struct mtk_base_afe *afe,
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int id, unsigned int channel);
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int mtk_memif_set_rate(struct mtk_base_afe *afe,
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int id, unsigned int rate);
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int mtk_memif_set_rate_substream(struct snd_pcm_substream *substream,
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int id, unsigned int rate);
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int mtk_memif_set_format(struct mtk_base_afe *afe,
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int id, snd_pcm_format_t format);
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int mtk_memif_set_pbuf_size(struct mtk_base_afe *afe,
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int id, int pbuf_size);
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#endif
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@ -16,21 +16,38 @@ struct mtk_base_memif_data {
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const char *name;
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int reg_ofs_base;
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int reg_ofs_cur;
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int reg_ofs_end;
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int reg_ofs_base_msb;
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int reg_ofs_cur_msb;
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int reg_ofs_end_msb;
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int fs_reg;
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int fs_shift;
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int fs_maskbit;
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int mono_reg;
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int mono_shift;
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int mono_invert;
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int quad_ch_reg;
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int quad_ch_mask;
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int quad_ch_shift;
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int enable_reg;
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int enable_shift;
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int hd_reg;
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int hd_align_reg;
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int hd_shift;
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int hd_align_reg;
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int hd_align_mshift;
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int msb_reg;
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int msb_shift;
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int msb2_reg;
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int msb2_shift;
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int agent_disable_reg;
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int agent_disable_shift;
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/* playback memif only */
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int pbuf_reg;
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int pbuf_mask;
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int pbuf_shift;
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int minlen_reg;
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int minlen_mask;
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int minlen_shift;
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};
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struct mtk_base_irq_data {
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@ -84,6 +101,12 @@ struct mtk_base_afe {
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unsigned int rate);
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int (*irq_fs)(struct snd_pcm_substream *substream,
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unsigned int rate);
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int (*get_dai_fs)(struct mtk_base_afe *afe,
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int dai_id, unsigned int rate);
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int (*get_memif_pbuf_size)(struct snd_pcm_substream *substream);
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int (*request_dram_resource)(struct device *dev);
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int (*release_dram_resource)(struct device *dev);
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void *platform_priv;
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};
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@ -95,6 +118,9 @@ struct mtk_base_afe_memif {
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const struct mtk_base_memif_data *data;
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int irq_usage;
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int const_irq;
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unsigned char *dma_area;
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dma_addr_t dma_addr;
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size_t dma_bytes;
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};
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struct mtk_base_afe_irq {
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