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clk: s32v234: Enable FlexCAN clock 

Enable the clocks needed for FlexCAN support on Treerunner.

Signed-off-by: Chircu-Mare Bogdan-Petru <Bogdan.Chircu@freescale.com>
Signed-off-by: Stoica Cosmin-Stefan <cosmin.stoica@nxp.com>
Signed-off-by: Larisa Grigore <Larisa.Grigore@nxp.com>
Signed-off-by: Stefan-Gabriel Mirea <stefan-gabriel.mirea@nxp.com>
Reviewed-by: Li Yang <leoyang.li@nxp.com>
Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com>
5.4-rM2-2.2.x-imx-squashed
Chircu-Mare Bogdan-Petru 2015-11-03 17:25:46 +02:00 committed by Stefan-Gabriel Mirea
parent 086bbd068f
commit 9ce8988c80
1 changed files with 15 additions and 0 deletions
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15
drivers/clk/s32/s32v234/clk.c
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@ -24,6 +24,9 @@ PNAME(osc_sels) = {"firc", "fxosc", };
PNAME(sys_sels) = {"firc", "fxosc", "armpll_dfs0", };
PNAME(can_sels) = {"firc", "fxosc", "dummy",
"periphpll_phi0_div5", };
PNAME(lin_sels) = {"firc", "fxosc", "dummy",
"periphpll_phi0_div3", "dummy", "dummy",
"dummy", "dummy", "sys6",};
@ -179,6 +182,18 @@ static void __init s32v234_clocks_init(struct device_node *mc_cgm0_node)
clk[S32V234_CLK_PERIPHPLL_PHI0_DIV5] = s32_clk_fixed_factor(
"periphpll_phi0_div5", "periphpll_phi0", 1, 5);
clk[S32V234_CLK_CAN_SEL] = s32_clk_mux("can_sel",
CGM_ACn_SC(mc_cgm0_base, 6),
MC_CGM_ACn_SEL_OFFSET,
MC_CGM_ACn_SEL_SIZE,
can_sels, ARRAY_SIZE(can_sels), &s32v234_lock);
/* CAN Clock */
clk[S32V234_CLK_CAN] = s32_clk_divider("can", "can_sel",
CGM_ACn_DCm(mc_cgm0_base, 6, 0),
MC_CGM_ACn_DCm_PREDIV_OFFSET,
MC_CGM_ACn_DCm_PREDIV_SIZE, &s32v234_lock);
/* Lin Clock */
clk[S32V234_CLK_LIN_SEL] = s32_clk_mux("lin_sel",
CGM_ACn_SC(mc_cgm0_base, 3),