powerpc/64s/idle: Avoid SRR usage in idle sleep/wake paths
Idle code now always runs at the 0xc... effective address whether in real or virtual mode. This means rfid can be ditched, along with a lot of SRR manipulations. In the wakeup path, carry SRR1 around in r12. Use mtmsrd to change MSR states as required. This also balances the return prediction for the idle call, by doing blr rather than rfid to return to the idle caller. On POWER9, 2-process context switch on different cores, with snooze disabled, increases performance by 2%. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> [mpe: Incorporate v2 fixes from Nick] Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>hifive-unleashed-5.1
Nicholas Piggin
Michael Ellerman
parent
b51351e264
commit
9d29250136
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@ -130,6 +130,7 @@ EXC_VIRT_NONE(0x4100, 0x100)
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#ifdef CONFIG_PPC_P7_NAP
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EXC_COMMON_BEGIN(system_reset_idle_common)
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mfspr r12,SPRN_SRR1
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b pnv_powersave_wakeup
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#endif
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@ -111,7 +111,7 @@ core_idle_lock_held:
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* r3 - PNV_THREAD_NAP/SLEEP/WINKLE in POWER8
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* - Requested PSSCR value in POWER9
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*
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* Address of idle handler to 'rfid' to in r4
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* Address of idle handler to branch to in realmode in r4
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*/
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pnv_powersave_common:
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/* Use r3 to pass state nap/sleep/winkle */
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@ -121,14 +121,14 @@ pnv_powersave_common:
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* need to save PC, some CR bits and the NV GPRs,
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* but for now an interrupt frame will do.
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*/
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mtctr r4
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mflr r0
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std r0,16(r1)
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stdu r1,-INT_FRAME_SIZE(r1)
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std r0,_LINK(r1)
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std r0,_NIP(r1)
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mfmsr r9
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/* We haven't lost state ... yet */
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li r0,0
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stb r0,PACA_NAPSTATELOST(r13)
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@ -138,7 +138,6 @@ pnv_powersave_common:
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SAVE_NVGPRS(r1)
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mfcr r5
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std r5,_CCR(r1)
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std r9,_MSR(r1)
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std r1,PACAR1(r13)
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/*
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@ -148,12 +147,8 @@ pnv_powersave_common:
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* the MMU context to the guest.
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*/
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LOAD_REG_IMMEDIATE(r7, MSR_IDLE)
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li r6, MSR_RI
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andc r6, r9, r6
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mtmsrd r6, 1 /* clear RI before setting SRR0/1 */
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mtspr SPRN_SRR0, r4
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mtspr SPRN_SRR1, r7
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rfid
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mtmsrd r7,0
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bctr
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.globl pnv_enter_arch207_idle_mode
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pnv_enter_arch207_idle_mode:
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@ -305,11 +300,10 @@ _GLOBAL(power7_idle_insn)
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b pnv_powersave_common
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#define CHECK_HMI_INTERRUPT \
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mfspr r0,SPRN_SRR1; \
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BEGIN_FTR_SECTION_NESTED(66); \
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rlwinm r0,r0,45-31,0xf; /* extract wake reason field (P8) */ \
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rlwinm r0,r12,45-31,0xf; /* extract wake reason field (P8) */ \
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FTR_SECTION_ELSE_NESTED(66); \
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rlwinm r0,r0,45-31,0xe; /* P7 wake reason field is 3 bits */ \
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rlwinm r0,r12,45-31,0xe; /* P7 wake reason field is 3 bits */ \
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ALT_FTR_SECTION_END_NESTED_IFSET(CPU_FTR_ARCH_207S, 66); \
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cmpwi r0,0xa; /* Hypervisor maintenance ? */ \
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bne 20f; \
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@ -388,17 +382,17 @@ pnv_powersave_wakeup_mce:
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/*
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* Now put the original SRR1 with SRR1_WAKEMCE_RESVD as the wake
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* reason into SRR1, which allows reuse of the system reset wakeup
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* reason into r12, which allows reuse of the system reset wakeup
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* code without being mistaken for another type of wakeup.
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*/
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oris r3,r3,SRR1_WAKEMCE_RESVD@h
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mtspr SPRN_SRR1,r3
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oris r12,r3,SRR1_WAKEMCE_RESVD@h
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b pnv_powersave_wakeup
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/*
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* Called from reset vector for powersave wakeups.
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* cr3 - set to gt if waking up with partial/complete hypervisor state loss
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* r12 - SRR1
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*/
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.global pnv_powersave_wakeup
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pnv_powersave_wakeup:
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@ -416,6 +410,8 @@ ALT_FTR_SECTION_END_IFSET(CPU_FTR_ARCH_300)
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li r0,PNV_THREAD_RUNNING
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stb r0,PACA_THREAD_IDLE_STATE(r13) /* Clear thread state */
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mr r3,r12
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#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
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li r0,KVM_HWTHREAD_IN_KERNEL
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stb r0,HSTATE_HWTHREAD_STATE(r13)
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@ -429,7 +425,6 @@ ALT_FTR_SECTION_END_IFSET(CPU_FTR_ARCH_300)
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#endif
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/* Return SRR1 from power7_nap() */
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mfspr r3,SPRN_SRR1
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blt cr3,pnv_wakeup_noloss
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b pnv_wakeup_loss
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@ -529,9 +524,9 @@ pnv_wakeup_tb_loss:
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* is required to return back to reset vector after hypervisor state
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* restore is complete.
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*/
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mr r19,r12
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mr r18,r4
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mflr r17
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mfspr r16,SPRN_SRR1
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BEGIN_FTR_SECTION
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CHECK_HMI_INTERRUPT
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END_FTR_SECTION_IFSET(CPU_FTR_HVMODE)
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@ -781,7 +776,7 @@ BEGIN_FTR_SECTION
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END_FTR_SECTION_IFSET(CPU_FTR_ARCH_300)
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hypervisor_state_restored:
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mtspr SPRN_SRR1,r16
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mr r12,r19
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mtlr r17
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blr /* return to pnv_powersave_wakeup */
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@ -794,6 +789,7 @@ fastsleep_workaround_at_exit:
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/*
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* R3 here contains the value that will be returned to the caller
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* of power7_nap.
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* R12 contains SRR1 for CHECK_HMI_INTERRUPT.
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*/
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.global pnv_wakeup_loss
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pnv_wakeup_loss:
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@ -803,32 +799,33 @@ BEGIN_FTR_SECTION
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END_FTR_SECTION_IFSET(CPU_FTR_HVMODE)
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REST_NVGPRS(r1)
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REST_GPR(2, r1)
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ld r4,PACAKMSR(r13)
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ld r5,_LINK(r1)
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ld r6,_CCR(r1)
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ld r4,_MSR(r1)
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ld r5,_NIP(r1)
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addi r1,r1,INT_FRAME_SIZE
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mtlr r5
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mtcr r6
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mtspr SPRN_SRR1,r4
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mtspr SPRN_SRR0,r5
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rfid
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mtmsrd r4
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blr
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/*
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* R3 here contains the value that will be returned to the caller
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* of power7_nap.
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* R12 contains SRR1 for CHECK_HMI_INTERRUPT.
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*/
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pnv_wakeup_noloss:
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lbz r0,PACA_NAPSTATELOST(r13)
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cmpwi r0,0
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bne pnv_wakeup_loss
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ld r1,PACAR1(r13)
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BEGIN_FTR_SECTION
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CHECK_HMI_INTERRUPT
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END_FTR_SECTION_IFSET(CPU_FTR_HVMODE)
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ld r1,PACAR1(r13)
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ld r6,_CCR(r1)
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ld r4,_MSR(r1)
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ld r4,PACAKMSR(r13)
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ld r5,_NIP(r1)
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ld r6,_CCR(r1)
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addi r1,r1,INT_FRAME_SIZE
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mtlr r5
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mtcr r6
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mtspr SPRN_SRR1,r4
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mtspr SPRN_SRR0,r5
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rfid
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mtmsrd r4
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blr
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@ -329,15 +329,21 @@ kvm_novcpu_exit:
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* We come in here when wakened from nap mode.
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* Relocation is off and most register values are lost.
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* r13 points to the PACA.
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* r3 contains the SRR1 wakeup value, SRR1 is trashed.
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*/
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.globl kvm_start_guest
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kvm_start_guest:
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/* Set runlatch bit the minute you wake up from nap */
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mfspr r0, SPRN_CTRLF
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ori r0, r0, 1
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mtspr SPRN_CTRLT, r0
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/*
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* Could avoid this and pass it through in r3. For now,
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* code expects it to be in SRR1.
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*/
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mtspr SPRN_SRR1,r3
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ld r2,PACATOC(r13)
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li r0,KVM_HWTHREAD_IN_KVM
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@ -456,13 +462,15 @@ kvm_no_guest:
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/*
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* We jump to pnv_wakeup_loss, which will return to the caller
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* of power7_nap in the powernv cpu offline loop. The value we
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* put in r3 becomes the return value for power7_nap.
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* put in r3 becomes the return value for power7_nap. pnv_wakeup_loss
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* requires SRR1 in r12.
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*/
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li r3, LPCR_PECE0
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mfspr r4, SPRN_LPCR
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rlwimi r4, r3, 0, LPCR_PECE0 | LPCR_PECE1
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mtspr SPRN_LPCR, r4
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li r3, 0
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mfspr r12,SPRN_SRR1
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b pnv_wakeup_loss
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53: HMT_LOW
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