i2c: at91: added slave mode support
Slave mode driver is based on the concept of i2c-designware driver. Signed-off-by: Juergen Fitschen <me@jue.yt> [ludovic.desroches@microchip.com: rework Kconfig and replace IS_ENABLED by defined] Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>hifive-unleashed-5.2
Juergen Fitschen
Wolfram Sang
parent
ad7d142f89
commit
9d3ca54b55
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@ -387,6 +387,19 @@ config I2C_AT91
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the latency to fill the transmission register is too long. If you
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are facing this situation, use the i2c-gpio driver.
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config I2C_AT91_SLAVE_EXPERIMENTAL
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tristate "Microchip AT91 I2C experimental slave mode"
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depends on I2C_AT91
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select I2C_SLAVE
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help
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If you say yes to this option, support for the slave mode will be
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added. Caution: do not use it for production. This feature has not
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been tested in a heavy way, help wanted.
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There are known bugs:
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- It can hang, on a SAMA5D4, after several transfers.
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- There are some mismtaches with a SAMA5D4 as slave and a SAMA5D2 as
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master.
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config I2C_AU1550
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tristate "Au1550/Au1200/Au1300 SMBus interface"
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depends on MIPS_ALCHEMY
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@ -36,6 +36,9 @@ obj-$(CONFIG_I2C_ALTERA) += i2c-altera.o
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obj-$(CONFIG_I2C_ASPEED) += i2c-aspeed.o
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obj-$(CONFIG_I2C_AT91) += i2c-at91.o
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i2c-at91-objs := i2c-at91-core.o i2c-at91-master.o
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ifeq ($(CONFIG_I2C_AT91_SLAVE_EXPERIMENTAL),y)
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i2c-at91-objs += i2c-at91-slave.o
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endif
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obj-$(CONFIG_I2C_AU1550) += i2c-au1550.o
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obj-$(CONFIG_I2C_AXXIA) += i2c-axxia.o
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obj-$(CONFIG_I2C_BCM2835) += i2c-bcm2835.o
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@ -56,8 +56,10 @@ void at91_init_twi_bus(struct at91_twi_dev *dev)
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{
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at91_disable_twi_interrupts(dev);
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at91_twi_write(dev, AT91_TWI_CR, AT91_TWI_SWRST);
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at91_init_twi_bus_master(dev);
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if (dev->slave_detected)
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at91_init_twi_bus_slave(dev);
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else
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at91_init_twi_bus_master(dev);
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}
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static struct at91_twi_pdata at91rm9200_config = {
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@ -239,7 +241,12 @@ static int at91_twi_probe(struct platform_device *pdev)
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dev->adapter.timeout = AT91_I2C_TIMEOUT;
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dev->adapter.dev.of_node = pdev->dev.of_node;
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rc = at91_twi_probe_master(pdev, phy_addr, dev);
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dev->slave_detected = i2c_detect_slave_mode(&pdev->dev);
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if (dev->slave_detected)
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rc = at91_twi_probe_slave(pdev, phy_addr, dev);
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else
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rc = at91_twi_probe_master(pdev, phy_addr, dev);
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if (rc)
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return rc;
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@ -0,0 +1,143 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* i2c slave support for Atmel's AT91 Two-Wire Interface (TWI)
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*
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* Copyright (C) 2017 Juergen Fitschen <me@jue.yt>
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*/
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#include <linux/err.h>
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#include <linux/i2c.h>
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#include <linux/interrupt.h>
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#include <linux/pm_runtime.h>
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#include "i2c-at91.h"
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static irqreturn_t atmel_twi_interrupt_slave(int irq, void *dev_id)
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{
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struct at91_twi_dev *dev = dev_id;
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const unsigned status = at91_twi_read(dev, AT91_TWI_SR);
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const unsigned irqstatus = status & at91_twi_read(dev, AT91_TWI_IMR);
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u8 value;
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if (!irqstatus)
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return IRQ_NONE;
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/* slave address has been detected on I2C bus */
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if (irqstatus & AT91_TWI_SVACC) {
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if (status & AT91_TWI_SVREAD) {
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i2c_slave_event(dev->slave,
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I2C_SLAVE_READ_REQUESTED, &value);
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writeb_relaxed(value, dev->base + AT91_TWI_THR);
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at91_twi_write(dev, AT91_TWI_IER,
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AT91_TWI_TXRDY | AT91_TWI_EOSACC);
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} else {
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i2c_slave_event(dev->slave,
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I2C_SLAVE_WRITE_REQUESTED, &value);
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at91_twi_write(dev, AT91_TWI_IER,
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AT91_TWI_RXRDY | AT91_TWI_EOSACC);
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}
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at91_twi_write(dev, AT91_TWI_IDR, AT91_TWI_SVACC);
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}
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/* byte transmitted to remote master */
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if (irqstatus & AT91_TWI_TXRDY) {
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i2c_slave_event(dev->slave, I2C_SLAVE_READ_PROCESSED, &value);
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writeb_relaxed(value, dev->base + AT91_TWI_THR);
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}
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/* byte received from remote master */
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if (irqstatus & AT91_TWI_RXRDY) {
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value = readb_relaxed(dev->base + AT91_TWI_RHR);
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i2c_slave_event(dev->slave, I2C_SLAVE_WRITE_RECEIVED, &value);
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}
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/* master sent stop */
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if (irqstatus & AT91_TWI_EOSACC) {
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at91_twi_write(dev, AT91_TWI_IDR,
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AT91_TWI_TXRDY | AT91_TWI_RXRDY | AT91_TWI_EOSACC);
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at91_twi_write(dev, AT91_TWI_IER, AT91_TWI_SVACC);
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i2c_slave_event(dev->slave, I2C_SLAVE_STOP, &value);
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}
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return IRQ_HANDLED;
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}
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static int at91_reg_slave(struct i2c_client *slave)
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{
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struct at91_twi_dev *dev = i2c_get_adapdata(slave->adapter);
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if (dev->slave)
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return -EBUSY;
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if (slave->flags & I2C_CLIENT_TEN)
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return -EAFNOSUPPORT;
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/* Make sure twi_clk doesn't get turned off! */
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pm_runtime_get_sync(dev->dev);
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dev->slave = slave;
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dev->smr = AT91_TWI_SMR_SADR(slave->addr);
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at91_init_twi_bus(dev);
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at91_twi_write(dev, AT91_TWI_IER, AT91_TWI_SVACC);
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dev_info(dev->dev, "entered slave mode (ADR=%d)\n", slave->addr);
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return 0;
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}
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static int at91_unreg_slave(struct i2c_client *slave)
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{
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struct at91_twi_dev *dev = i2c_get_adapdata(slave->adapter);
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WARN_ON(!dev->slave);
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dev_info(dev->dev, "leaving slave mode\n");
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dev->slave = NULL;
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dev->smr = 0;
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at91_init_twi_bus(dev);
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pm_runtime_put(dev->dev);
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return 0;
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}
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static u32 at91_twi_func(struct i2c_adapter *adapter)
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{
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return I2C_FUNC_SLAVE | I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL
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| I2C_FUNC_SMBUS_READ_BLOCK_DATA;
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}
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static const struct i2c_algorithm at91_twi_algorithm_slave = {
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.reg_slave = at91_reg_slave,
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.unreg_slave = at91_unreg_slave,
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.functionality = at91_twi_func,
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};
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int at91_twi_probe_slave(struct platform_device *pdev,
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u32 phy_addr, struct at91_twi_dev *dev)
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{
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int rc;
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rc = devm_request_irq(&pdev->dev, dev->irq, atmel_twi_interrupt_slave,
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0, dev_name(dev->dev), dev);
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if (rc) {
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dev_err(dev->dev, "Cannot get irq %d: %d\n", dev->irq, rc);
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return rc;
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}
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dev->adapter.algo = &at91_twi_algorithm_slave;
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return 0;
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}
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void at91_init_twi_bus_slave(struct at91_twi_dev *dev)
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{
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at91_twi_write(dev, AT91_TWI_CR, AT91_TWI_MSDIS);
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if (dev->slave_detected && dev->smr) {
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at91_twi_write(dev, AT91_TWI_SMR, dev->smr);
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at91_twi_write(dev, AT91_TWI_CR, AT91_TWI_SVEN);
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}
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}
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@ -49,6 +49,10 @@
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#define AT91_TWI_IADRSZ_1 0x0100 /* Internal Device Address Size */
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#define AT91_TWI_MREAD BIT(12) /* Master Read Direction */
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#define AT91_TWI_SMR 0x0008 /* Slave Mode Register */
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#define AT91_TWI_SMR_SADR_MAX 0x007f
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#define AT91_TWI_SMR_SADR(x) (((x) & AT91_TWI_SMR_SADR_MAX) << 16)
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#define AT91_TWI_IADR 0x000c /* Internal Address Register */
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#define AT91_TWI_CWGR 0x0010 /* Clock Waveform Generator Reg */
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@ -59,13 +63,17 @@
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#define AT91_TWI_TXCOMP BIT(0) /* Transmission Complete */
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#define AT91_TWI_RXRDY BIT(1) /* Receive Holding Register Ready */
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#define AT91_TWI_TXRDY BIT(2) /* Transmit Holding Register Ready */
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#define AT91_TWI_SVREAD BIT(3) /* Slave Read */
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#define AT91_TWI_SVACC BIT(4) /* Slave Access */
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#define AT91_TWI_OVRE BIT(6) /* Overrun Error */
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#define AT91_TWI_UNRE BIT(7) /* Underrun Error */
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#define AT91_TWI_NACK BIT(8) /* Not Acknowledged */
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#define AT91_TWI_EOSACC BIT(11) /* End Of Slave Access */
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#define AT91_TWI_LOCK BIT(23) /* TWI Lock due to Frame Errors */
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#define AT91_TWI_INT_MASK \
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(AT91_TWI_TXCOMP | AT91_TWI_RXRDY | AT91_TWI_TXRDY | AT91_TWI_NACK)
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(AT91_TWI_TXCOMP | AT91_TWI_RXRDY | AT91_TWI_TXRDY | AT91_TWI_NACK \
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| AT91_TWI_SVACC | AT91_TWI_EOSACC)
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#define AT91_TWI_IER 0x0024 /* Interrupt Enable Register */
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#define AT91_TWI_IDR 0x0028 /* Interrupt Disable Register */
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@ -133,6 +141,11 @@ struct at91_twi_dev {
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bool recv_len_abort;
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u32 fifo_size;
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struct at91_twi_dma dma;
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bool slave_detected;
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#ifdef CONFIG_I2C_AT91_SLAVE_EXPERIMENTAL
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unsigned smr;
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struct i2c_client *slave;
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#endif
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};
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unsigned at91_twi_read(struct at91_twi_dev *dev, unsigned reg);
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@ -145,3 +158,18 @@ void at91_init_twi_bus(struct at91_twi_dev *dev);
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void at91_init_twi_bus_master(struct at91_twi_dev *dev);
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int at91_twi_probe_master(struct platform_device *pdev, u32 phy_addr,
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struct at91_twi_dev *dev);
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#ifdef CONFIG_I2C_AT91_SLAVE_EXPERIMENTAL
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void at91_init_twi_bus_slave(struct at91_twi_dev *dev);
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int at91_twi_probe_slave(struct platform_device *pdev, u32 phy_addr,
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struct at91_twi_dev *dev);
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#else
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static inline void at91_init_twi_bus_slave(struct at91_twi_dev *dev) {}
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static inline int at91_twi_probe_slave(struct platform_device *pdev,
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u32 phy_addr, struct at91_twi_dev *dev)
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{
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return -EINVAL;
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}
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#endif
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