drm/radeon: adjust si_dpm function for code sharing
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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286d9cc67a
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@ -3759,19 +3759,20 @@ static bool si_validate_phase_shedding_tables(struct radeon_device *rdev,
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}
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static void si_trim_voltage_table_to_fit_state_table(struct radeon_device *rdev,
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static void si_trim_voltage_table_to_fit_state_table(struct radeon_device *rdev,
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u32 max_voltage_steps,
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struct atom_voltage_table *voltage_table)
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struct atom_voltage_table *voltage_table)
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{
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{
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unsigned int i, diff;
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unsigned int i, diff;
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if (voltage_table->count <= SISLANDS_MAX_NO_VREG_STEPS)
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if (voltage_table->count <= max_voltage_steps)
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return;
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return;
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diff = voltage_table->count - SISLANDS_MAX_NO_VREG_STEPS;
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diff = voltage_table->count - max_voltage_steps;
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for (i= 0; i < SISLANDS_MAX_NO_VREG_STEPS; i++)
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for (i= 0; i < max_voltage_steps; i++)
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voltage_table->entries[i] = voltage_table->entries[i + diff];
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voltage_table->entries[i] = voltage_table->entries[i + diff];
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voltage_table->count = SISLANDS_MAX_NO_VREG_STEPS;
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voltage_table->count = max_voltage_steps;
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}
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}
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static int si_construct_voltage_tables(struct radeon_device *rdev)
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static int si_construct_voltage_tables(struct radeon_device *rdev)
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@ -3787,7 +3788,9 @@ static int si_construct_voltage_tables(struct radeon_device *rdev)
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return ret;
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return ret;
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if (eg_pi->vddc_voltage_table.count > SISLANDS_MAX_NO_VREG_STEPS)
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if (eg_pi->vddc_voltage_table.count > SISLANDS_MAX_NO_VREG_STEPS)
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si_trim_voltage_table_to_fit_state_table(rdev, &eg_pi->vddc_voltage_table);
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si_trim_voltage_table_to_fit_state_table(rdev,
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SISLANDS_MAX_NO_VREG_STEPS,
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&eg_pi->vddc_voltage_table);
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if (eg_pi->vddci_control) {
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if (eg_pi->vddci_control) {
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ret = radeon_atom_get_voltage_table(rdev, VOLTAGE_TYPE_VDDCI,
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ret = radeon_atom_get_voltage_table(rdev, VOLTAGE_TYPE_VDDCI,
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@ -3796,7 +3799,9 @@ static int si_construct_voltage_tables(struct radeon_device *rdev)
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return ret;
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return ret;
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if (eg_pi->vddci_voltage_table.count > SISLANDS_MAX_NO_VREG_STEPS)
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if (eg_pi->vddci_voltage_table.count > SISLANDS_MAX_NO_VREG_STEPS)
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si_trim_voltage_table_to_fit_state_table(rdev, &eg_pi->vddci_voltage_table);
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si_trim_voltage_table_to_fit_state_table(rdev,
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SISLANDS_MAX_NO_VREG_STEPS,
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&eg_pi->vddci_voltage_table);
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}
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}
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if (pi->mvdd_control) {
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if (pi->mvdd_control) {
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@ -3814,7 +3819,9 @@ static int si_construct_voltage_tables(struct radeon_device *rdev)
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}
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}
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if (si_pi->mvdd_voltage_table.count > SISLANDS_MAX_NO_VREG_STEPS)
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if (si_pi->mvdd_voltage_table.count > SISLANDS_MAX_NO_VREG_STEPS)
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si_trim_voltage_table_to_fit_state_table(rdev, &si_pi->mvdd_voltage_table);
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si_trim_voltage_table_to_fit_state_table(rdev,
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SISLANDS_MAX_NO_VREG_STEPS,
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&si_pi->mvdd_voltage_table);
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}
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}
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if (si_pi->vddc_phase_shed_control) {
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if (si_pi->vddc_phase_shed_control) {
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