From 9235d1f85eb7628005aa86b17d7a311d53ae6967 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Cl=C3=A9ment=20Peron?= Date: Mon, 28 May 2018 19:34:08 +0200 Subject: [PATCH 001/112] ARM: imx: remove inexistant EPIT timer init MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit i.MX EPIT timer has been removed but not the init function declaration. Signed-off-by: Clément Peron Signed-off-by: Shawn Guo --- arch/arm/mach-imx/common.h | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/mach-imx/common.h b/arch/arm/mach-imx/common.h index c8d68e918b2f..18aae76fa2da 100644 --- a/arch/arm/mach-imx/common.h +++ b/arch/arm/mach-imx/common.h @@ -38,7 +38,6 @@ void imx21_soc_init(void); void imx27_soc_init(void); void imx31_soc_init(void); void imx35_soc_init(void); -void epit_timer_init(void __iomem *base, int irq); int mx21_clocks_init(unsigned long lref, unsigned long fref); int mx27_clocks_init(unsigned long fref); int mx31_clocks_init(unsigned long fref); From f13e47ee48e283e0b5aab8f899d438ae54b1d05d Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 18 May 2018 14:48:50 +0200 Subject: [PATCH 002/112] ARM: shmobile: r8a7790: Remove legacy SMP fallback code As of commit f5d70b9cee2282ec ("ARM: shmobile: r8a7790: Prioritize DT APMU support") in v4.8, non-DT enablement of SMP was left as a fallback for backwards compatibility with old DTBs. The time has come to drop backwards compatibility, hence remove the fallback code. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/Makefile | 1 - arch/arm/mach-shmobile/r8a7790.h | 7 --- arch/arm/mach-shmobile/setup-r8a7790.c | 2 - arch/arm/mach-shmobile/smp-r8a7790.c | 71 -------------------------- 4 files changed, 81 deletions(-) delete mode 100644 arch/arm/mach-shmobile/r8a7790.h delete mode 100644 arch/arm/mach-shmobile/smp-r8a7790.c diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile index 1939f521579c..9133949b5df2 100644 --- a/arch/arm/mach-shmobile/Makefile +++ b/arch/arm/mach-shmobile/Makefile @@ -32,7 +32,6 @@ obj-$(CONFIG_ARCH_R8A7793) += regulator-quirk-rcar-gen2.o smp-y := $(cpu-y) smp-$(CONFIG_ARCH_SH73A0) += smp-sh73a0.o headsmp-scu.o platsmp-scu.o smp-$(CONFIG_ARCH_R8A7779) += smp-r8a7779.o headsmp-scu.o platsmp-scu.o -smp-$(CONFIG_ARCH_R8A7790) += smp-r8a7790.o smp-$(CONFIG_ARCH_R8A7791) += smp-r8a7791.o smp-$(CONFIG_ARCH_EMEV2) += smp-emev2.o headsmp-scu.o platsmp-scu.o diff --git a/arch/arm/mach-shmobile/r8a7790.h b/arch/arm/mach-shmobile/r8a7790.h deleted file mode 100644 index 669c8cd09e07..000000000000 --- a/arch/arm/mach-shmobile/r8a7790.h +++ /dev/null @@ -1,7 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef __ASM_R8A7790_H__ -#define __ASM_R8A7790_H__ - -extern const struct smp_operations r8a7790_smp_ops; - -#endif /* __ASM_R8A7790_H__ */ diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c b/arch/arm/mach-shmobile/setup-r8a7790.c index 78d3e859bd64..fd2435b39529 100644 --- a/arch/arm/mach-shmobile/setup-r8a7790.c +++ b/arch/arm/mach-shmobile/setup-r8a7790.c @@ -19,7 +19,6 @@ #include #include "common.h" -#include "r8a7790.h" #include "rcar-gen2.h" static const char * const r8a7790_boards_compat_dt[] __initconst = { @@ -29,7 +28,6 @@ static const char * const r8a7790_boards_compat_dt[] __initconst = { DT_MACHINE_START(R8A7790_DT, "Generic R8A7790 (Flattened Device Tree)") .smp_init = smp_init_ops(shmobile_smp_init_fallback_ops), - .smp = smp_ops(r8a7790_smp_ops), .init_early = shmobile_init_delay, .init_time = rcar_gen2_timer_init, .init_late = shmobile_init_late, diff --git a/arch/arm/mach-shmobile/smp-r8a7790.c b/arch/arm/mach-shmobile/smp-r8a7790.c deleted file mode 100644 index 28f26d5362d8..000000000000 --- a/arch/arm/mach-shmobile/smp-r8a7790.c +++ /dev/null @@ -1,71 +0,0 @@ -/* - * SMP support for r8a7790 - * - * Copyright (C) 2012-2013 Renesas Solutions Corp. - * Copyright (C) 2012 Takashi Yoshii - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ -#include -#include -#include -#include -#include - -#include - -#include "common.h" -#include "platsmp-apmu.h" -#include "rcar-gen2.h" -#include "r8a7790.h" - -static const struct rcar_sysc_ch r8a7790_ca15_scu = { - .chan_offs = 0x180, /* PWRSR5 .. PWRER5 */ - .isr_bit = 12, /* CA15-SCU */ -}; - -static const struct rcar_sysc_ch r8a7790_ca7_scu = { - .chan_offs = 0x100, /* PWRSR3 .. PWRER3 */ - .isr_bit = 21, /* CA7-SCU */ -}; - -static struct rcar_apmu_config r8a7790_apmu_config[] = { - { - .iomem = DEFINE_RES_MEM(0xe6152000, 0x188), - .cpus = { 0, 1, 2, 3 }, - }, - { - .iomem = DEFINE_RES_MEM(0xe6151000, 0x188), - .cpus = { 0x100, 0x0101, 0x102, 0x103 }, - } -}; - -static void __init r8a7790_smp_prepare_cpus(unsigned int max_cpus) -{ - /* let APMU code install data related to shmobile_boot_vector */ - shmobile_smp_apmu_prepare_cpus(max_cpus, - r8a7790_apmu_config, - ARRAY_SIZE(r8a7790_apmu_config)); - - /* turn on power to SCU */ - rcar_gen2_pm_init(); - rcar_sysc_power_up(&r8a7790_ca15_scu); - rcar_sysc_power_up(&r8a7790_ca7_scu); -} - -const struct smp_operations r8a7790_smp_ops __initconst = { - .smp_prepare_cpus = r8a7790_smp_prepare_cpus, - .smp_boot_secondary = shmobile_smp_apmu_boot_secondary, -#ifdef CONFIG_HOTPLUG_CPU - .cpu_can_disable = shmobile_smp_cpu_can_disable, - .cpu_die = shmobile_smp_apmu_cpu_die, - .cpu_kill = shmobile_smp_apmu_cpu_kill, -#endif -}; From 78a9057fcc6341bb468e7ec5ac599f06e6a75547 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 18 May 2018 14:48:51 +0200 Subject: [PATCH 003/112] ARM: shmobile: r8a7790: Use common R-Car Gen2 machine definition Now r8a7790 no longer needs the SMP initialization fallback, it can use the common R-Car Gen2 machine definition, and the r8a7790-specific one can be removed. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/Makefile | 1 - arch/arm/mach-shmobile/setup-r8a7790.c | 36 ------------------------ arch/arm/mach-shmobile/setup-rcar-gen2.c | 3 +- 3 files changed, 2 insertions(+), 38 deletions(-) delete mode 100644 arch/arm/mach-shmobile/setup-r8a7790.c diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile index 9133949b5df2..13aca853a162 100644 --- a/arch/arm/mach-shmobile/Makefile +++ b/arch/arm/mach-shmobile/Makefile @@ -12,7 +12,6 @@ obj-$(CONFIG_ARCH_R8A73A4) += setup-r8a73a4.o obj-$(CONFIG_ARCH_R8A7740) += setup-r8a7740.o obj-$(CONFIG_ARCH_R8A7778) += setup-r8a7778.o obj-$(CONFIG_ARCH_R8A7779) += setup-r8a7779.o pm-r8a7779.o -obj-$(CONFIG_ARCH_R8A7790) += setup-r8a7790.o obj-$(CONFIG_ARCH_R8A7791) += setup-r8a7791.o obj-$(CONFIG_ARCH_EMEV2) += setup-emev2.o obj-$(CONFIG_ARCH_R7S72100) += setup-r7s72100.o diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c b/arch/arm/mach-shmobile/setup-r8a7790.c deleted file mode 100644 index fd2435b39529..000000000000 --- a/arch/arm/mach-shmobile/setup-r8a7790.c +++ /dev/null @@ -1,36 +0,0 @@ -/* - * r8a7790 processor support - * - * Copyright (C) 2013 Renesas Solutions Corp. - * Copyright (C) 2013 Magnus Damm - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include - -#include - -#include "common.h" -#include "rcar-gen2.h" - -static const char * const r8a7790_boards_compat_dt[] __initconst = { - "renesas,r8a7790", - NULL, -}; - -DT_MACHINE_START(R8A7790_DT, "Generic R8A7790 (Flattened Device Tree)") - .smp_init = smp_init_ops(shmobile_smp_init_fallback_ops), - .init_early = shmobile_init_delay, - .init_time = rcar_gen2_timer_init, - .init_late = shmobile_init_late, - .reserve = rcar_gen2_reserve, - .dt_compat = r8a7790_boards_compat_dt, -MACHINE_END diff --git a/arch/arm/mach-shmobile/setup-rcar-gen2.c b/arch/arm/mach-shmobile/setup-rcar-gen2.c index 88fdc1801d90..e01f21d17167 100644 --- a/arch/arm/mach-shmobile/setup-rcar-gen2.c +++ b/arch/arm/mach-shmobile/setup-rcar-gen2.c @@ -186,8 +186,9 @@ void __init rcar_gen2_reserve(void) } static const char * const rcar_gen2_boards_compat_dt[] __initconst = { + "renesas,r8a7790", /* - * R8A7790 and R8A7791 can't be handled here as long as they need SMP + * R8A7791 can't be handled here as long as it needs SMP * initialization fallback. */ "renesas,r8a7792", From 488aa3c045a7de12a39babec5196260b9f0e8881 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 18 May 2018 14:48:52 +0200 Subject: [PATCH 004/112] ARM: shmobile: r8a7791: Remove legacy SMP fallback code As of commit f89a51700d7ae0ef ("ARM: shmobile: r8a7791: Prioritize DT APMU support") in v4.8, non-DT enablement of SMP was left as a fallback for backwards compatibility with old DTBs. The time has come to drop backwards compatibility, hence remove the fallback code. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/Makefile | 1 - arch/arm/mach-shmobile/r8a7791.h | 7 ---- arch/arm/mach-shmobile/setup-r8a7791.c | 2 - arch/arm/mach-shmobile/smp-r8a7791.c | 53 -------------------------- 4 files changed, 63 deletions(-) delete mode 100644 arch/arm/mach-shmobile/r8a7791.h delete mode 100644 arch/arm/mach-shmobile/smp-r8a7791.c diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile index 13aca853a162..38086d0d2f54 100644 --- a/arch/arm/mach-shmobile/Makefile +++ b/arch/arm/mach-shmobile/Makefile @@ -31,7 +31,6 @@ obj-$(CONFIG_ARCH_R8A7793) += regulator-quirk-rcar-gen2.o smp-y := $(cpu-y) smp-$(CONFIG_ARCH_SH73A0) += smp-sh73a0.o headsmp-scu.o platsmp-scu.o smp-$(CONFIG_ARCH_R8A7779) += smp-r8a7779.o headsmp-scu.o platsmp-scu.o -smp-$(CONFIG_ARCH_R8A7791) += smp-r8a7791.o smp-$(CONFIG_ARCH_EMEV2) += smp-emev2.o headsmp-scu.o platsmp-scu.o # PM objects diff --git a/arch/arm/mach-shmobile/r8a7791.h b/arch/arm/mach-shmobile/r8a7791.h deleted file mode 100644 index 8c794aace938..000000000000 --- a/arch/arm/mach-shmobile/r8a7791.h +++ /dev/null @@ -1,7 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef __ASM_R8A7791_H__ -#define __ASM_R8A7791_H__ - -extern const struct smp_operations r8a7791_smp_ops; - -#endif /* __ASM_R8A7791_H__ */ diff --git a/arch/arm/mach-shmobile/setup-r8a7791.c b/arch/arm/mach-shmobile/setup-r8a7791.c index 26e2d181a190..2de32fde1af7 100644 --- a/arch/arm/mach-shmobile/setup-r8a7791.c +++ b/arch/arm/mach-shmobile/setup-r8a7791.c @@ -20,7 +20,6 @@ #include #include "common.h" -#include "r8a7791.h" #include "rcar-gen2.h" static const char *const r8a7791_boards_compat_dt[] __initconst = { @@ -30,7 +29,6 @@ static const char *const r8a7791_boards_compat_dt[] __initconst = { DT_MACHINE_START(R8A7791_DT, "Generic R8A7791 (Flattened Device Tree)") .smp_init = smp_init_ops(shmobile_smp_init_fallback_ops), - .smp = smp_ops(r8a7791_smp_ops), .init_early = shmobile_init_delay, .init_time = rcar_gen2_timer_init, .init_late = shmobile_init_late, diff --git a/arch/arm/mach-shmobile/smp-r8a7791.c b/arch/arm/mach-shmobile/smp-r8a7791.c deleted file mode 100644 index 2948c22cfc53..000000000000 --- a/arch/arm/mach-shmobile/smp-r8a7791.c +++ /dev/null @@ -1,53 +0,0 @@ -/* - * SMP support for r8a7791 - * - * Copyright (C) 2013 Renesas Solutions Corp. - * Copyright (C) 2013 Magnus Damm - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ -#include -#include -#include -#include - -#include - -#include "common.h" -#include "platsmp-apmu.h" -#include "r8a7791.h" -#include "rcar-gen2.h" - -static struct rcar_apmu_config r8a7791_apmu_config[] = { - { - .iomem = DEFINE_RES_MEM(0xe6152000, 0x188), - .cpus = { 0, 1 }, - } -}; - -static void __init r8a7791_smp_prepare_cpus(unsigned int max_cpus) -{ - /* let APMU code install data related to shmobile_boot_vector */ - shmobile_smp_apmu_prepare_cpus(max_cpus, - r8a7791_apmu_config, - ARRAY_SIZE(r8a7791_apmu_config)); - - rcar_gen2_pm_init(); -} - -const struct smp_operations r8a7791_smp_ops __initconst = { - .smp_prepare_cpus = r8a7791_smp_prepare_cpus, - .smp_boot_secondary = shmobile_smp_apmu_boot_secondary, -#ifdef CONFIG_HOTPLUG_CPU - .cpu_can_disable = shmobile_smp_cpu_can_disable, - .cpu_die = shmobile_smp_apmu_cpu_die, - .cpu_kill = shmobile_smp_apmu_cpu_kill, -#endif -}; From 1e90fea35b80cfe17718ceecf8898eb4b8188b45 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 18 May 2018 14:48:53 +0200 Subject: [PATCH 005/112] ARM: shmobile: r8a7791: Use common R-Car Gen2 machine definition Now r8a7791 no longer needs the SMP initialization fallback, it can use the common R-Car Gen2 machine definition, and the r8a7791-specific one can be removed. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/Makefile | 1 - arch/arm/mach-shmobile/setup-r8a7791.c | 37 ------------------------ arch/arm/mach-shmobile/setup-rcar-gen2.c | 5 +--- 3 files changed, 1 insertion(+), 42 deletions(-) delete mode 100644 arch/arm/mach-shmobile/setup-r8a7791.c diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile index 38086d0d2f54..2b8d3896e1eb 100644 --- a/arch/arm/mach-shmobile/Makefile +++ b/arch/arm/mach-shmobile/Makefile @@ -12,7 +12,6 @@ obj-$(CONFIG_ARCH_R8A73A4) += setup-r8a73a4.o obj-$(CONFIG_ARCH_R8A7740) += setup-r8a7740.o obj-$(CONFIG_ARCH_R8A7778) += setup-r8a7778.o obj-$(CONFIG_ARCH_R8A7779) += setup-r8a7779.o pm-r8a7779.o -obj-$(CONFIG_ARCH_R8A7791) += setup-r8a7791.o obj-$(CONFIG_ARCH_EMEV2) += setup-emev2.o obj-$(CONFIG_ARCH_R7S72100) += setup-r7s72100.o diff --git a/arch/arm/mach-shmobile/setup-r8a7791.c b/arch/arm/mach-shmobile/setup-r8a7791.c deleted file mode 100644 index 2de32fde1af7..000000000000 --- a/arch/arm/mach-shmobile/setup-r8a7791.c +++ /dev/null @@ -1,37 +0,0 @@ -/* - * r8a7791 processor support - * - * Copyright (C) 2013 Renesas Electronics Corporation - * Copyright (C) 2013 Renesas Solutions Corp. - * Copyright (C) 2013 Magnus Damm - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include - -#include - -#include "common.h" -#include "rcar-gen2.h" - -static const char *const r8a7791_boards_compat_dt[] __initconst = { - "renesas,r8a7791", - NULL, -}; - -DT_MACHINE_START(R8A7791_DT, "Generic R8A7791 (Flattened Device Tree)") - .smp_init = smp_init_ops(shmobile_smp_init_fallback_ops), - .init_early = shmobile_init_delay, - .init_time = rcar_gen2_timer_init, - .init_late = shmobile_init_late, - .reserve = rcar_gen2_reserve, - .dt_compat = r8a7791_boards_compat_dt, -MACHINE_END diff --git a/arch/arm/mach-shmobile/setup-rcar-gen2.c b/arch/arm/mach-shmobile/setup-rcar-gen2.c index e01f21d17167..4c605129cd37 100644 --- a/arch/arm/mach-shmobile/setup-rcar-gen2.c +++ b/arch/arm/mach-shmobile/setup-rcar-gen2.c @@ -187,10 +187,7 @@ void __init rcar_gen2_reserve(void) static const char * const rcar_gen2_boards_compat_dt[] __initconst = { "renesas,r8a7790", - /* - * R8A7791 can't be handled here as long as it needs SMP - * initialization fallback. - */ + "renesas,r8a7791", "renesas,r8a7792", "renesas,r8a7793", "renesas,r8a7794", From aa03319f28402fa7613d313b411490952b3f9bd4 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 18 May 2018 14:48:54 +0200 Subject: [PATCH 006/112] ARM: shmobile: Remove unused shmobile_smp_init_fallback_ops() shmobile_smp_init_fallback_ops() became unused after removing SoC-specific machine definitions that provided legacy SMP initialization fallbacks. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/common.h | 1 - arch/arm/mach-shmobile/platsmp.c | 9 --------- 2 files changed, 10 deletions(-) diff --git a/arch/arm/mach-shmobile/common.h b/arch/arm/mach-shmobile/common.h index 2109f123bdfb..3ac4b36b5c2b 100644 --- a/arch/arm/mach-shmobile/common.h +++ b/arch/arm/mach-shmobile/common.h @@ -15,7 +15,6 @@ extern void shmobile_smp_sleep(void); extern void shmobile_smp_hook(unsigned int cpu, unsigned long fn, unsigned long arg); extern bool shmobile_smp_cpu_can_disable(unsigned int cpu); -extern bool shmobile_smp_init_fallback_ops(void); extern void shmobile_boot_apmu(void); extern void shmobile_boot_scu(void); extern void shmobile_smp_scu_prepare_cpus(phys_addr_t scu_base_phys, diff --git a/arch/arm/mach-shmobile/platsmp.c b/arch/arm/mach-shmobile/platsmp.c index 02e21bceb085..b23378f3d7e1 100644 --- a/arch/arm/mach-shmobile/platsmp.c +++ b/arch/arm/mach-shmobile/platsmp.c @@ -36,12 +36,3 @@ bool shmobile_smp_cpu_can_disable(unsigned int cpu) return true; /* Hotplug of any CPU is supported */ } #endif - -bool __init shmobile_smp_init_fallback_ops(void) -{ - /* fallback on PSCI/smp_ops if no other DT based method is detected */ - if (!IS_ENABLED(CONFIG_SMP)) - return false; - - return platform_can_secondary_boot() ? true : false; -} From fa6e9cb2aca1cdca1b85e5b19f9cda8aac78752b Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Wed, 30 May 2018 17:15:26 +0200 Subject: [PATCH 007/112] ARM: shmobile: apmu: Move cpu_leave_lowpower() to SUSPEND section cpu_leave_lowpower() is used for suspend only, not for CPU hotplug. Hence move it from the HOTPLUG_CPU || SUSPEND section to the SUSPEND section. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/platsmp-apmu.c | 30 +++++++++++++-------------- 1 file changed, 15 insertions(+), 15 deletions(-) diff --git a/arch/arm/mach-shmobile/platsmp-apmu.c b/arch/arm/mach-shmobile/platsmp-apmu.c index ba732effc90b..778b6b618ce7 100644 --- a/arch/arm/mach-shmobile/platsmp-apmu.c +++ b/arch/arm/mach-shmobile/platsmp-apmu.c @@ -270,21 +270,6 @@ static void shmobile_smp_apmu_cpu_shutdown(unsigned int cpu) /* Do ARM specific CPU shutdown */ cpu_enter_lowpower_a15(); } - -static inline void cpu_leave_lowpower(void) -{ - unsigned int v; - - asm volatile("mrc p15, 0, %0, c1, c0, 0\n" - " orr %0, %0, %1\n" - " mcr p15, 0, %0, c1, c0, 0\n" - " mrc p15, 0, %0, c1, c0, 1\n" - " orr %0, %0, %2\n" - " mcr p15, 0, %0, c1, c0, 1\n" - : "=&r" (v) - : "Ir" (CR_C), "Ir" (0x40) - : "cc"); -} #endif #if defined(CONFIG_HOTPLUG_CPU) @@ -315,6 +300,21 @@ static int shmobile_smp_apmu_do_suspend(unsigned long cpu) return 1; } +static inline void cpu_leave_lowpower(void) +{ + unsigned int v; + + asm volatile("mrc p15, 0, %0, c1, c0, 0\n" + " orr %0, %0, %1\n" + " mcr p15, 0, %0, c1, c0, 0\n" + " mrc p15, 0, %0, c1, c0, 1\n" + " orr %0, %0, %2\n" + " mcr p15, 0, %0, c1, c0, 1\n" + : "=&r" (v) + : "Ir" (CR_C), "Ir" (0x40) + : "cc"); +} + static int shmobile_smp_apmu_enter_suspend(suspend_state_t state) { cpu_suspend(smp_processor_id(), shmobile_smp_apmu_do_suspend); From 36a90c0553dd9c4d54a65f5387638ee55e4cf93c Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Wed, 30 May 2018 17:15:27 +0200 Subject: [PATCH 008/112] ARM: shmobile: apmu: Remove obsolete shmobile_smp_apmu_prepare_cpus() After the removal of the legacy SMP fallbacks, there are no more users left of shmobile_smp_apmu_prepare_cpus(). Remove it, together with the legacy SMP config parser. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/platsmp-apmu.c | 40 --------------------------- arch/arm/mach-shmobile/platsmp-apmu.h | 8 ------ 2 files changed, 48 deletions(-) diff --git a/arch/arm/mach-shmobile/platsmp-apmu.c b/arch/arm/mach-shmobile/platsmp-apmu.c index 778b6b618ce7..42c9405e556b 100644 --- a/arch/arm/mach-shmobile/platsmp-apmu.c +++ b/arch/arm/mach-shmobile/platsmp-apmu.c @@ -106,38 +106,6 @@ static void apmu_init_cpu(struct resource *res, int cpu, int bit) writel(x, apmu_cpus[cpu].iomem + DBGRCR_OFFS); } -static void apmu_parse_cfg(void (*fn)(struct resource *res, int cpu, int bit), - struct rcar_apmu_config *apmu_config, int num) -{ - int id; - int k; - int bit, index; - bool is_allowed; - - for (k = 0; k < num; k++) { - /* only enable the cluster that includes the boot CPU */ - is_allowed = false; - for (bit = 0; bit < ARRAY_SIZE(apmu_config[k].cpus); bit++) { - id = apmu_config[k].cpus[bit]; - if (id >= 0) { - if (id == cpu_logical_map(0)) - is_allowed = true; - } - } - if (!is_allowed) - continue; - - for (bit = 0; bit < ARRAY_SIZE(apmu_config[k].cpus); bit++) { - id = apmu_config[k].cpus[bit]; - if (id >= 0) { - index = get_logical_index(id); - if (index >= 0) - fn(&apmu_config[k].iomem, index, bit); - } - } - } -} - static const struct of_device_id apmu_ids[] = { { .compatible = "renesas,apmu" }, { /*sentinel*/ } @@ -194,14 +162,6 @@ static void __init shmobile_smp_apmu_setup_boot(void) shmobile_boot_fn_gen2 = shmobile_boot_fn; } -void __init shmobile_smp_apmu_prepare_cpus(unsigned int max_cpus, - struct rcar_apmu_config *apmu_config, - int num) -{ - shmobile_smp_apmu_setup_boot(); - apmu_parse_cfg(apmu_init_cpu, apmu_config, num); -} - int shmobile_smp_apmu_boot_secondary(unsigned int cpu, struct task_struct *idle) { /* For this particular CPU register boot vector */ diff --git a/arch/arm/mach-shmobile/platsmp-apmu.h b/arch/arm/mach-shmobile/platsmp-apmu.h index 76512c9a2545..70424572b9da 100644 --- a/arch/arm/mach-shmobile/platsmp-apmu.h +++ b/arch/arm/mach-shmobile/platsmp-apmu.h @@ -16,14 +16,6 @@ #ifndef PLATSMP_APMU_H #define PLATSMP_APMU_H -struct rcar_apmu_config { - struct resource iomem; - int cpus[4]; -}; - -extern void shmobile_smp_apmu_prepare_cpus(unsigned int max_cpus, - struct rcar_apmu_config *apmu_config, - int num); extern int shmobile_smp_apmu_boot_secondary(unsigned int cpu, struct task_struct *idle); extern void shmobile_smp_apmu_cpu_die(unsigned int cpu); From 3bf6d77388273c2d99756040b820dd71959e4587 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Wed, 30 May 2018 17:15:28 +0200 Subject: [PATCH 009/112] ARM: shmobile: apmu: Remove platsmp-apmu.h After the removal of the legacy SMP fallbacks, platsmp-apmu.h is no longer needed outside platsmp-apmu.c. Hence remove platsmp-apmu.h, and make the functions exported previously static. As the header file also provided forward declarations, the code in platsmp-apmu.c must be reshuffled. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/platsmp-apmu.c | 200 +++++++++++++------------- arch/arm/mach-shmobile/platsmp-apmu.h | 24 ---- 2 files changed, 100 insertions(+), 124 deletions(-) delete mode 100644 arch/arm/mach-shmobile/platsmp-apmu.h diff --git a/arch/arm/mach-shmobile/platsmp-apmu.c b/arch/arm/mach-shmobile/platsmp-apmu.c index 42c9405e556b..9e1e85cf1899 100644 --- a/arch/arm/mach-shmobile/platsmp-apmu.c +++ b/arch/arm/mach-shmobile/platsmp-apmu.c @@ -23,7 +23,6 @@ #include #include #include "common.h" -#include "platsmp-apmu.h" #include "rcar-gen2.h" static struct { @@ -87,6 +86,104 @@ static int __maybe_unused apmu_wrap(int cpu, int (*fn)(void __iomem *p, int cpu) return p ? fn(p, apmu_cpus[cpu].bit) : -EINVAL; } +#if defined(CONFIG_HOTPLUG_CPU) || defined(CONFIG_SUSPEND) +/* nicked from arch/arm/mach-exynos/hotplug.c */ +static inline void cpu_enter_lowpower_a15(void) +{ + unsigned int v; + + asm volatile( + " mrc p15, 0, %0, c1, c0, 0\n" + " bic %0, %0, %1\n" + " mcr p15, 0, %0, c1, c0, 0\n" + : "=&r" (v) + : "Ir" (CR_C) + : "cc"); + + flush_cache_louis(); + + asm volatile( + /* + * Turn off coherency + */ + " mrc p15, 0, %0, c1, c0, 1\n" + " bic %0, %0, %1\n" + " mcr p15, 0, %0, c1, c0, 1\n" + : "=&r" (v) + : "Ir" (0x40) + : "cc"); + + isb(); + dsb(); +} + +static void shmobile_smp_apmu_cpu_shutdown(unsigned int cpu) +{ + + /* Select next sleep mode using the APMU */ + apmu_wrap(cpu, apmu_power_off); + + /* Do ARM specific CPU shutdown */ + cpu_enter_lowpower_a15(); +} +#endif + +#if defined(CONFIG_HOTPLUG_CPU) +static void shmobile_smp_apmu_cpu_die(unsigned int cpu) +{ + /* For this particular CPU deregister boot vector */ + shmobile_smp_hook(cpu, 0, 0); + + /* Shutdown CPU core */ + shmobile_smp_apmu_cpu_shutdown(cpu); + + /* jump to shared mach-shmobile sleep / reset code */ + shmobile_smp_sleep(); +} + +static int shmobile_smp_apmu_cpu_kill(unsigned int cpu) +{ + return apmu_wrap(cpu, apmu_power_off_poll); +} +#endif + +#if defined(CONFIG_SUSPEND) +static int shmobile_smp_apmu_do_suspend(unsigned long cpu) +{ + shmobile_smp_hook(cpu, __pa_symbol(cpu_resume), 0); + shmobile_smp_apmu_cpu_shutdown(cpu); + cpu_do_idle(); /* WFI selects Core Standby */ + return 1; +} + +static inline void cpu_leave_lowpower(void) +{ + unsigned int v; + + asm volatile("mrc p15, 0, %0, c1, c0, 0\n" + " orr %0, %0, %1\n" + " mcr p15, 0, %0, c1, c0, 0\n" + " mrc p15, 0, %0, c1, c0, 1\n" + " orr %0, %0, %2\n" + " mcr p15, 0, %0, c1, c0, 1\n" + : "=&r" (v) + : "Ir" (CR_C), "Ir" (0x40) + : "cc"); +} + +static int shmobile_smp_apmu_enter_suspend(suspend_state_t state) +{ + cpu_suspend(smp_processor_id(), shmobile_smp_apmu_do_suspend); + cpu_leave_lowpower(); + return 0; +} + +void __init shmobile_smp_apmu_suspend_init(void) +{ + shmobile_suspend_ops.enter = shmobile_smp_apmu_enter_suspend; +} +#endif + #ifdef CONFIG_SMP static void apmu_init_cpu(struct resource *res, int cpu, int bit) { @@ -162,7 +259,8 @@ static void __init shmobile_smp_apmu_setup_boot(void) shmobile_boot_fn_gen2 = shmobile_boot_fn; } -int shmobile_smp_apmu_boot_secondary(unsigned int cpu, struct task_struct *idle) +static int shmobile_smp_apmu_boot_secondary(unsigned int cpu, + struct task_struct *idle) { /* For this particular CPU register boot vector */ shmobile_smp_hook(cpu, __pa_symbol(shmobile_boot_apmu), 0); @@ -189,101 +287,3 @@ static struct smp_operations apmu_smp_ops __initdata = { CPU_METHOD_OF_DECLARE(shmobile_smp_apmu, "renesas,apmu", &apmu_smp_ops); #endif /* CONFIG_SMP */ - -#if defined(CONFIG_HOTPLUG_CPU) || defined(CONFIG_SUSPEND) -/* nicked from arch/arm/mach-exynos/hotplug.c */ -static inline void cpu_enter_lowpower_a15(void) -{ - unsigned int v; - - asm volatile( - " mrc p15, 0, %0, c1, c0, 0\n" - " bic %0, %0, %1\n" - " mcr p15, 0, %0, c1, c0, 0\n" - : "=&r" (v) - : "Ir" (CR_C) - : "cc"); - - flush_cache_louis(); - - asm volatile( - /* - * Turn off coherency - */ - " mrc p15, 0, %0, c1, c0, 1\n" - " bic %0, %0, %1\n" - " mcr p15, 0, %0, c1, c0, 1\n" - : "=&r" (v) - : "Ir" (0x40) - : "cc"); - - isb(); - dsb(); -} - -static void shmobile_smp_apmu_cpu_shutdown(unsigned int cpu) -{ - - /* Select next sleep mode using the APMU */ - apmu_wrap(cpu, apmu_power_off); - - /* Do ARM specific CPU shutdown */ - cpu_enter_lowpower_a15(); -} -#endif - -#if defined(CONFIG_HOTPLUG_CPU) -void shmobile_smp_apmu_cpu_die(unsigned int cpu) -{ - /* For this particular CPU deregister boot vector */ - shmobile_smp_hook(cpu, 0, 0); - - /* Shutdown CPU core */ - shmobile_smp_apmu_cpu_shutdown(cpu); - - /* jump to shared mach-shmobile sleep / reset code */ - shmobile_smp_sleep(); -} - -int shmobile_smp_apmu_cpu_kill(unsigned int cpu) -{ - return apmu_wrap(cpu, apmu_power_off_poll); -} -#endif - -#if defined(CONFIG_SUSPEND) -static int shmobile_smp_apmu_do_suspend(unsigned long cpu) -{ - shmobile_smp_hook(cpu, __pa_symbol(cpu_resume), 0); - shmobile_smp_apmu_cpu_shutdown(cpu); - cpu_do_idle(); /* WFI selects Core Standby */ - return 1; -} - -static inline void cpu_leave_lowpower(void) -{ - unsigned int v; - - asm volatile("mrc p15, 0, %0, c1, c0, 0\n" - " orr %0, %0, %1\n" - " mcr p15, 0, %0, c1, c0, 0\n" - " mrc p15, 0, %0, c1, c0, 1\n" - " orr %0, %0, %2\n" - " mcr p15, 0, %0, c1, c0, 1\n" - : "=&r" (v) - : "Ir" (CR_C), "Ir" (0x40) - : "cc"); -} - -static int shmobile_smp_apmu_enter_suspend(suspend_state_t state) -{ - cpu_suspend(smp_processor_id(), shmobile_smp_apmu_do_suspend); - cpu_leave_lowpower(); - return 0; -} - -void __init shmobile_smp_apmu_suspend_init(void) -{ - shmobile_suspend_ops.enter = shmobile_smp_apmu_enter_suspend; -} -#endif diff --git a/arch/arm/mach-shmobile/platsmp-apmu.h b/arch/arm/mach-shmobile/platsmp-apmu.h deleted file mode 100644 index 70424572b9da..000000000000 --- a/arch/arm/mach-shmobile/platsmp-apmu.h +++ /dev/null @@ -1,24 +0,0 @@ -/* - * rmobile apmu definition - * - * Copyright (C) 2014 Renesas Electronics Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef PLATSMP_APMU_H -#define PLATSMP_APMU_H - -extern int shmobile_smp_apmu_boot_secondary(unsigned int cpu, - struct task_struct *idle); -extern void shmobile_smp_apmu_cpu_die(unsigned int cpu); -extern int shmobile_smp_apmu_cpu_kill(unsigned int cpu); - -#endif /* PLATSMP_APMU_H */ From 319b15df66f931544dace69eb6465fc0a6e05797 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Wed, 30 May 2018 17:25:11 +0200 Subject: [PATCH 010/112] ARM: shmobile: rcar-gen2: Remove explicit SYSC config and init If the R-Car system controller is described in DT, the rcar-sysc driver configures SYSCIER and SYSCIMR based on the SoC-specific power area definitions in r8a779*-sysc. The platform code still passed this information to the rcar-sysc driver, for compatibility with old R-Car H2 and M2-W DTBs predating commit 8574de861978d518 ("ARM: dts: r8a7791: Add SYSC PM Domains") in v4.7. The time has come to drop backwards compatibility, and delegate everything to the DT enabled rcar-sysc driver. After the removal of the legacy SMP fallbacks, which powered up the SCUs explicitly, there is no longer a need to force an early initialization of the rcar-sysc driver. It will be initialized in time for secondary CPU bringup by its early_initcall(). Hence all explicit SYSC configuration and initialization can be removed from the R-Car Gen2 platform code. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/pm-rcar-gen2.c | 25 ------------------------- 1 file changed, 25 deletions(-) diff --git a/arch/arm/mach-shmobile/pm-rcar-gen2.c b/arch/arm/mach-shmobile/pm-rcar-gen2.c index 5a798b406af0..345af3ebcc3a 100644 --- a/arch/arm/mach-shmobile/pm-rcar-gen2.c +++ b/arch/arm/mach-shmobile/pm-rcar-gen2.c @@ -15,7 +15,6 @@ #include #include #include -#include #include #include #include "common.h" @@ -46,23 +45,6 @@ static inline u32 phys_to_sbar(phys_addr_t addr) return (addr >> 8) & 0xfffffc00; } -/* SYSC */ -#define SYSCIER 0x0c -#define SYSCIMR 0x10 - -#if defined(CONFIG_SMP) - -static void __init rcar_gen2_sysc_init(u32 syscier) -{ - rcar_sysc_init(0xe6180000, syscier); -} - -#else /* CONFIG_SMP */ - -static inline void rcar_gen2_sysc_init(u32 syscier) {} - -#endif /* CONFIG_SMP */ - void __init rcar_gen2_pm_init(void) { void __iomem *p; @@ -72,7 +54,6 @@ void __init rcar_gen2_pm_init(void) bool has_a7 = false; bool has_a15 = false; struct resource res; - u32 syscier = 0; int error; if (once++) @@ -89,11 +70,6 @@ void __init rcar_gen2_pm_init(void) has_a7 = true; } - if (of_machine_is_compatible("renesas,r8a7790")) - syscier = 0x013111ef; - else if (of_machine_is_compatible("renesas,r8a7791")) - syscier = 0x00111003; - np = of_find_compatible_node(NULL, NULL, "renesas,smp-sram"); if (!np) { /* No smp-sram in DT, fall back to hardcoded address */ @@ -155,6 +131,5 @@ map: } iounmap(p); - rcar_gen2_sysc_init(syscier); shmobile_smp_apmu_suspend_init(); } From 62f55ce683e3675aa83cc3e912f070aef1baeff8 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Wed, 30 May 2018 17:25:12 +0200 Subject: [PATCH 011/112] ARM: shmobile: r8a7779: Stop powering down secondary CPUs during early boot At .smp_prepare_cpus() time, CPUs 1-3 are still powered down: - The bootloader doesn't enable CPUs 1-3, - Non-boot CPUs are disabled by kexec before starting the new kernel. Hence there is no need to try to power them down again, as it will fail silently with -EIO anyway. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/smp-r8a7779.c | 5 ----- 1 file changed, 5 deletions(-) diff --git a/arch/arm/mach-shmobile/smp-r8a7779.c b/arch/arm/mach-shmobile/smp-r8a7779.c index c6951ee24588..ff1e6fc0b861 100644 --- a/arch/arm/mach-shmobile/smp-r8a7779.c +++ b/arch/arm/mach-shmobile/smp-r8a7779.c @@ -97,11 +97,6 @@ static void __init r8a7779_smp_prepare_cpus(unsigned int max_cpus) shmobile_smp_scu_prepare_cpus(R8A7779_SCU_BASE, max_cpus); r8a7779_pm_init(); - - /* power off secondary CPUs */ - r8a7779_platform_cpu_kill(1); - r8a7779_platform_cpu_kill(2); - r8a7779_platform_cpu_kill(3); } #ifdef CONFIG_HOTPLUG_CPU From f2b1d2f94af887c91bb8a0cfb495e546331bc5ed Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Wed, 30 May 2018 17:25:13 +0200 Subject: [PATCH 012/112] soc: renesas: rcar-sysc: Provide helpers to power up/down CPUs Provide helpers to control CPU power areas from platform code, taking just a CPU index. This will avoid having to pass full CPU power area parameter blocks, and thus duplicating information already provided by SoC-specific SYSC drivers. This will be used on R-Car H1 only. Later R-Car generations rely on APMU/RST for CPU power area control. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- drivers/soc/renesas/rcar-sysc.c | 40 +++++++++++++++++++++++++++ include/linux/soc/renesas/rcar-sysc.h | 2 ++ 2 files changed, 42 insertions(+) diff --git a/drivers/soc/renesas/rcar-sysc.c b/drivers/soc/renesas/rcar-sysc.c index 95120acc4d80..4ad6dcd19420 100644 --- a/drivers/soc/renesas/rcar-sysc.c +++ b/drivers/soc/renesas/rcar-sysc.c @@ -310,6 +310,8 @@ struct rcar_pm_domains { struct generic_pm_domain *domains[RCAR_PD_ALWAYS_ON + 1]; }; +static struct genpd_onecell_data *rcar_sysc_onecell_data; + static int __init rcar_sysc_pd_init(void) { const struct rcar_sysc_info *info; @@ -356,6 +358,7 @@ static int __init rcar_sysc_pd_init(void) domains->onecell_data.domains = domains->domains; domains->onecell_data.num_domains = ARRAY_SIZE(domains->domains); + rcar_sysc_onecell_data = &domains->onecell_data; for (i = 0, syscier = 0; i < info->num_areas; i++) syscier |= BIT(info->areas[i].isr_bit); @@ -449,3 +452,40 @@ void __init rcar_sysc_init(phys_addr_t base, u32 syscier) pr_debug("%s: syscier = 0x%08x\n", __func__, syscier); iowrite32(syscier, rcar_sysc_base + SYSCIER); } + +#ifdef CONFIG_ARCH_R8A7779 +static int rcar_sysc_power_cpu(unsigned int idx, bool on) +{ + struct generic_pm_domain *genpd; + struct rcar_sysc_pd *pd; + unsigned int i; + + if (!rcar_sysc_onecell_data) + return -ENODEV; + + for (i = 0; i < rcar_sysc_onecell_data->num_domains; i++) { + genpd = rcar_sysc_onecell_data->domains[i]; + if (!genpd) + continue; + + pd = to_rcar_pd(genpd); + if (!(pd->flags & PD_CPU) || pd->ch.chan_bit != idx) + continue; + + return on ? rcar_sysc_power_up(&pd->ch) + : rcar_sysc_power_down(&pd->ch); + } + + return -ENOENT; +} + +int rcar_sysc_power_down_cpu(unsigned int cpu) +{ + return rcar_sysc_power_cpu(cpu, false); +} + +int rcar_sysc_power_up_cpu(unsigned int cpu) +{ + return rcar_sysc_power_cpu(cpu, true); +} +#endif /* CONFIG_ARCH_R8A7779 */ diff --git a/include/linux/soc/renesas/rcar-sysc.h b/include/linux/soc/renesas/rcar-sysc.h index 8a6086d2e9c3..9020da2111fd 100644 --- a/include/linux/soc/renesas/rcar-sysc.h +++ b/include/linux/soc/renesas/rcar-sysc.h @@ -13,5 +13,7 @@ struct rcar_sysc_ch { int rcar_sysc_power_down(const struct rcar_sysc_ch *sysc_ch); int rcar_sysc_power_up(const struct rcar_sysc_ch *sysc_ch); void rcar_sysc_init(phys_addr_t base, u32 syscier); +int rcar_sysc_power_down_cpu(unsigned int cpu); +int rcar_sysc_power_up_cpu(unsigned int cpu); #endif /* __LINUX_SOC_RENESAS_RCAR_SYSC_H__ */ From 9d65c891587ea9d0936551e432f34485c16bb71c Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Wed, 30 May 2018 17:25:14 +0200 Subject: [PATCH 013/112] ARM: shmobile: r8a7779: Use rcar_sysc_power_{down,up}_cpu() The r8a7779 SMP code calls rcar_sysc_power_{down,up}() to control power to the SYSC power areas containing CPUs. This requires passing full CPU power area parameter blocks. Migrate the code to call the new rcar_sysc_power_{down,up}_cpu() helpers, which just take a CPU index, and use the SYSC power area definitions from the r8a7779-sysc driver. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/smp-r8a7779.c | 47 ++++------------------------ 1 file changed, 6 insertions(+), 41 deletions(-) diff --git a/arch/arm/mach-shmobile/smp-r8a7779.c b/arch/arm/mach-shmobile/smp-r8a7779.c index ff1e6fc0b861..3036f9100461 100644 --- a/arch/arm/mach-shmobile/smp-r8a7779.c +++ b/arch/arm/mach-shmobile/smp-r8a7779.c @@ -31,59 +31,24 @@ #define AVECR IOMEM(0xfe700040) #define R8A7779_SCU_BASE 0xf0000000 -static const struct rcar_sysc_ch r8a7779_ch_cpu1 = { - .chan_offs = 0x40, /* PWRSR0 .. PWRER0 */ - .chan_bit = 1, /* ARM1 */ - .isr_bit = 1, /* ARM1 */ -}; - -static const struct rcar_sysc_ch r8a7779_ch_cpu2 = { - .chan_offs = 0x40, /* PWRSR0 .. PWRER0 */ - .chan_bit = 2, /* ARM2 */ - .isr_bit = 2, /* ARM2 */ -}; - -static const struct rcar_sysc_ch r8a7779_ch_cpu3 = { - .chan_offs = 0x40, /* PWRSR0 .. PWRER0 */ - .chan_bit = 3, /* ARM3 */ - .isr_bit = 3, /* ARM3 */ -}; - -static const struct rcar_sysc_ch * const r8a7779_ch_cpu[4] = { - [1] = &r8a7779_ch_cpu1, - [2] = &r8a7779_ch_cpu2, - [3] = &r8a7779_ch_cpu3, -}; - static int r8a7779_platform_cpu_kill(unsigned int cpu) { - const struct rcar_sysc_ch *ch = NULL; int ret = -EIO; cpu = cpu_logical_map(cpu); - - if (cpu < ARRAY_SIZE(r8a7779_ch_cpu)) - ch = r8a7779_ch_cpu[cpu]; - - if (ch) - ret = rcar_sysc_power_down(ch); + if (cpu) + ret = rcar_sysc_power_down_cpu(cpu); return ret ? ret : 1; } static int r8a7779_boot_secondary(unsigned int cpu, struct task_struct *idle) { - const struct rcar_sysc_ch *ch = NULL; - unsigned int lcpu = cpu_logical_map(cpu); - int ret; + int ret = -EIO; - if (lcpu < ARRAY_SIZE(r8a7779_ch_cpu)) - ch = r8a7779_ch_cpu[lcpu]; - - if (ch) - ret = rcar_sysc_power_up(ch); - else - ret = -EIO; + cpu = cpu_logical_map(cpu); + if (cpu) + ret = rcar_sysc_power_up_cpu(cpu); return ret; } From 16acd53b1547d3dbe3eabef5e3356674eb957ae4 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Wed, 30 May 2018 17:25:15 +0200 Subject: [PATCH 014/112] ARM: shmobile: r8a7779: Remove explicit SYSC config and init If the R-Car H1 system controller is described in DT, the rcar-sysc driver configures SYSCIER and SYSCIMR based on the SoC-specific power area definitions in r8a7779-sysc. The platform code still passed this information to the rcar-sysc driver, for compatibility with old DTBs predating commit b2df3aa487395a1b ("ARM: dts: r8a7779: Add SYSC PM Domains") in v4.7. The time has come to drop backwards compatibility, and delegate everything to the DT enabled rcar-sysc driver. After stopping powering down secondary CPUs during early boot, there is no longer a need to force an early initialization of the rcar-sysc driver. It will be initialized in time for secondary CPU bringup by its early_initcall(). Hence all explicit SYSC configuration and initialization can be removed from the R-Car H1 platform code. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/Makefile | 2 +- arch/arm/mach-shmobile/pm-r8a7779.c | 41 ---------------------------- arch/arm/mach-shmobile/r8a7779.h | 2 -- arch/arm/mach-shmobile/smp-r8a7779.c | 2 -- 4 files changed, 1 insertion(+), 46 deletions(-) delete mode 100644 arch/arm/mach-shmobile/pm-r8a7779.c diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile index 2b8d3896e1eb..05ba728ed4f6 100644 --- a/arch/arm/mach-shmobile/Makefile +++ b/arch/arm/mach-shmobile/Makefile @@ -11,7 +11,7 @@ obj-$(CONFIG_ARCH_SH73A0) += setup-sh73a0.o obj-$(CONFIG_ARCH_R8A73A4) += setup-r8a73a4.o obj-$(CONFIG_ARCH_R8A7740) += setup-r8a7740.o obj-$(CONFIG_ARCH_R8A7778) += setup-r8a7778.o -obj-$(CONFIG_ARCH_R8A7779) += setup-r8a7779.o pm-r8a7779.o +obj-$(CONFIG_ARCH_R8A7779) += setup-r8a7779.o obj-$(CONFIG_ARCH_EMEV2) += setup-emev2.o obj-$(CONFIG_ARCH_R7S72100) += setup-r7s72100.o diff --git a/arch/arm/mach-shmobile/pm-r8a7779.c b/arch/arm/mach-shmobile/pm-r8a7779.c deleted file mode 100644 index 5c9a93f5e650..000000000000 --- a/arch/arm/mach-shmobile/pm-r8a7779.c +++ /dev/null @@ -1,41 +0,0 @@ -/* - * r8a7779 Power management support - * - * Copyright (C) 2011 Renesas Solutions Corp. - * Copyright (C) 2011 Magnus Damm - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ - -#include - -#include - -#include "r8a7779.h" - -/* SYSC */ -#define SYSCIER 0x0c -#define SYSCIMR 0x10 - -#if defined(CONFIG_PM) || defined(CONFIG_SMP) - -static void __init r8a7779_sysc_init(void) -{ - rcar_sysc_init(0xffd85000, 0x0131000e); -} - -#else /* CONFIG_PM || CONFIG_SMP */ - -static inline void r8a7779_sysc_init(void) {} - -#endif /* CONFIG_PM || CONFIG_SMP */ - -void __init r8a7779_pm_init(void) -{ - static int once; - - if (!once++) - r8a7779_sysc_init(); -} diff --git a/arch/arm/mach-shmobile/r8a7779.h b/arch/arm/mach-shmobile/r8a7779.h index 30668aa6acc3..ca9db8fde2f7 100644 --- a/arch/arm/mach-shmobile/r8a7779.h +++ b/arch/arm/mach-shmobile/r8a7779.h @@ -2,8 +2,6 @@ #ifndef __ASM_R8A7779_H__ #define __ASM_R8A7779_H__ -extern void r8a7779_pm_init(void); - extern const struct smp_operations r8a7779_smp_ops; #endif /* __ASM_R8A7779_H__ */ diff --git a/arch/arm/mach-shmobile/smp-r8a7779.c b/arch/arm/mach-shmobile/smp-r8a7779.c index 3036f9100461..0d3ec5c2b8fc 100644 --- a/arch/arm/mach-shmobile/smp-r8a7779.c +++ b/arch/arm/mach-shmobile/smp-r8a7779.c @@ -60,8 +60,6 @@ static void __init r8a7779_smp_prepare_cpus(unsigned int max_cpus) /* setup r8a7779 specific SCU bits */ shmobile_smp_scu_prepare_cpus(R8A7779_SCU_BASE, max_cpus); - - r8a7779_pm_init(); } #ifdef CONFIG_HOTPLUG_CPU From 7e8a50df26f4e7003d09f7e8d1e57fbbb7ebb750 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Wed, 30 May 2018 17:25:16 +0200 Subject: [PATCH 015/112] soc: renesas: rcar-sysc: Drop legacy handling Now the R-Car platform code no longer supports DTBs lacking a SYSC device node in DT, all legacy handling can be dropped from the R-Car SYSC driver: - Make rcar_sysc_ch private to the driver, - Make rcar_sysc_power_{down,up}() static (they have been replaced by rcar_sysc_power_{down,up}_cpu()), - Remove the legacy wrapper rcar_sysc_init(), and the check for double initialization (only the early_initcall is left). Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- drivers/soc/renesas/rcar-sysc.c | 38 ++++++--------------------- include/linux/soc/renesas/rcar-sysc.h | 11 -------- 2 files changed, 8 insertions(+), 41 deletions(-) diff --git a/drivers/soc/renesas/rcar-sysc.c b/drivers/soc/renesas/rcar-sysc.c index 4ad6dcd19420..41af9c7b912f 100644 --- a/drivers/soc/renesas/rcar-sysc.c +++ b/drivers/soc/renesas/rcar-sysc.c @@ -58,6 +58,12 @@ #define RCAR_PD_ALWAYS_ON 32 /* Always-on power area */ +struct rcar_sysc_ch { + u16 chan_offs; + u8 chan_bit; + u8 isr_bit; +}; + static void __iomem *rcar_sysc_base; static DEFINE_SPINLOCK(rcar_sysc_lock); /* SMP CPUs + I/O devices */ @@ -143,12 +149,12 @@ static int rcar_sysc_power(const struct rcar_sysc_ch *sysc_ch, bool on) return ret; } -int rcar_sysc_power_down(const struct rcar_sysc_ch *sysc_ch) +static int rcar_sysc_power_down(const struct rcar_sysc_ch *sysc_ch) { return rcar_sysc_power(sysc_ch, false); } -int rcar_sysc_power_up(const struct rcar_sysc_ch *sysc_ch) +static int rcar_sysc_power_up(const struct rcar_sysc_ch *sysc_ch) { return rcar_sysc_power(sysc_ch, true); } @@ -323,9 +329,6 @@ static int __init rcar_sysc_pd_init(void) unsigned int i; int error; - if (rcar_sysc_base) - return 0; - np = of_find_matching_node_and_match(NULL, rcar_sysc_matches, &match); if (!np) return -ENODEV; @@ -428,31 +431,6 @@ void __init rcar_sysc_nullify(struct rcar_sysc_area *areas, } } -void __init rcar_sysc_init(phys_addr_t base, u32 syscier) -{ - u32 syscimr; - - if (!rcar_sysc_pd_init()) - return; - - rcar_sysc_base = ioremap_nocache(base, PAGE_SIZE); - - /* - * Mask all interrupt sources to prevent the CPU from receiving them. - * Make sure not to clear reserved bits that were set before. - */ - syscimr = ioread32(rcar_sysc_base + SYSCIMR); - syscimr |= syscier; - pr_debug("%s: syscimr = 0x%08x\n", __func__, syscimr); - iowrite32(syscimr, rcar_sysc_base + SYSCIMR); - - /* - * SYSC needs all interrupt sources enabled to control power. - */ - pr_debug("%s: syscier = 0x%08x\n", __func__, syscier); - iowrite32(syscier, rcar_sysc_base + SYSCIER); -} - #ifdef CONFIG_ARCH_R8A7779 static int rcar_sysc_power_cpu(unsigned int idx, bool on) { diff --git a/include/linux/soc/renesas/rcar-sysc.h b/include/linux/soc/renesas/rcar-sysc.h index 9020da2111fd..00fae6fd234d 100644 --- a/include/linux/soc/renesas/rcar-sysc.h +++ b/include/linux/soc/renesas/rcar-sysc.h @@ -2,17 +2,6 @@ #ifndef __LINUX_SOC_RENESAS_RCAR_SYSC_H__ #define __LINUX_SOC_RENESAS_RCAR_SYSC_H__ -#include - -struct rcar_sysc_ch { - u16 chan_offs; - u8 chan_bit; - u8 isr_bit; -}; - -int rcar_sysc_power_down(const struct rcar_sysc_ch *sysc_ch); -int rcar_sysc_power_up(const struct rcar_sysc_ch *sysc_ch); -void rcar_sysc_init(phys_addr_t base, u32 syscier); int rcar_sysc_power_down_cpu(unsigned int cpu); int rcar_sysc_power_up_cpu(unsigned int cpu); From c44e182e537492baaa37303fc0ee299222fce921 Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Thu, 14 Jun 2018 10:56:06 +0900 Subject: [PATCH 016/112] ARM: shmobile: convert to SPDX identifier Signed-off-by: Wolfram Sang Acked-by: Yoshihiro Shimoda Acked-by: Kuninori Morimoto Signed-off-by: Simon Horman --- arch/arm/include/debug/renesas-scif.S | 5 +---- arch/arm/mach-shmobile/headsmp-apmu.S | 5 +---- arch/arm/mach-shmobile/platsmp-apmu.c | 5 +---- arch/arm/mach-shmobile/regulator-quirk-rcar-gen2.c | 10 +--------- arch/arm/mach-shmobile/setup-emev2.c | 10 +--------- arch/arm/mach-shmobile/setup-r7s72100.c | 10 +--------- arch/arm/mach-shmobile/setup-r8a73a4.c | 10 +--------- arch/arm/mach-shmobile/setup-r8a7740.c | 10 +--------- arch/arm/mach-shmobile/setup-r8a7778.c | 10 +--------- arch/arm/mach-shmobile/setup-r8a7779.c | 10 +--------- arch/arm/mach-shmobile/setup-rcar-gen2.c | 10 +--------- arch/arm/mach-shmobile/setup-sh73a0.c | 10 +--------- arch/arm/mach-shmobile/smp-emev2.c | 10 +--------- arch/arm/mach-shmobile/smp-r8a7779.c | 10 +--------- 14 files changed, 14 insertions(+), 111 deletions(-) diff --git a/arch/arm/include/debug/renesas-scif.S b/arch/arm/include/debug/renesas-scif.S index 97820a8df51a..1c5f795587fc 100644 --- a/arch/arm/include/debug/renesas-scif.S +++ b/arch/arm/include/debug/renesas-scif.S @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /* * Renesas SCIF(A) debugging macro include header * @@ -5,10 +6,6 @@ * * Copyright (C) 2012-2013 Renesas Electronics Corporation * Copyright (C) 1994-1999 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. */ #define SCIF_PHYS CONFIG_DEBUG_UART_PHYS diff --git a/arch/arm/mach-shmobile/headsmp-apmu.S b/arch/arm/mach-shmobile/headsmp-apmu.S index d49ab194766a..a7b4bc7a087b 100644 --- a/arch/arm/mach-shmobile/headsmp-apmu.S +++ b/arch/arm/mach-shmobile/headsmp-apmu.S @@ -1,11 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /* * SMP support for APMU based systems with Cortex A7/A15 * * Copyright (C) 2014 Renesas Electronics Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. */ #include diff --git a/arch/arm/mach-shmobile/platsmp-apmu.c b/arch/arm/mach-shmobile/platsmp-apmu.c index 9e1e85cf1899..96330ef25641 100644 --- a/arch/arm/mach-shmobile/platsmp-apmu.c +++ b/arch/arm/mach-shmobile/platsmp-apmu.c @@ -1,12 +1,9 @@ +// SPDX-License-Identifier: GPL-2.0 /* * SMP support for SoCs with APMU * * Copyright (C) 2014 Renesas Electronics Corporation * Copyright (C) 2013 Magnus Damm - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. */ #include #include diff --git a/arch/arm/mach-shmobile/regulator-quirk-rcar-gen2.c b/arch/arm/mach-shmobile/regulator-quirk-rcar-gen2.c index 93f628acfd94..21ebc7678ffd 100644 --- a/arch/arm/mach-shmobile/regulator-quirk-rcar-gen2.c +++ b/arch/arm/mach-shmobile/regulator-quirk-rcar-gen2.c @@ -1,3 +1,4 @@ +// SPDX-License-Identifier: GPL-2.0 /* * R-Car Generation 2 da9063/da9210 regulator quirk * @@ -16,15 +17,6 @@ * been initialized, but before the i2c slave drivers are initialized. * * Copyright (C) 2015 Glider bvba - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. */ #include diff --git a/arch/arm/mach-shmobile/setup-emev2.c b/arch/arm/mach-shmobile/setup-emev2.c index 3c99aaf65325..a328d2f52678 100644 --- a/arch/arm/mach-shmobile/setup-emev2.c +++ b/arch/arm/mach-shmobile/setup-emev2.c @@ -1,16 +1,8 @@ +// SPDX-License-Identifier: GPL-2.0 /* * Emma Mobile EV2 processor support * * Copyright (C) 2012 Magnus Damm - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. */ #include #include diff --git a/arch/arm/mach-shmobile/setup-r7s72100.c b/arch/arm/mach-shmobile/setup-r7s72100.c index 319ca9508ec6..14867226f8f4 100644 --- a/arch/arm/mach-shmobile/setup-r7s72100.c +++ b/arch/arm/mach-shmobile/setup-r7s72100.c @@ -1,17 +1,9 @@ +// SPDX-License-Identifier: GPL-2.0 /* * r7s72100 processor support * * Copyright (C) 2013 Renesas Solutions Corp. * Copyright (C) 2013 Magnus Damm - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. */ #include diff --git a/arch/arm/mach-shmobile/setup-r8a73a4.c b/arch/arm/mach-shmobile/setup-r8a73a4.c index 20173c4f415d..ef391fa368e9 100644 --- a/arch/arm/mach-shmobile/setup-r8a73a4.c +++ b/arch/arm/mach-shmobile/setup-r8a73a4.c @@ -1,17 +1,9 @@ +// SPDX-License-Identifier: GPL-2.0 /* * r8a73a4 processor support * * Copyright (C) 2013 Renesas Solutions Corp. * Copyright (C) 2013 Magnus Damm - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. */ #include diff --git a/arch/arm/mach-shmobile/setup-r8a7740.c b/arch/arm/mach-shmobile/setup-r8a7740.c index 3849eef0d3a7..787d039b5a07 100644 --- a/arch/arm/mach-shmobile/setup-r8a7740.c +++ b/arch/arm/mach-shmobile/setup-r8a7740.c @@ -1,17 +1,9 @@ +// SPDX-License-Identifier: GPL-2.0 /* * R8A7740 processor support * * Copyright (C) 2011 Renesas Solutions Corp. * Copyright (C) 2011 Kuninori Morimoto - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. */ #include #include diff --git a/arch/arm/mach-shmobile/setup-r8a7778.c b/arch/arm/mach-shmobile/setup-r8a7778.c index 7fa4a0b5f654..ce51794f64c7 100644 --- a/arch/arm/mach-shmobile/setup-r8a7778.c +++ b/arch/arm/mach-shmobile/setup-r8a7778.c @@ -1,18 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0 /* * r8a7778 processor support * * Copyright (C) 2013 Renesas Solutions Corp. * Copyright (C) 2013 Kuninori Morimoto * Copyright (C) 2013 Cogent Embedded, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. */ #include diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c index 0686112f2435..d589326099e0 100644 --- a/arch/arm/mach-shmobile/setup-r8a7779.c +++ b/arch/arm/mach-shmobile/setup-r8a7779.c @@ -1,18 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0 /* * r8a7779 processor support * * Copyright (C) 2011, 2013 Renesas Solutions Corp. * Copyright (C) 2011 Magnus Damm * Copyright (C) 2013 Cogent Embedded, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. */ #include #include diff --git a/arch/arm/mach-shmobile/setup-rcar-gen2.c b/arch/arm/mach-shmobile/setup-rcar-gen2.c index 4c605129cd37..117531367f17 100644 --- a/arch/arm/mach-shmobile/setup-rcar-gen2.c +++ b/arch/arm/mach-shmobile/setup-rcar-gen2.c @@ -1,18 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0 /* * R-Car Generation 2 support * * Copyright (C) 2013 Renesas Solutions Corp. * Copyright (C) 2013 Magnus Damm * Copyright (C) 2014 Ulrich Hecht - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. */ #include diff --git a/arch/arm/mach-shmobile/setup-sh73a0.c b/arch/arm/mach-shmobile/setup-sh73a0.c index a25ff188e403..cc08aa752244 100644 --- a/arch/arm/mach-shmobile/setup-sh73a0.c +++ b/arch/arm/mach-shmobile/setup-sh73a0.c @@ -1,18 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0 /* * sh73a0 processor support * * Copyright (C) 2010 Takashi Yoshii * Copyright (C) 2010 Magnus Damm * Copyright (C) 2008 Yoshihiro Shimoda - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. */ #include #include diff --git a/arch/arm/mach-shmobile/smp-emev2.c b/arch/arm/mach-shmobile/smp-emev2.c index 3a732199cf5e..3853ecea44ca 100644 --- a/arch/arm/mach-shmobile/smp-emev2.c +++ b/arch/arm/mach-shmobile/smp-emev2.c @@ -1,17 +1,9 @@ +// SPDX-License-Identifier: GPL-2.0 /* * SMP support for Emma Mobile EV2 * * Copyright (C) 2012 Renesas Solutions Corp. * Copyright (C) 2012 Magnus Damm - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. */ #include #include diff --git a/arch/arm/mach-shmobile/smp-r8a7779.c b/arch/arm/mach-shmobile/smp-r8a7779.c index 0d3ec5c2b8fc..b7fe1f489b08 100644 --- a/arch/arm/mach-shmobile/smp-r8a7779.c +++ b/arch/arm/mach-shmobile/smp-r8a7779.c @@ -1,17 +1,9 @@ +// SPDX-License-Identifier: GPL-2.0 /* * SMP support for R-Mobile / SH-Mobile - r8a7779 portion * * Copyright (C) 2011 Renesas Solutions Corp. * Copyright (C) 2011 Magnus Damm - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. */ #include #include From 295898ba62161e33a0836df5df45ec3788dcaba8 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Cl=C3=A9ment=20Peron?= Date: Wed, 30 May 2018 15:19:55 +0200 Subject: [PATCH 017/112] ARM: debug: Add iProc UART3 debug addresses MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Broadcom iProc SoCs typically use the UART3 for debug/console, provide a known good location for that. Signed-off-by: Clément Peron Signed-off-by: Florian Fainelli --- arch/arm/Kconfig.debug | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 693f84392f1b..28962a9bd2e6 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -207,6 +207,14 @@ choice depends on ARCH_BCM_HR2 select DEBUG_UART_8250 + config DEBUG_BCM_IPROC_UART3 + bool "Kernel low-level debugging on BCM IPROC UART3" + depends on ARCH_BCM_CYGNUS + select DEBUG_UART_8250 + help + Say Y here if you want the debug print routines to direct + their output to the third serial port on these devices. + config DEBUG_BCM_KONA_UART bool "Kernel low-level debugging messages via BCM KONA UART" depends on ARCH_BCM_MOBILE @@ -1565,6 +1573,7 @@ config DEBUG_UART_PHYS default 0x18000400 if DEBUG_BCM_HR2 default 0x18010000 if DEBUG_SIRFATLAS7_UART0 default 0x18020000 if DEBUG_SIRFATLAS7_UART1 + default 0x18023000 if DEBUG_BCM_IPROC_UART3 default 0x1c090000 if DEBUG_VEXPRESS_UART0_RS1 default 0x20001000 if DEBUG_HIP01_UART default 0x20060000 if DEBUG_RK29_UART0 @@ -1685,6 +1694,7 @@ config DEBUG_UART_VIRT default 0xf1002000 if DEBUG_MT8127_UART0 default 0xf1006000 if DEBUG_MT6589_UART0 default 0xf1009000 if DEBUG_MT8135_UART3 + default 0xf1023000 if DEBUG_BCM_IPROC_UART3 default 0xf11f1000 if DEBUG_VERSATILE default 0xf1600000 if DEBUG_INTEGRATOR default 0xf1c28000 if DEBUG_SUNXI_UART0 @@ -1800,7 +1810,7 @@ config DEBUG_UART_8250_WORD DEBUG_KEYSTONE_UART0 || DEBUG_KEYSTONE_UART1 || \ DEBUG_ALPINE_UART0 || \ DEBUG_DAVINCI_DMx_UART0 || DEBUG_DAVINCI_DA8XX_UART1 || \ - DEBUG_DAVINCI_DA8XX_UART2 || \ + DEBUG_DAVINCI_DA8XX_UART2 || DEBUG_BCM_IPROC_UART3 || \ DEBUG_BCM_KONA_UART || DEBUG_RK32_UART2 config DEBUG_UART_8250_PALMCHIP From f3f49e42c119f6fc7cd06ddae495915cf9f65654 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Cl=C3=A9ment=20Peron?= Date: Wed, 30 May 2018 15:19:56 +0200 Subject: [PATCH 018/112] ARM: debug: fix BCM2836 order entry MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Entries are sorted by their address value, except the BCM2836/KONA which are not in the proper order. Signed-off-by: Clément Peron Signed-off-by: Florian Fainelli --- arch/arm/Kconfig.debug | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 28962a9bd2e6..dd8db9582bdf 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -1580,8 +1580,8 @@ config DEBUG_UART_PHYS default 0x20064000 if DEBUG_RK29_UART1 || DEBUG_RK3X_UART2 default 0x20068000 if DEBUG_RK29_UART2 || DEBUG_RK3X_UART3 default 0x20201000 if DEBUG_BCM2835 - default 0x3f201000 if DEBUG_BCM2836 default 0x3e000000 if DEBUG_BCM_KONA_UART + default 0x3f201000 if DEBUG_BCM2836 default 0x4000e400 if DEBUG_LL_UART_EFM32 default 0x40028000 if DEBUG_AT91_SAMV7_USART1 default 0x40081000 if DEBUG_LPC18XX_UART0 From 07c4be9d27ade3eaef8c6ba8abf1f3270a6a26f4 Mon Sep 17 00:00:00 2001 From: Anson Huang Date: Thu, 31 May 2018 10:06:08 +0800 Subject: [PATCH 019/112] ARM: imx: add standby mode suspend for i.MX6SLL Add standby mode suspend for i.MX6SLL, when linux kernel suspend, SoC will enter STOP mode with ARM core power on. Signed-off-by: Anson Huang Signed-off-by: Shawn Guo --- arch/arm/mach-imx/pm-imx6.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-imx/pm-imx6.c b/arch/arm/mach-imx/pm-imx6.c index 017539dd712b..d319b205c93d 100644 --- a/arch/arm/mach-imx/pm-imx6.c +++ b/arch/arm/mach-imx/pm-imx6.c @@ -296,7 +296,7 @@ int imx6_set_lpm(enum mxc_cpu_pwr_mode mode) if (cpu_is_imx6sl()) val |= BM_CLPCR_BYPASS_PMIC_READY; if (cpu_is_imx6sl() || cpu_is_imx6sx() || cpu_is_imx6ul() || - cpu_is_imx6ull()) + cpu_is_imx6ull() || cpu_is_imx6sll()) val |= BM_CLPCR_BYP_MMDC_CH0_LPM_HS; else val |= BM_CLPCR_BYP_MMDC_CH1_LPM_HS; From 22021948c98c5d86a7b44d2c610bf610dcea4a81 Mon Sep 17 00:00:00 2001 From: Anson Huang Date: Thu, 31 May 2018 10:06:09 +0800 Subject: [PATCH 020/112] ARM: imx: add mem mode suspend for i.MX6SLL Add mem mode suspend for i.MX6SLL, when linux kernel suspend, SoC will enter STOP mode, ARM core will be power gated and MMDC IO will be set to low power mode. Signed-off-by: Anson Huang Signed-off-by: Shawn Guo --- arch/arm/mach-imx/pm-imx6.c | 24 ++++++++++++++++++++++-- 1 file changed, 22 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-imx/pm-imx6.c b/arch/arm/mach-imx/pm-imx6.c index d319b205c93d..791e1fda248e 100644 --- a/arch/arm/mach-imx/pm-imx6.c +++ b/arch/arm/mach-imx/pm-imx6.c @@ -130,6 +130,13 @@ static const u32 imx6sl_mmdc_io_offset[] __initconst = { 0x330, 0x334, 0x320, /* SDCKE0, SDCKE1, RESET */ }; +static const u32 imx6sll_mmdc_io_offset[] __initconst = { + 0x294, 0x298, 0x29c, 0x2a0, /* DQM0 ~ DQM3 */ + 0x544, 0x54c, 0x554, 0x558, /* GPR_B0DS ~ GPR_B3DS */ + 0x530, 0x540, 0x2ac, 0x52c, /* MODE_CTL, MODE, SDCLK_0, GPR_ADDDS */ + 0x2a4, 0x2a8, /* SDCKE0, SDCKE1*/ +}; + static const u32 imx6sx_mmdc_io_offset[] __initconst = { 0x2ec, 0x2f0, 0x2f4, 0x2f8, /* DQM0 ~ DQM3 */ 0x60c, 0x610, 0x61c, 0x620, /* GPR_B0DS ~ GPR_B3DS */ @@ -175,6 +182,16 @@ static const struct imx6_pm_socdata imx6sl_pm_data __initconst = { .mmdc_io_offset = imx6sl_mmdc_io_offset, }; +static const struct imx6_pm_socdata imx6sll_pm_data __initconst = { + .mmdc_compat = "fsl,imx6sll-mmdc", + .src_compat = "fsl,imx6sll-src", + .iomuxc_compat = "fsl,imx6sll-iomuxc", + .gpc_compat = "fsl,imx6sll-gpc", + .pl310_compat = "arm,pl310-cache", + .mmdc_io_num = ARRAY_SIZE(imx6sll_mmdc_io_offset), + .mmdc_io_offset = imx6sll_mmdc_io_offset, +}; + static const struct imx6_pm_socdata imx6sx_pm_data __initconst = { .mmdc_compat = "fsl,imx6sx-mmdc", .src_compat = "fsl,imx6sx-src", @@ -314,7 +331,7 @@ int imx6_set_lpm(enum mxc_cpu_pwr_mode mode) if (cpu_is_imx6sl() || cpu_is_imx6sx()) val |= BM_CLPCR_BYPASS_PMIC_READY; if (cpu_is_imx6sl() || cpu_is_imx6sx() || cpu_is_imx6ul() || - cpu_is_imx6ull()) + cpu_is_imx6ull() || cpu_is_imx6sll()) val |= BM_CLPCR_BYP_MMDC_CH0_LPM_HS; else val |= BM_CLPCR_BYP_MMDC_CH1_LPM_HS; @@ -631,7 +648,10 @@ void __init imx6dl_pm_init(void) void __init imx6sl_pm_init(void) { - imx6_pm_common_init(&imx6sl_pm_data); + if (cpu_is_imx6sl()) + imx6_pm_common_init(&imx6sl_pm_data); + else + imx6_pm_common_init(&imx6sll_pm_data); } void __init imx6sx_pm_init(void) From c791bbbf812a18a7831619783f12a316beeac558 Mon Sep 17 00:00:00 2001 From: Anson Huang Date: Sun, 3 Jun 2018 10:33:44 +0800 Subject: [PATCH 021/112] ARM: imx: add L2 page power control for GPC Some platforms like i.MX6UL/i.MX6SLL have L2 page power control in GPC, it needs to be disabled if ARM is power gated and L2 is NOT flushed, add GPC interface to control it. Signed-off-by: Anson Huang Reviewed-by: Fabio Estevam Signed-off-by: Shawn Guo --- arch/arm/mach-imx/common.h | 1 + arch/arm/mach-imx/gpc.c | 14 ++++++++++++++ 2 files changed, 15 insertions(+) diff --git a/arch/arm/mach-imx/common.h b/arch/arm/mach-imx/common.h index 18aae76fa2da..93225db759f8 100644 --- a/arch/arm/mach-imx/common.h +++ b/arch/arm/mach-imx/common.h @@ -57,6 +57,7 @@ struct device *imx_soc_device_init(void); void imx6_enable_rbc(bool enable); void imx_gpc_check_dt(void); void imx_gpc_set_arm_power_in_lpm(bool power_off); +void imx_gpc_set_l2_mem_power_in_lpm(bool power_off); void imx_gpc_set_arm_power_up_timing(u32 sw2iso, u32 sw); void imx_gpc_set_arm_power_down_timing(u32 sw2iso, u32 sw); void imx25_pm_init(void); diff --git a/arch/arm/mach-imx/gpc.c b/arch/arm/mach-imx/gpc.c index de535cb679b3..e11159d40fb8 100644 --- a/arch/arm/mach-imx/gpc.c +++ b/arch/arm/mach-imx/gpc.c @@ -20,6 +20,7 @@ #include "common.h" #include "hardware.h" +#define GPC_CNTR 0x0 #define GPC_IMR1 0x008 #define GPC_PGC_CPU_PDN 0x2a0 #define GPC_PGC_CPU_PUPSCR 0x2a4 @@ -27,6 +28,8 @@ #define GPC_PGC_SW2ISO_SHIFT 0x8 #define GPC_PGC_SW_SHIFT 0x0 +#define GPC_CNTR_L2_PGE_SHIFT 22 + #define IMR_NUM 4 #define GPC_MAX_IRQS (IMR_NUM * 32) @@ -51,6 +54,17 @@ void imx_gpc_set_arm_power_in_lpm(bool power_off) writel_relaxed(power_off, gpc_base + GPC_PGC_CPU_PDN); } +void imx_gpc_set_l2_mem_power_in_lpm(bool power_off) +{ + u32 val; + + val = readl_relaxed(gpc_base + GPC_CNTR); + val &= ~(1 << GPC_CNTR_L2_PGE_SHIFT); + if (power_off) + val |= 1 << GPC_CNTR_L2_PGE_SHIFT; + writel_relaxed(val, gpc_base + GPC_CNTR); +} + void imx_gpc_pre_suspend(bool arm_power_off) { void __iomem *reg_imr1 = gpc_base + GPC_IMR1; From e7fa1fb39b118cc8415a946fd2e6bc0f6b6c05c9 Mon Sep 17 00:00:00 2001 From: Anson Huang Date: Sun, 3 Jun 2018 10:33:45 +0800 Subject: [PATCH 022/112] ARM: imx: add cpu idle support for i.MX6SLL i.MX6SLL supports cpu idle with ARM power gated, it can reuse i.MX6SX's cpu idle driver to support below 3 states of cpu idle: state0: WFI; state1: WAIT mode with ARM power on; state2: WAIT mode with ARM power off. L2_PGE in GPC_CNTR needs to be cleared to support state2 cpu idle. Signed-off-by: Anson Huang Signed-off-by: Shawn Guo --- arch/arm/mach-imx/Makefile | 4 ++-- arch/arm/mach-imx/cpuidle-imx6sx.c | 1 + arch/arm/mach-imx/mach-imx6sl.c | 5 ++++- 3 files changed, 7 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile index 2327e3e876d8..127fdf3ff600 100644 --- a/arch/arm/mach-imx/Makefile +++ b/arch/arm/mach-imx/Makefile @@ -25,8 +25,8 @@ obj-$(CONFIG_MXC_DEBUG_BOARD) += 3ds_debugboard.o ifeq ($(CONFIG_CPU_IDLE),y) obj-$(CONFIG_SOC_IMX5) += cpuidle-imx5.o obj-$(CONFIG_SOC_IMX6Q) += cpuidle-imx6q.o -obj-$(CONFIG_SOC_IMX6SL) += cpuidle-imx6sl.o -obj-$(CONFIG_SOC_IMX6SLL) += cpuidle-imx6sl.o +obj-$(CONFIG_SOC_IMX6SL) += cpuidle-imx6sl.o cpuidle-imx6sx.o +obj-$(CONFIG_SOC_IMX6SLL) += cpuidle-imx6sl.o cpuidle-imx6sx.o obj-$(CONFIG_SOC_IMX6SX) += cpuidle-imx6sx.o obj-$(CONFIG_SOC_IMX6UL) += cpuidle-imx6sx.o endif diff --git a/arch/arm/mach-imx/cpuidle-imx6sx.c b/arch/arm/mach-imx/cpuidle-imx6sx.c index d0f14b761ff7..243a108a940b 100644 --- a/arch/arm/mach-imx/cpuidle-imx6sx.c +++ b/arch/arm/mach-imx/cpuidle-imx6sx.c @@ -103,6 +103,7 @@ int __init imx6sx_cpuidle_init(void) { imx6_set_int_mem_clk_lpm(true); imx6_enable_rbc(false); + imx_gpc_set_l2_mem_power_in_lpm(false); /* * set ARM power up/down timing to the fastest, * sw2iso and sw can be set to one 32K cycle = 31us diff --git a/arch/arm/mach-imx/mach-imx6sl.c b/arch/arm/mach-imx/mach-imx6sl.c index c7a1ef180dda..183540e0838b 100644 --- a/arch/arm/mach-imx/mach-imx6sl.c +++ b/arch/arm/mach-imx/mach-imx6sl.c @@ -42,7 +42,10 @@ static void __init imx6sl_init_late(void) if (IS_ENABLED(CONFIG_ARM_IMX6Q_CPUFREQ)) platform_device_register_simple("imx6q-cpufreq", -1, NULL, 0); - imx6sl_cpuidle_init(); + if (cpu_is_imx6sl()) + imx6sl_cpuidle_init(); + else + imx6sx_cpuidle_init(); } static void __init imx6sl_init_machine(void) From 83ef5da0527cfeb1bb77c25f67b7ce0e06a42579 Mon Sep 17 00:00:00 2001 From: Anson Huang Date: Sun, 3 Jun 2018 10:33:46 +0800 Subject: [PATCH 023/112] ARM: imx: remove i.MX6SLL support in i.MX6SL cpu idle driver i.MX6SLL supports ARM power off in cpu idle, better to reuse i.MX6SX cpu idle driver instead of i.MX6SL which does NOT support ARM power off. Signed-off-by: Anson Huang Reviewed-by: Fabio Estevam Signed-off-by: Shawn Guo --- arch/arm/mach-imx/cpuidle-imx6sl.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/arch/arm/mach-imx/cpuidle-imx6sl.c b/arch/arm/mach-imx/cpuidle-imx6sl.c index fa8ead145d17..8d866fb674a8 100644 --- a/arch/arm/mach-imx/cpuidle-imx6sl.c +++ b/arch/arm/mach-imx/cpuidle-imx6sl.c @@ -12,7 +12,6 @@ #include "common.h" #include "cpuidle.h" -#include "hardware.h" static int imx6sl_enter_wait(struct cpuidle_device *dev, struct cpuidle_driver *drv, int index) @@ -22,11 +21,9 @@ static int imx6sl_enter_wait(struct cpuidle_device *dev, * Software workaround for ERR005311, see function * description for details. */ - if (cpu_is_imx6sl()) - imx6sl_set_wait_clk(true); + imx6sl_set_wait_clk(true); cpu_do_idle(); - if (cpu_is_imx6sl()) - imx6sl_set_wait_clk(false); + imx6sl_set_wait_clk(false); imx6_set_lpm(WAIT_CLOCKED); return index; From 1e1d5b69397c0c9908fbf375930326fc529e73b1 Mon Sep 17 00:00:00 2001 From: Boris Brezillon Date: Wed, 13 Jun 2018 10:29:36 +0200 Subject: [PATCH 024/112] MAINTAINERS: Remove the AT91 clk driver entry I've stopped actively maintaining this driver for quite some time already, and at91 maintainers are doing a good job at maintaining it. Remove the AT91 clk driver entry so that the driver automatically falls under the "ARM/Microchip (AT91) SoC support" entry. Signed-off-by: Boris Brezillon Acked-by: Stephen Boyd Signed-off-by: Alexandre Belloni --- MAINTAINERS | 5 ----- 1 file changed, 5 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index 9d5eeff51b5f..f0e1cd807738 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1256,11 +1256,6 @@ F: arch/arm/mach-aspeed/ F: arch/arm/boot/dts/aspeed-* N: aspeed -ARM/ATMEL AT91 Clock Support -M: Boris Brezillon -S: Maintained -F: drivers/clk/at91 - ARM/CALXEDA HIGHBANK ARCHITECTURE M: Rob Herring L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) From f439b5c8a00d7b17d3f3618ea9b3b8977f33f8e7 Mon Sep 17 00:00:00 2001 From: Robert Jarzmik Date: Sat, 26 May 2018 11:38:34 +0200 Subject: [PATCH 025/112] ARM: pxa: hx4700: fix the usb client The usb client of the hx4700 is not working because no platform data is declared. Fix it by adding the missing call. Signed-off-by: Robert Jarzmik --- arch/arm/mach-pxa/hx4700.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/mach-pxa/hx4700.c b/arch/arm/mach-pxa/hx4700.c index e2e7f247a645..b79b757fdd41 100644 --- a/arch/arm/mach-pxa/hx4700.c +++ b/arch/arm/mach-pxa/hx4700.c @@ -54,6 +54,7 @@ #include "devices.h" #include "generic.h" +#include "udc.h" /* Physical address space information */ @@ -594,6 +595,8 @@ static struct platform_device gpio_vbus = { }, }; +static struct pxa2xx_udc_mach_info hx4700_udc_info; + /* * Touchscreen - TSC2046 connected to SSP2 */ @@ -891,6 +894,7 @@ static void __init hx4700_init(void) gpio_set_value(GPIO71_HX4700_ASIC3_nRESET, 1); mdelay(10); + pxa_set_udc_info(&hx4700_udc_info); regulator_has_full_constraints(); } From a4d7baf0a02a1bd5725df5f46c09ab374a3abd79 Mon Sep 17 00:00:00 2001 From: Robert Jarzmik Date: Sun, 27 May 2018 21:23:38 +0200 Subject: [PATCH 026/112] ARM: pxa: mioa701 convert to the new AC97 bus This migration implies : - wm9713 device is removed, it will be auto-probed Signed-off-by: Robert Jarzmik --- arch/arm/mach-pxa/mioa701.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c index 9b6c7ea45a40..04dc78d0809f 100644 --- a/arch/arm/mach-pxa/mioa701.c +++ b/arch/arm/mach-pxa/mioa701.c @@ -677,14 +677,12 @@ MIO_SIMPLE_DEV(mioa701_led, "leds-gpio", &gpio_led_info) MIO_SIMPLE_DEV(pxa2xx_pcm, "pxa2xx-pcm", NULL) MIO_SIMPLE_DEV(mioa701_sound, "mioa701-wm9713", NULL) MIO_SIMPLE_DEV(mioa701_board, "mioa701-board", NULL) -MIO_SIMPLE_DEV(wm9713_acodec, "wm9713-codec", NULL); MIO_SIMPLE_DEV(gpio_vbus, "gpio-vbus", &gpio_vbus_data); static struct platform_device *devices[] __initdata = { &mioa701_gpio_keys, &mioa701_backlight, &mioa701_led, - &wm9713_acodec, &pxa2xx_pcm, &mioa701_sound, &power_dev, From 22abc0d25db35e74753c7d3d8f30d2823a7fe2a1 Mon Sep 17 00:00:00 2001 From: Robert Jarzmik Date: Sun, 3 Jun 2018 22:15:39 +0200 Subject: [PATCH 027/112] ARM: pxa: add the missing AC97 clocks The AC97 bit clock is added as the pxa internally generated 13MHz clock. This is a consequence of the new ac97 framework. Signed-off-by: Robert Jarzmik --- arch/arm/mach-pxa/devices.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm/mach-pxa/devices.c b/arch/arm/mach-pxa/devices.c index 5a16ea74e28a..a24783a03827 100644 --- a/arch/arm/mach-pxa/devices.c +++ b/arch/arm/mach-pxa/devices.c @@ -3,6 +3,7 @@ #include #include #include +#include #include #include #include @@ -477,6 +478,18 @@ struct platform_device pxa_device_ac97 = { void __init pxa_set_ac97_info(pxa2xx_audio_ops_t *ops) { + int ret; + + ret = clk_add_alias("ac97_clk", "pxa2xx-ac97:0", "AC97CLK", + &pxa_device_ac97.dev); + if (ret) + pr_err("PXA AC97 clock1 alias error: %d\n", ret); + + ret = clk_add_alias("ac97_clk", "pxa2xx-ac97:1", "AC97CLK", + &pxa_device_ac97.dev); + if (ret) + pr_err("PXA AC97 clock2 alias error: %d\n", ret); + pxa_register_device(&pxa_device_ac97, ops); } From 35b69d626c3a4eaac15618f9419b8a29c8a1da22 Mon Sep 17 00:00:00 2001 From: Robert Jarzmik Date: Sun, 3 Jun 2018 22:17:02 +0200 Subject: [PATCH 028/112] ARM: pxa: zylonite: use the new ac97 bus support Now the PXA is converted to new ac97 bus support, the wm9713 is automatically detected and probed. Remove it from the platform bus. Signed-off-by: Robert Jarzmik --- arch/arm/mach-pxa/zylonite.c | 11 ----------- 1 file changed, 11 deletions(-) diff --git a/arch/arm/mach-pxa/zylonite.c b/arch/arm/mach-pxa/zylonite.c index d69de312d8d9..52e70a5c1281 100644 --- a/arch/arm/mach-pxa/zylonite.c +++ b/arch/arm/mach-pxa/zylonite.c @@ -47,16 +47,6 @@ int wm9713_irq; int lcd_id; int lcd_orientation; -struct platform_device pxa_device_wm9713_audio = { - .name = "wm9713-codec", - .id = -1, -}; - -static void __init zylonite_init_wm9713_audio(void) -{ - platform_device_register(&pxa_device_wm9713_audio); -} - static struct resource smc91x_resources[] = { [0] = { .start = ZYLONITE_ETH_PHYS + 0x300, @@ -428,7 +418,6 @@ static void __init zylonite_init(void) zylonite_init_nand(); zylonite_init_leds(); zylonite_init_ohci(); - zylonite_init_wm9713_audio(); } MACHINE_START(ZYLONITE, "PXA3xx Platform Development Kit (aka Zylonite)") From 9d7bc29cc96bd6242ad451d3ee0b62387b14e0f0 Mon Sep 17 00:00:00 2001 From: Robert Jarzmik Date: Sun, 17 Jun 2018 19:02:10 +0200 Subject: [PATCH 029/112] net: smc911x: remove the dmaengine compat need As the pxa architecture switched towards the dmaengine slave map, the old compatibility mechanism to acquire the dma requestor line number and priority are not needed anymore. This patch simplifies the dma resource acquisition, using the more generic function dma_request_slave_channel(). Signed-off-by: Robert Jarzmik Acked-by: David S. Miller --- drivers/net/ethernet/smsc/smc911x.c | 13 ++----------- 1 file changed, 2 insertions(+), 11 deletions(-) diff --git a/drivers/net/ethernet/smsc/smc911x.c b/drivers/net/ethernet/smsc/smc911x.c index 05157442a980..b1b53f6c452f 100644 --- a/drivers/net/ethernet/smsc/smc911x.c +++ b/drivers/net/ethernet/smsc/smc911x.c @@ -74,7 +74,6 @@ static const char version[] = #include #include -#include #include @@ -1795,7 +1794,6 @@ static int smc911x_probe(struct net_device *dev) #ifdef SMC_USE_DMA struct dma_slave_config config; dma_cap_mask_t mask; - struct pxad_param param; #endif DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__); @@ -1971,15 +1969,8 @@ static int smc911x_probe(struct net_device *dev) dma_cap_zero(mask); dma_cap_set(DMA_SLAVE, mask); - param.prio = PXAD_PRIO_LOWEST; - param.drcmr = -1UL; - - lp->rxdma = - dma_request_slave_channel_compat(mask, pxad_filter_fn, - ¶m, &dev->dev, "rx"); - lp->txdma = - dma_request_slave_channel_compat(mask, pxad_filter_fn, - ¶m, &dev->dev, "tx"); + lp->rxdma = dma_request_channel(mask, NULL, NULL); + lp->txdma = dma_request_channel(mask, NULL, NULL); lp->rxdma_active = 0; lp->txdma_active = 0; From cbc654c88178b7dc3b63f57278cb917ffdb629cc Mon Sep 17 00:00:00 2001 From: Robert Jarzmik Date: Sun, 17 Jun 2018 19:02:11 +0200 Subject: [PATCH 030/112] net: smc91x: remove the dmaengine compat need As the pxa architecture switched towards the dmaengine slave map, the old compatibility mechanism to acquire the dma requestor line number and priority are not needed anymore. This patch simplifies the dma resource acquisition, using the more generic function dma_request_slave_channel(). Signed-off-by: Robert Jarzmik Acked-by: David S. Miller --- drivers/net/ethernet/smsc/smc91x.c | 9 +-------- drivers/net/ethernet/smsc/smc91x.h | 1 - 2 files changed, 1 insertion(+), 9 deletions(-) diff --git a/drivers/net/ethernet/smsc/smc91x.c b/drivers/net/ethernet/smsc/smc91x.c index 080428762858..b944828f9ea3 100644 --- a/drivers/net/ethernet/smsc/smc91x.c +++ b/drivers/net/ethernet/smsc/smc91x.c @@ -2019,17 +2019,10 @@ static int smc_probe(struct net_device *dev, void __iomem *ioaddr, # endif if (lp->cfg.flags & SMC91X_USE_DMA) { dma_cap_mask_t mask; - struct pxad_param param; dma_cap_zero(mask); dma_cap_set(DMA_SLAVE, mask); - param.prio = PXAD_PRIO_LOWEST; - param.drcmr = -1UL; - - lp->dma_chan = - dma_request_slave_channel_compat(mask, pxad_filter_fn, - ¶m, &dev->dev, - "data"); + lp->dma_chan = dma_request_channel(mask, NULL, NULL); } #endif diff --git a/drivers/net/ethernet/smsc/smc91x.h b/drivers/net/ethernet/smsc/smc91x.h index b337ee97e0c0..a27352229fc2 100644 --- a/drivers/net/ethernet/smsc/smc91x.h +++ b/drivers/net/ethernet/smsc/smc91x.h @@ -301,7 +301,6 @@ struct smc_local { * as RX which can overrun memory and lose packets. */ #include -#include #ifdef SMC_insl #undef SMC_insl From 5613ee51b09deec6ec9a9a53824b37c9b1461ecf Mon Sep 17 00:00:00 2001 From: Denis Efremov Date: Sun, 17 Jun 2018 22:46:17 +0300 Subject: [PATCH 031/112] ARM: s3c24xx: Fix typo in guard macro of s3c2412.h The guard macro __ARCH_ARM_REGS_S3C24XX_S3C2412_H in header s3c2412.h doesn't match the #ifndef macro __ARCH_ARM_MACH_S3C24XX_S3C2412_H. Found by Linux Driver Verification project (linuxtesting.org). Signed-off-by: Denis Efremov Signed-off-by: Krzysztof Kozlowski --- arch/arm/mach-s3c24xx/include/mach/s3c2412.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-s3c24xx/include/mach/s3c2412.h b/arch/arm/mach-s3c24xx/include/mach/s3c2412.h index b6b32724ace8..4ff83f956cfb 100644 --- a/arch/arm/mach-s3c24xx/include/mach/s3c2412.h +++ b/arch/arm/mach-s3c24xx/include/mach/s3c2412.h @@ -6,7 +6,7 @@ */ #ifndef __ARCH_ARM_MACH_S3C24XX_S3C2412_H -#define __ARCH_ARM_REGS_S3C24XX_S3C2412_H __FILE__ +#define __ARCH_ARM_MACH_S3C24XX_S3C2412_H __FILE__ #define S3C2412_MEMREG(x) (S3C24XX_VA_MEMCTRL + (x)) #define S3C2412_EBIREG(x) (S3C2412_VA_EBI + (x)) From a7da5277cdc6690823ad226335feefc11391cf67 Mon Sep 17 00:00:00 2001 From: David Lechner Date: Fri, 18 May 2018 11:48:06 -0500 Subject: [PATCH 032/112] ARM: davinci: pass clock as parameter to davinci_timer_init() This changes davinci_timer_init() so that we pass the clock as a parameter instead of using clk_get(). This is done in preparation for converting to the common clock framework. It removes the requirement that we have to have a clock with con_id of "timer0", which will be good for DT bindings since clock-names = "timer0" doesn't really make sense. Also, drop use of extern in header file since we are touching the definition. Reviewed-by: Sekhar Nori Signed-off-by: David Lechner Signed-off-by: Sekhar Nori --- arch/arm/mach-davinci/da830.c | 2 +- arch/arm/mach-davinci/da850.c | 2 +- arch/arm/mach-davinci/dm355.c | 2 +- arch/arm/mach-davinci/dm365.c | 2 +- arch/arm/mach-davinci/dm644x.c | 2 +- arch/arm/mach-davinci/dm646x.c | 2 +- arch/arm/mach-davinci/include/mach/common.h | 3 ++- arch/arm/mach-davinci/time.c | 5 +---- 8 files changed, 9 insertions(+), 11 deletions(-) diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c index 350d7673aa4d..0b17e5a22e5e 100644 --- a/arch/arm/mach-davinci/da830.c +++ b/arch/arm/mach-davinci/da830.c @@ -1224,5 +1224,5 @@ void __init da830_init(void) void __init da830_init_time(void) { davinci_clk_init(da830_clks); - davinci_timer_init(); + davinci_timer_init(&timerp64_0_clk); } diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c index 34117e614e08..1dbf01c4124b 100644 --- a/arch/arm/mach-davinci/da850.c +++ b/arch/arm/mach-davinci/da850.c @@ -1396,5 +1396,5 @@ void __init da850_init(void) void __init da850_init_time(void) { davinci_clk_init(da850_clks); - davinci_timer_init(); + davinci_timer_init(&timerp64_0_clk); } diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c index f29480495c18..0da7516018ca 100644 --- a/arch/arm/mach-davinci/dm355.c +++ b/arch/arm/mach-davinci/dm355.c @@ -1047,7 +1047,7 @@ void __init dm355_init(void) void __init dm355_init_time(void) { davinci_clk_init(dm355_clks); - davinci_timer_init(); + davinci_timer_init(&timer0_clk); } int __init dm355_init_video(struct vpfe_config *vpfe_cfg, diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c index 1e3df9df1e10..871372a59da8 100644 --- a/arch/arm/mach-davinci/dm365.c +++ b/arch/arm/mach-davinci/dm365.c @@ -1172,7 +1172,7 @@ void __init dm365_init(void) void __init dm365_init_time(void) { davinci_clk_init(dm365_clks); - davinci_timer_init(); + davinci_timer_init(&timer0_clk); } static struct resource dm365_vpss_resources[] = { diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c index a2e8586c8a6d..708df0ed8554 100644 --- a/arch/arm/mach-davinci/dm644x.c +++ b/arch/arm/mach-davinci/dm644x.c @@ -935,7 +935,7 @@ void __init dm644x_init(void) void __init dm644x_init_time(void) { davinci_clk_init(dm644x_clks); - davinci_timer_init(); + davinci_timer_init(&timer0_clk); } int __init dm644x_init_video(struct vpfe_config *vpfe_cfg, diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c index c32ca27ab343..280b753702f3 100644 --- a/arch/arm/mach-davinci/dm646x.c +++ b/arch/arm/mach-davinci/dm646x.c @@ -957,7 +957,7 @@ void __init dm646x_init_time(unsigned long ref_clk_rate, ref_clk.rate = ref_clk_rate; aux_clkin.rate = aux_clkin_rate; davinci_clk_init(dm646x_clks); - davinci_timer_init(); + davinci_timer_init(&timer0_clk); } static int __init dm646x_init_devices(void) diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h index f0d5e858f158..5f45d0ac66a8 100644 --- a/arch/arm/mach-davinci/include/mach/common.h +++ b/arch/arm/mach-davinci/include/mach/common.h @@ -12,11 +12,12 @@ #ifndef __ARCH_ARM_MACH_DAVINCI_COMMON_H #define __ARCH_ARM_MACH_DAVINCI_COMMON_H +#include #include #include #include -extern void davinci_timer_init(void); +void davinci_timer_init(struct clk *clk); extern void davinci_irq_init(void); extern void __iomem *davinci_intc_base; diff --git a/arch/arm/mach-davinci/time.c b/arch/arm/mach-davinci/time.c index 1bb991ad9c1e..486896f309c5 100644 --- a/arch/arm/mach-davinci/time.c +++ b/arch/arm/mach-davinci/time.c @@ -334,10 +334,8 @@ static struct clock_event_device clockevent_davinci = { .set_state_oneshot = davinci_set_oneshot, }; - -void __init davinci_timer_init(void) +void __init davinci_timer_init(struct clk *timer_clk) { - struct clk *timer_clk; struct davinci_soc_info *soc_info = &davinci_soc_info; unsigned int clockevent_id; unsigned int clocksource_id; @@ -373,7 +371,6 @@ void __init davinci_timer_init(void) } } - timer_clk = clk_get(NULL, "timer0"); BUG_ON(IS_ERR(timer_clk)); clk_prepare_enable(timer_clk); From 3952af1ca29216ff8d56896048607b237e472a5b Mon Sep 17 00:00:00 2001 From: David Lechner Date: Fri, 18 May 2018 11:48:07 -0500 Subject: [PATCH 033/112] ARM: davinci: da830: add new clock init using common clock framework This adds the new board-specific clock init in mach-davinci/da830.c using the new common clock framework drivers. The #ifdefs are needed to prevent compile errors until the entire ARCH_DAVINCI is converted. Also clean up the #includes since we are adding some here. Reviewed-by: Sekhar Nori Signed-off-by: David Lechner Signed-off-by: Sekhar Nori --- arch/arm/mach-davinci/board-da830-evm.c | 2 + arch/arm/mach-davinci/da830.c | 70 ++++++++++++++++++++-- arch/arm/mach-davinci/include/mach/da8xx.h | 1 + 3 files changed, 67 insertions(+), 6 deletions(-) diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c index 14a6fc061744..74df37821abe 100644 --- a/arch/arm/mach-davinci/board-da830-evm.c +++ b/arch/arm/mach-davinci/board-da830-evm.c @@ -557,6 +557,8 @@ static __init void da830_evm_init(void) struct davinci_soc_info *soc_info = &davinci_soc_info; int ret; + da830_register_clocks(); + ret = da830_register_gpio(); if (ret) pr_warn("%s: GPIO init failed: %d\n", __func__, ret); diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c index 0b17e5a22e5e..8a79e245db1f 100644 --- a/arch/arm/mach-davinci/da830.c +++ b/arch/arm/mach-davinci/da830.c @@ -8,23 +8,27 @@ * is licensed "as is" without any warranty of any kind, whether express * or implied. */ +#include +#include #include #include -#include #include #include -#include "psc.h" -#include -#include #include -#include +#include #include +#include +#include -#include "clock.h" #include "mux.h" +#ifndef CONFIG_COMMON_CLK +#include "clock.h" +#include "psc.h" +#endif + /* Offsets of the 8 compare registers on the da830 */ #define DA830_CMP12_0 0x60 #define DA830_CMP12_1 0x64 @@ -37,6 +41,7 @@ #define DA830_REF_FREQ 24000000 +#ifndef CONFIG_COMMON_CLK static struct pll_data pll0_data = { .num = 1, .phys_base = DA8XX_PLL0_BASE, @@ -432,6 +437,7 @@ static struct clk_lookup da830_clks[] = { CLK(NULL, "rmii", &rmii_clk), CLK(NULL, NULL, NULL), }; +#endif /* * Device specific mux setup @@ -1223,6 +1229,58 @@ void __init da830_init(void) void __init da830_init_time(void) { +#ifdef CONFIG_COMMON_CLK + void __iomem *pll; + struct clk *clk; + + clk_register_fixed_rate(NULL, "ref_clk", NULL, 0, DA830_REF_FREQ); + + pll = ioremap(DA8XX_PLL0_BASE, SZ_4K); + + da830_pll_init(NULL, pll, NULL); + + clk = clk_get(NULL, "timer0"); + + davinci_timer_init(clk); +#else davinci_clk_init(da830_clks); davinci_timer_init(&timerp64_0_clk); +#endif +} + +static struct resource da830_psc0_resources[] = { + { + .start = DA8XX_PSC0_BASE, + .end = DA8XX_PSC0_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device da830_psc0_device = { + .name = "da830-psc0", + .id = -1, + .resource = da830_psc0_resources, + .num_resources = ARRAY_SIZE(da830_psc0_resources), +}; + +static struct resource da830_psc1_resources[] = { + { + .start = DA8XX_PSC1_BASE, + .end = DA8XX_PSC1_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device da830_psc1_device = { + .name = "da830-psc1", + .id = -1, + .resource = da830_psc1_resources, + .num_resources = ARRAY_SIZE(da830_psc1_resources), +}; + +void __init da830_register_clocks(void) +{ + /* PLL is registered in da830_init_time() */ + platform_device_register(&da830_psc0_device); + platform_device_register(&da830_psc1_device); } diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h index 9fd6d0125762..64861ac6a9d4 100644 --- a/arch/arm/mach-davinci/include/mach/da8xx.h +++ b/arch/arm/mach-davinci/include/mach/da8xx.h @@ -89,6 +89,7 @@ extern unsigned int da850_max_speed; void da830_init(void); void da830_init_time(void); +void da830_register_clocks(void); void da850_init(void); void da850_init_time(void); From 482db8893ee4fa777e2256dd66ba207e719777dc Mon Sep 17 00:00:00 2001 From: David Lechner Date: Fri, 18 May 2018 11:48:08 -0500 Subject: [PATCH 034/112] ARM: davinci: da850: add new clock init using common clock framework This adds the new board-specific clock init in mach-davinci/da850.c using the new common clock framework drivers. The #ifdefs are needed to prevent compile errors until the entire ARCH_DAVINCI is converted. Also clean up the #includes since we are adding some here. Some CFGCHIP macros were removed because we are now including linux/mfd/da8xx-cfgchip.h which defines the same values. Reviewed-by: Sekhar Nori Signed-off-by: David Lechner Signed-off-by: Sekhar Nori --- arch/arm/mach-davinci/board-da850-evm.c | 2 + arch/arm/mach-davinci/board-mityomapl138.c | 2 + arch/arm/mach-davinci/board-omapl138-hawk.c | 2 + arch/arm/mach-davinci/da850.c | 157 ++++++++++++++++++-- arch/arm/mach-davinci/da8xx-dt.c | 2 + arch/arm/mach-davinci/include/mach/da8xx.h | 1 + 6 files changed, 152 insertions(+), 14 deletions(-) diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c index e22fb40e34bc..442c16773f09 100644 --- a/arch/arm/mach-davinci/board-da850-evm.c +++ b/arch/arm/mach-davinci/board-da850-evm.c @@ -1340,6 +1340,8 @@ static __init void da850_evm_init(void) { int ret; + da850_register_clocks(); + ret = da850_register_gpio(); if (ret) pr_warn("%s: GPIO init failed: %d\n", __func__, ret); diff --git a/arch/arm/mach-davinci/board-mityomapl138.c b/arch/arm/mach-davinci/board-mityomapl138.c index 37b3e48a21d1..2cce0d7d2f2a 100644 --- a/arch/arm/mach-davinci/board-mityomapl138.c +++ b/arch/arm/mach-davinci/board-mityomapl138.c @@ -503,6 +503,8 @@ static void __init mityomapl138_init(void) { int ret; + da850_register_clocks(); + /* for now, no special EDMA channels are reserved */ ret = da850_register_edma(NULL); if (ret) diff --git a/arch/arm/mach-davinci/board-omapl138-hawk.c b/arch/arm/mach-davinci/board-omapl138-hawk.c index be8b892a6ea7..7653e9425d44 100644 --- a/arch/arm/mach-davinci/board-omapl138-hawk.c +++ b/arch/arm/mach-davinci/board-omapl138-hawk.c @@ -285,6 +285,8 @@ static __init void omapl138_hawk_init(void) { int ret; + da850_register_clocks(); + ret = da850_register_gpio(); if (ret) pr_warn("%s: GPIO init failed: %d\n", __func__, ret); diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c index 1dbf01c4124b..9e00beb943c9 100644 --- a/arch/arm/mach-davinci/da850.c +++ b/arch/arm/mach-davinci/da850.c @@ -11,39 +11,45 @@ * is licensed "as is" without any warranty of any kind, whether express * or implied. */ + +#include +#include #include +#include #include #include -#include -#include -#include -#include +#include +#include +#include #include +#include +#include +#include #include -#include "psc.h" -#include -#include #include -#include -#include #include +#include +#include +#include #include +#include -#include "clock.h" #include "mux.h" +#ifndef CONFIG_COMMON_CLK +#include "clock.h" +#include "psc.h" +#endif + #define DA850_PLL1_BASE 0x01e1a000 #define DA850_TIMER64P2_BASE 0x01f0c000 #define DA850_TIMER64P3_BASE 0x01f0d000 #define DA850_REF_FREQ 24000000 -#define CFGCHIP3_ASYNC3_CLKSRC BIT(4) -#define CFGCHIP3_PLL1_MASTER_LOCK BIT(5) -#define CFGCHIP0_PLL_MASTER_LOCK BIT(4) - +#ifndef CONFIG_COMMON_CLK static int da850_set_armrate(struct clk *clk, unsigned long rate); static int da850_round_armrate(struct clk *clk, unsigned long rate); static int da850_set_pll0rate(struct clk *clk, unsigned long armrate); @@ -583,6 +589,7 @@ static struct clk_lookup da850_clks[] = { CLK("ecap.2", "fck", &ecap2_clk), CLK(NULL, NULL, NULL), }; +#endif /* * Device specific mux setup @@ -1170,6 +1177,7 @@ int da850_register_cpufreq(char *async_clk) return platform_device_register(&da850_cpufreq_device); } +#ifndef CONFIG_COMMON_CLK static int da850_round_armrate(struct clk *clk, unsigned long rate) { int ret = 0, diff; @@ -1232,12 +1240,14 @@ static int da850_set_pll0rate(struct clk *clk, unsigned long rate) return 0; } +#endif /* CONFIG_COMMON_CLK */ #else int __init da850_register_cpufreq(char *async_clk) { return 0; } +#ifndef CONFIG_COMMON_CLK static int da850_set_armrate(struct clk *clk, unsigned long rate) { return -EINVAL; @@ -1252,6 +1262,7 @@ static int da850_round_armrate(struct clk *clk, unsigned long rate) { return clk->rate; } +#endif /* CONFIG_COMMON_CLK */ #endif /* VPIF resource, platform data */ @@ -1395,6 +1406,124 @@ void __init da850_init(void) void __init da850_init_time(void) { +#ifdef CONFIG_COMMON_CLK + void __iomem *pll0; + struct regmap *cfgchip; + struct clk *clk; + + clk_register_fixed_rate(NULL, "ref_clk", NULL, 0, DA850_REF_FREQ); + + pll0 = ioremap(DA8XX_PLL0_BASE, SZ_4K); + cfgchip = da8xx_get_cfgchip(); + + da850_pll0_init(NULL, pll0, cfgchip); + + clk = clk_get(NULL, "timer0"); + + davinci_timer_init(clk); +#else davinci_clk_init(da850_clks); davinci_timer_init(&timerp64_0_clk); +#endif +} + +static struct resource da850_pll1_resources[] = { + { + .start = DA850_PLL1_BASE, + .end = DA850_PLL1_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, +}; + +static struct davinci_pll_platform_data da850_pll1_pdata; + +static struct platform_device da850_pll1_device = { + .name = "da850-pll1", + .id = -1, + .resource = da850_pll1_resources, + .num_resources = ARRAY_SIZE(da850_pll1_resources), + .dev = { + .platform_data = &da850_pll1_pdata, + }, +}; + +static struct resource da850_psc0_resources[] = { + { + .start = DA8XX_PSC0_BASE, + .end = DA8XX_PSC0_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device da850_psc0_device = { + .name = "da850-psc0", + .id = -1, + .resource = da850_psc0_resources, + .num_resources = ARRAY_SIZE(da850_psc0_resources), +}; + +static struct resource da850_psc1_resources[] = { + { + .start = DA8XX_PSC1_BASE, + .end = DA8XX_PSC1_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device da850_psc1_device = { + .name = "da850-psc1", + .id = -1, + .resource = da850_psc1_resources, + .num_resources = ARRAY_SIZE(da850_psc1_resources), +}; + +static struct da8xx_cfgchip_clk_platform_data da850_async1_pdata; + +static struct platform_device da850_async1_clksrc_device = { + .name = "da850-async1-clksrc", + .id = -1, + .dev = { + .platform_data = &da850_async1_pdata, + }, +}; + +static struct da8xx_cfgchip_clk_platform_data da850_async3_pdata; + +static struct platform_device da850_async3_clksrc_device = { + .name = "da850-async3-clksrc", + .id = -1, + .dev = { + .platform_data = &da850_async3_pdata, + }, +}; + +static struct da8xx_cfgchip_clk_platform_data da850_tbclksync_pdata; + +static struct platform_device da850_tbclksync_device = { + .name = "da830-tbclksync", + .id = -1, + .dev = { + .platform_data = &da850_tbclksync_pdata, + }, +}; + +void __init da850_register_clocks(void) +{ + /* PLL0 is registered in da850_init_time() */ + + da850_pll1_pdata.cfgchip = da8xx_get_cfgchip(); + platform_device_register(&da850_pll1_device); + + da850_async1_pdata.cfgchip = da8xx_get_cfgchip(); + platform_device_register(&da850_async1_clksrc_device); + + da850_async3_pdata.cfgchip = da8xx_get_cfgchip(); + platform_device_register(&da850_async3_clksrc_device); + + platform_device_register(&da850_psc0_device); + + platform_device_register(&da850_psc1_device); + + da850_tbclksync_pdata.cfgchip = da8xx_get_cfgchip(); + platform_device_register(&da850_tbclksync_device); } diff --git a/arch/arm/mach-davinci/da8xx-dt.c b/arch/arm/mach-davinci/da8xx-dt.c index ab199f4b9ce4..91dd9cb6d113 100644 --- a/arch/arm/mach-davinci/da8xx-dt.c +++ b/arch/arm/mach-davinci/da8xx-dt.c @@ -67,6 +67,8 @@ static void __init da850_init_machine(void) int ret; + da850_register_clocks(); + ret = da8xx_register_usb20_phy_clk(false); if (ret) pr_warn("%s: registering USB 2.0 PHY clock failed: %d", diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h index 64861ac6a9d4..612e45437cec 100644 --- a/arch/arm/mach-davinci/include/mach/da8xx.h +++ b/arch/arm/mach-davinci/include/mach/da8xx.h @@ -93,6 +93,7 @@ void da830_register_clocks(void); void da850_init(void); void da850_init_time(void); +void da850_register_clocks(void); int da830_register_edma(struct edma_rsv_info *rsv); int da850_register_edma(struct edma_rsv_info *rsv[2]); From 5b19f66d63b44ca38953b157e81595fb1e985762 Mon Sep 17 00:00:00 2001 From: David Lechner Date: Fri, 18 May 2018 11:48:09 -0500 Subject: [PATCH 035/112] ARM: davinci: dm355: add new clock init using common clock framework This adds the new board-specific clock init in mach-davinci/dm355.c using the new common clock framework drivers. The #ifdefs are needed to prevent compile errors until the entire ARCH_DAVINCI is converted. Also clean up the #includes since we are adding some here. Signed-off-by: David Lechner Signed-off-by: Sekhar Nori --- arch/arm/mach-davinci/board-dm355-evm.c | 2 + arch/arm/mach-davinci/board-dm355-leopard.c | 2 + arch/arm/mach-davinci/davinci.h | 1 + arch/arm/mach-davinci/dm355.c | 75 ++++++++++++++++----- 4 files changed, 65 insertions(+), 15 deletions(-) diff --git a/arch/arm/mach-davinci/board-dm355-evm.c b/arch/arm/mach-davinci/board-dm355-evm.c index a3377f959444..f53a461a606f 100644 --- a/arch/arm/mach-davinci/board-dm355-evm.c +++ b/arch/arm/mach-davinci/board-dm355-evm.c @@ -394,6 +394,8 @@ static __init void dm355_evm_init(void) struct clk *aemif; int ret; + dm355_register_clocks(); + ret = dm355_gpio_register(); if (ret) pr_warn("%s: GPIO init failed: %d\n", __func__, ret); diff --git a/arch/arm/mach-davinci/board-dm355-leopard.c b/arch/arm/mach-davinci/board-dm355-leopard.c index 8249a0bf69f0..0fdf1d03eb11 100644 --- a/arch/arm/mach-davinci/board-dm355-leopard.c +++ b/arch/arm/mach-davinci/board-dm355-leopard.c @@ -234,6 +234,8 @@ static __init void dm355_leopard_init(void) struct clk *aemif; int ret; + dm355_register_clocks(); + ret = dm355_gpio_register(); if (ret) pr_warn("%s: GPIO init failed: %d\n", __func__, ret); diff --git a/arch/arm/mach-davinci/davinci.h b/arch/arm/mach-davinci/davinci.h index 376cdd51ce9d..c2c634b6578e 100644 --- a/arch/arm/mach-davinci/davinci.h +++ b/arch/arm/mach-davinci/davinci.h @@ -84,6 +84,7 @@ int davinci_init_wdt(void); /* DM355 function declarations */ void dm355_init(void); void dm355_init_time(void); +void dm355_register_clocks(void); void dm355_init_spi0(unsigned chipselect_mask, const struct spi_board_info *info, unsigned len); void dm355_init_asp1(u32 evt_enable); diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c index 0da7516018ca..14014b942e8a 100644 --- a/arch/arm/mach-davinci/dm355.c +++ b/arch/arm/mach-davinci/dm355.c @@ -8,31 +8,37 @@ * is licensed "as is" without any warranty of any kind, whether express * or implied. */ -#include -#include -#include -#include + +#include +#include +#include #include #include -#include +#include #include #include #include +#include +#include +#include #include -#include -#include "psc.h" -#include -#include -#include -#include #include +#include +#include +#include +#include +#include -#include "davinci.h" -#include "clock.h" -#include "mux.h" #include "asp.h" +#include "davinci.h" +#include "mux.h" + +#ifndef CONFIG_COMMON_CLK +#include "clock.h" +#include "psc.h" +#endif #define DM355_UART2_BASE (IO_PHYS + 0x206000) #define DM355_OSD_BASE (IO_PHYS + 0x70200) @@ -43,6 +49,7 @@ */ #define DM355_REF_FREQ 24000000 /* 24 or 36 MHz */ +#ifndef CONFIG_COMMON_CLK static struct pll_data pll1_data = { .num = 1, .phys_base = DAVINCI_PLL1_BASE, @@ -382,7 +389,7 @@ static struct clk_lookup dm355_clks[] = { CLK(NULL, "usb", &usb_clk), CLK(NULL, NULL, NULL), }; - +#endif /*----------------------------------------------------------------------*/ static u64 dm355_spi0_dma_mask = DMA_BIT_MASK(32); @@ -1046,8 +1053,46 @@ void __init dm355_init(void) void __init dm355_init_time(void) { +#ifdef CONFIG_COMMON_CLK + void __iomem *pll1, *psc; + struct clk *clk; + + clk_register_fixed_rate(NULL, "ref_clk", NULL, 0, DM355_REF_FREQ); + + pll1 = ioremap(DAVINCI_PLL1_BASE, SZ_1K); + dm355_pll1_init(NULL, pll1, NULL); + + psc = ioremap(DAVINCI_PWR_SLEEP_CNTRL_BASE, SZ_4K); + dm355_psc_init(NULL, psc); + + clk = clk_get(NULL, "timer0"); + + davinci_timer_init(clk); +#else davinci_clk_init(dm355_clks); davinci_timer_init(&timer0_clk); +#endif +} + +static struct resource dm355_pll2_resources[] = { + { + .start = DAVINCI_PLL2_BASE, + .end = DAVINCI_PLL2_BASE + SZ_1K - 1, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device dm355_pll2_device = { + .name = "dm355-pll2", + .id = -1, + .resource = dm355_pll2_resources, + .num_resources = ARRAY_SIZE(dm355_pll2_resources), +}; + +void __init dm355_register_clocks(void) +{ + /* PLL1 and PSC are registered in dm355_init_time() */ + platform_device_register(&dm355_pll2_device); } int __init dm355_init_video(struct vpfe_config *vpfe_cfg, From 21c2f4773dd0c45899a524a4a7f70dd32db4c1a1 Mon Sep 17 00:00:00 2001 From: David Lechner Date: Fri, 18 May 2018 11:48:10 -0500 Subject: [PATCH 036/112] ARM: davinci: dm365: add new clock init using common clock framework This adds the new board-specific clock init in mach-davinci/dm365.c using the new common clock framework drivers. The #ifdefs are needed to prevent compile errors until the entire ARCH_DAVINCI is converted. Also clean up the #includes since we are adding some here. Signed-off-by: David Lechner Signed-off-by: Sekhar Nori --- arch/arm/mach-davinci/board-dm365-evm.c | 2 + arch/arm/mach-davinci/davinci.h | 1 + arch/arm/mach-davinci/dm365.c | 62 +++++++++++++++++++------ 3 files changed, 50 insertions(+), 15 deletions(-) diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c index 435f7ec7d9af..307e88d99dd3 100644 --- a/arch/arm/mach-davinci/board-dm365-evm.c +++ b/arch/arm/mach-davinci/board-dm365-evm.c @@ -742,6 +742,8 @@ static __init void dm365_evm_init(void) { int ret; + dm365_register_clocks(); + ret = dm365_gpio_register(); if (ret) pr_warn("%s: GPIO init failed: %d\n", __func__, ret); diff --git a/arch/arm/mach-davinci/davinci.h b/arch/arm/mach-davinci/davinci.h index c2c634b6578e..a799b5266d4b 100644 --- a/arch/arm/mach-davinci/davinci.h +++ b/arch/arm/mach-davinci/davinci.h @@ -94,6 +94,7 @@ int dm355_gpio_register(void); /* DM365 function declarations */ void dm365_init(void); void dm365_init_time(void); +void dm365_register_clocks(void); void dm365_init_asp(void); void dm365_init_vc(void); void dm365_init_ks(struct davinci_ks_platform_data *pdata); diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c index 871372a59da8..76de426a0e41 100644 --- a/arch/arm/mach-davinci/dm365.c +++ b/arch/arm/mach-davinci/dm365.c @@ -12,32 +12,38 @@ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ -#include -#include -#include -#include + +#include +#include +#include #include #include -#include +#include #include #include #include #include +#include +#include +#include #include -#include -#include "psc.h" -#include -#include -#include -#include #include +#include +#include +#include +#include +#include -#include "davinci.h" -#include "clock.h" -#include "mux.h" #include "asp.h" +#include "davinci.h" +#include "mux.h" + +#ifndef CONFIG_COMMON_CLK +#include "clock.h" +#include "psc.h" +#endif #define DM365_REF_FREQ 24000000 /* 24 MHz on the DM365 EVM */ #define DM365_RTC_BASE 0x01c69000 @@ -54,6 +60,7 @@ #define DM365_EMAC_CNTRL_RAM_OFFSET 0x1000 #define DM365_EMAC_CNTRL_RAM_SIZE 0x2000 +#ifndef CONFIG_COMMON_CLK static struct pll_data pll1_data = { .num = 1, .phys_base = DAVINCI_PLL1_BASE, @@ -485,7 +492,7 @@ static struct clk_lookup dm365_clks[] = { CLK(NULL, "mjcp", &mjcp_clk), CLK(NULL, NULL, NULL), }; - +#endif /*----------------------------------------------------------------------*/ #define INTMUX 0x18 @@ -1171,8 +1178,33 @@ void __init dm365_init(void) void __init dm365_init_time(void) { +#ifdef CONFIG_COMMON_CLK + void __iomem *pll1, *pll2, *psc; + struct clk *clk; + + clk_register_fixed_rate(NULL, "ref_clk", NULL, 0, DM365_REF_FREQ); + + pll1 = ioremap(DAVINCI_PLL1_BASE, SZ_1K); + dm365_pll1_init(NULL, pll1, NULL); + + pll2 = ioremap(DAVINCI_PLL2_BASE, SZ_1K); + dm365_pll2_init(NULL, pll2, NULL); + + psc = ioremap(DAVINCI_PWR_SLEEP_CNTRL_BASE, SZ_4K); + dm365_psc_init(NULL, psc); + + clk = clk_get(NULL, "timer0"); + + davinci_timer_init(clk); +#else davinci_clk_init(dm365_clks); davinci_timer_init(&timer0_clk); +#endif +} + +void __init dm365_register_clocks(void) +{ + /* all clocks are currently registered in dm365_init_time() */ } static struct resource dm365_vpss_resources[] = { From a5b1a87199ac7ee35e69bcf00410abf2ab22483f Mon Sep 17 00:00:00 2001 From: David Lechner Date: Fri, 18 May 2018 11:48:11 -0500 Subject: [PATCH 037/112] ARM: davinci: dm644x: add new clock init using common clock framework This adds the new board-specific clock init in mach-davinci/dm644x.c using the new common clock framework drivers. The #ifdefs are needed to prevent compile errors until the entire ARCH_DAVINCI is converted. Also clean up the #includes since we are adding some here. Signed-off-by: David Lechner Signed-off-by: Sekhar Nori --- arch/arm/mach-davinci/board-dm644x-evm.c | 2 + arch/arm/mach-davinci/board-neuros-osd2.c | 2 + arch/arm/mach-davinci/board-sffsdr.c | 2 + arch/arm/mach-davinci/davinci.h | 1 + arch/arm/mach-davinci/dm644x.c | 66 +++++++++++++++++++---- 5 files changed, 63 insertions(+), 10 deletions(-) diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c index 48436f74fd71..738e443ab15f 100644 --- a/arch/arm/mach-davinci/board-dm644x-evm.c +++ b/arch/arm/mach-davinci/board-dm644x-evm.c @@ -773,6 +773,8 @@ static __init void davinci_evm_init(void) struct clk *aemif_clk; struct davinci_soc_info *soc_info = &davinci_soc_info; + dm644x_register_clocks(); + dm644x_init_devices(); ret = dm644x_gpio_register(); diff --git a/arch/arm/mach-davinci/board-neuros-osd2.c b/arch/arm/mach-davinci/board-neuros-osd2.c index 25ad9b0612be..353f9e5a1454 100644 --- a/arch/arm/mach-davinci/board-neuros-osd2.c +++ b/arch/arm/mach-davinci/board-neuros-osd2.c @@ -175,6 +175,8 @@ static __init void davinci_ntosd2_init(void) struct clk *aemif_clk; struct davinci_soc_info *soc_info = &davinci_soc_info; + dm644x_register_clocks(); + dm644x_init_devices(); ret = dm644x_gpio_register(); diff --git a/arch/arm/mach-davinci/board-sffsdr.c b/arch/arm/mach-davinci/board-sffsdr.c index e7c1728b0833..792bb84d5011 100644 --- a/arch/arm/mach-davinci/board-sffsdr.c +++ b/arch/arm/mach-davinci/board-sffsdr.c @@ -134,6 +134,8 @@ static __init void davinci_sffsdr_init(void) { struct davinci_soc_info *soc_info = &davinci_soc_info; + dm644x_register_clocks(); + dm644x_init_devices(); platform_add_devices(davinci_sffsdr_devices, diff --git a/arch/arm/mach-davinci/davinci.h b/arch/arm/mach-davinci/davinci.h index a799b5266d4b..16aca5853ab2 100644 --- a/arch/arm/mach-davinci/davinci.h +++ b/arch/arm/mach-davinci/davinci.h @@ -108,6 +108,7 @@ int dm365_gpio_register(void); void dm644x_init(void); void dm644x_init_devices(void); void dm644x_init_time(void); +void dm644x_register_clocks(void); void dm644x_init_asp(void); int dm644x_init_video(struct vpfe_config *, struct vpbe_config *); int dm644x_gpio_register(void); diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c index 708df0ed8554..c3cd27c6cd70 100644 --- a/arch/arm/mach-davinci/dm644x.c +++ b/arch/arm/mach-davinci/dm644x.c @@ -8,28 +8,34 @@ * is licensed "as is" without any warranty of any kind, whether express * or implied. */ -#include -#include -#include + +#include +#include +#include #include -#include +#include #include #include +#include +#include #include +#include #include #include -#include "psc.h" #include -#include #include -#include +#include -#include "davinci.h" -#include "clock.h" -#include "mux.h" #include "asp.h" +#include "davinci.h" +#include "mux.h" + +#ifndef CONFIG_COMMON_CLK +#include "clock.h" +#include "psc.h" +#endif /* * Device specific clocks @@ -43,6 +49,7 @@ #define DM644X_EMAC_CNTRL_RAM_OFFSET 0x2000 #define DM644X_EMAC_CNTRL_RAM_SIZE 0x2000 +#ifndef CONFIG_COMMON_CLK static struct pll_data pll1_data = { .num = 1, .phys_base = DAVINCI_PLL1_BASE, @@ -326,6 +333,7 @@ static struct clk_lookup dm644x_clks[] = { CLK("davinci-wdt", NULL, &timer2_clk), CLK(NULL, NULL, NULL), }; +#endif static struct emac_platform_data dm644x_emac_pdata = { .ctrl_reg_offset = DM644X_EMAC_CNTRL_OFFSET, @@ -934,8 +942,46 @@ void __init dm644x_init(void) void __init dm644x_init_time(void) { +#ifdef CONFIG_COMMON_CLK + void __iomem *pll1, *psc; + struct clk *clk; + + clk_register_fixed_rate(NULL, "ref_clk", NULL, 0, DM644X_REF_FREQ); + + pll1 = ioremap(DAVINCI_PLL1_BASE, SZ_1K); + dm644x_pll1_init(NULL, pll1, NULL); + + psc = ioremap(DAVINCI_PWR_SLEEP_CNTRL_BASE, SZ_4K); + dm644x_psc_init(NULL, psc); + + clk = clk_get(NULL, "timer0"); + + davinci_timer_init(clk); +#else davinci_clk_init(dm644x_clks); davinci_timer_init(&timer0_clk); +#endif +} + +static struct resource dm644x_pll2_resources[] = { + { + .start = DAVINCI_PLL2_BASE, + .end = DAVINCI_PLL2_BASE + SZ_1K - 1, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device dm644x_pll2_device = { + .name = "dm644x-pll2", + .id = -1, + .resource = dm644x_pll2_resources, + .num_resources = ARRAY_SIZE(dm644x_pll2_resources), +}; + +void __init dm644x_register_clocks(void) +{ + /* PLL1 and PSC are registered in dm644x_init_time() */ + platform_device_register(&dm644x_pll2_device); } int __init dm644x_init_video(struct vpfe_config *vpfe_cfg, From 81df7d85364f28df6e13a76c7119533140a3b176 Mon Sep 17 00:00:00 2001 From: David Lechner Date: Fri, 18 May 2018 11:48:12 -0500 Subject: [PATCH 038/112] ARM: davinci: dm646x: add new clock init using common clock framework This adds the new board-specific clock init in mach-davinci/dm646x.c using the new common clock framework drivers. The #ifdefs are needed to prevent compile errors until the entire ARCH_DAVINCI is converted. Also clean up the #includes since we are adding some here. Signed-off-by: David Lechner Signed-off-by: Sekhar Nori --- arch/arm/mach-davinci/board-dm646x-evm.c | 2 + arch/arm/mach-davinci/davinci.h | 1 + arch/arm/mach-davinci/dm646x.c | 65 ++++++++++++++++++++---- 3 files changed, 59 insertions(+), 9 deletions(-) diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c index 584064fdabf5..867ab2fa6cfd 100644 --- a/arch/arm/mach-davinci/board-dm646x-evm.c +++ b/arch/arm/mach-davinci/board-dm646x-evm.c @@ -776,6 +776,8 @@ static __init void evm_init(void) int ret; struct davinci_soc_info *soc_info = &davinci_soc_info; + dm646x_register_clocks(); + ret = dm646x_gpio_register(); if (ret) pr_warn("%s: GPIO init failed: %d\n", __func__, ret); diff --git a/arch/arm/mach-davinci/davinci.h b/arch/arm/mach-davinci/davinci.h index 16aca5853ab2..fa99197d36f9 100644 --- a/arch/arm/mach-davinci/davinci.h +++ b/arch/arm/mach-davinci/davinci.h @@ -116,6 +116,7 @@ int dm644x_gpio_register(void); /* DM646x function declarations */ void dm646x_init(void); void dm646x_init_time(unsigned long ref_clk_rate, unsigned long aux_clkin_rate); +void dm646x_register_clocks(void); void dm646x_init_mcasp0(struct snd_platform_data *pdata); void dm646x_init_mcasp1(struct snd_platform_data *pdata); int dm646x_init_edma(struct edma_rsv_info *rsv); diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c index 280b753702f3..f05090317469 100644 --- a/arch/arm/mach-davinci/dm646x.c +++ b/arch/arm/mach-davinci/dm646x.c @@ -8,29 +8,35 @@ * is licensed "as is" without any warranty of any kind, whether express * or implied. */ + +#include +#include +#include #include #include #include -#include -#include -#include #include #include +#include +#include #include +#include #include #include -#include "psc.h" #include -#include #include -#include +#include -#include "davinci.h" -#include "clock.h" -#include "mux.h" #include "asp.h" +#include "davinci.h" +#include "mux.h" + +#ifndef CONFIG_COMMON_CLK +#include "clock.h" +#include "psc.h" +#endif #define DAVINCI_VPIF_BASE (0x01C12000) @@ -46,6 +52,7 @@ #define DM646X_EMAC_CNTRL_RAM_OFFSET 0x2000 #define DM646X_EMAC_CNTRL_RAM_SIZE 0x2000 +#ifndef CONFIG_COMMON_CLK static struct pll_data pll1_data = { .num = 1, .phys_base = DAVINCI_PLL1_BASE, @@ -356,6 +363,7 @@ static struct clk_lookup dm646x_clks[] = { CLK(NULL, "vpif1", &vpif1_clk), CLK(NULL, NULL, NULL), }; +#endif static struct emac_platform_data dm646x_emac_pdata = { .ctrl_reg_offset = DM646X_EMAC_CNTRL_OFFSET, @@ -954,10 +962,49 @@ void __init dm646x_init(void) void __init dm646x_init_time(unsigned long ref_clk_rate, unsigned long aux_clkin_rate) { +#ifdef CONFIG_COMMON_CLK + void __iomem *pll1, *psc; + struct clk *clk; + + clk_register_fixed_rate(NULL, "ref_clk", NULL, 0, ref_clk_rate); + clk_register_fixed_rate(NULL, "aux_clkin", NULL, 0, aux_clkin_rate); + + pll1 = ioremap(DAVINCI_PLL1_BASE, SZ_1K); + dm646x_pll1_init(NULL, pll1, NULL); + + psc = ioremap(DAVINCI_PWR_SLEEP_CNTRL_BASE, SZ_4K); + dm646x_psc_init(NULL, psc); + + clk = clk_get(NULL, "timer0"); + + davinci_timer_init(clk); +#else ref_clk.rate = ref_clk_rate; aux_clkin.rate = aux_clkin_rate; davinci_clk_init(dm646x_clks); davinci_timer_init(&timer0_clk); +#endif +} + +static struct resource dm646x_pll2_resources[] = { + { + .start = DAVINCI_PLL2_BASE, + .end = DAVINCI_PLL2_BASE + SZ_1K - 1, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device dm646x_pll2_device = { + .name = "dm646x-pll2", + .id = -1, + .resource = dm646x_pll2_resources, + .num_resources = ARRAY_SIZE(dm646x_pll2_resources), +}; + +void __init dm646x_register_clocks(void) +{ + /* PLL1 and PSC are registered in dm646x_init_time() */ + platform_device_register(&dm646x_pll2_device); } static int __init dm646x_init_devices(void) From 5411bad4ea16622d4204dc590567000b194e5cc2 Mon Sep 17 00:00:00 2001 From: David Lechner Date: Fri, 18 May 2018 11:48:13 -0500 Subject: [PATCH 039/112] ARM: davinci: da8xx: add new USB PHY clock init using common clock framework This adds the new USB PHY clock init in mach-davinci/usb-da8xx.c using the new common clock framework drivers. The #ifdefs are needed to prevent compile errors until the entire ARCH_DAVINCI is converted. Signed-off-by: David Lechner Signed-off-by: Sekhar Nori --- arch/arm/mach-davinci/board-da830-evm.c | 8 ++++++- arch/arm/mach-davinci/board-omapl138-hawk.c | 9 +++++-- arch/arm/mach-davinci/da8xx-dt.c | 8 ++++++- arch/arm/mach-davinci/include/mach/da8xx.h | 1 + arch/arm/mach-davinci/usb-da8xx.c | 26 +++++++++++++++++++-- 5 files changed, 46 insertions(+), 6 deletions(-) diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c index 74df37821abe..ccddbae951d6 100644 --- a/arch/arm/mach-davinci/board-da830-evm.c +++ b/arch/arm/mach-davinci/board-da830-evm.c @@ -110,6 +110,12 @@ static __init void da830_evm_usb_init(void) { int ret; +#ifdef CONFIG_COMMON_CLK + ret = da8xx_register_usb_phy_clocks(); + if (ret) + pr_warn("%s: USB PHY CLK registration failed: %d\n", + __func__, ret); +#else /* USB_REFCLKIN is not used. */ ret = da8xx_register_usb20_phy_clk(false); if (ret) @@ -120,7 +126,7 @@ static __init void da830_evm_usb_init(void) if (ret) pr_warn("%s: USB 1.1 PHY CLK registration failed: %d\n", __func__, ret); - +#endif ret = da8xx_register_usb_phy(); if (ret) pr_warn("%s: USB PHY registration failed: %d\n", diff --git a/arch/arm/mach-davinci/board-omapl138-hawk.c b/arch/arm/mach-davinci/board-omapl138-hawk.c index 7653e9425d44..949ca567e965 100644 --- a/arch/arm/mach-davinci/board-omapl138-hawk.c +++ b/arch/arm/mach-davinci/board-omapl138-hawk.c @@ -235,7 +235,12 @@ static __init void omapl138_hawk_usb_init(void) pr_warn("%s: USB 1.1 PinMux setup failed: %d\n", __func__, ret); return; } - +#ifdef CONFIG_COMMON_CLK + ret = da8xx_register_usb_phy_clocks(); + if (ret) + pr_warn("%s: USB PHY CLK registration failed: %d\n", + __func__, ret); +#else ret = da8xx_register_usb20_phy_clk(false); if (ret) pr_warn("%s: USB 2.0 PHY CLK registration failed: %d\n", @@ -245,7 +250,7 @@ static __init void omapl138_hawk_usb_init(void) if (ret) pr_warn("%s: USB 1.1 PHY CLK registration failed: %d\n", __func__, ret); - +#endif ret = da8xx_register_usb_phy(); if (ret) pr_warn("%s: USB PHY registration failed: %d\n", diff --git a/arch/arm/mach-davinci/da8xx-dt.c b/arch/arm/mach-davinci/da8xx-dt.c index 91dd9cb6d113..c4edf051ef9b 100644 --- a/arch/arm/mach-davinci/da8xx-dt.c +++ b/arch/arm/mach-davinci/da8xx-dt.c @@ -69,6 +69,12 @@ static void __init da850_init_machine(void) da850_register_clocks(); +#ifdef CONFIG_COMMON_CLK + ret = da8xx_register_usb_phy_clocks(); + if (ret) + pr_warn("%s: USB PHY CLK registration failed: %d\n", + __func__, ret); +#else ret = da8xx_register_usb20_phy_clk(false); if (ret) pr_warn("%s: registering USB 2.0 PHY clock failed: %d", @@ -77,7 +83,7 @@ static void __init da850_init_machine(void) if (ret) pr_warn("%s: registering USB 1.1 PHY clock failed: %d", __func__, ret); - +#endif ret = da850_register_sata_refclk(sata_refclkpn); if (ret) pr_warn("%s: registering SATA REFCLK failed: %d", diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h index 612e45437cec..5d7b1de9aa7e 100644 --- a/arch/arm/mach-davinci/include/mach/da8xx.h +++ b/arch/arm/mach-davinci/include/mach/da8xx.h @@ -106,6 +106,7 @@ int da8xx_register_usb11(struct da8xx_ohci_root_hub *pdata); int da8xx_register_usb_refclkin(int rate); int da8xx_register_usb20_phy_clk(bool use_usb_refclkin); int da8xx_register_usb11_phy_clk(bool use_usb_refclkin); +int da8xx_register_usb_phy_clocks(void); int da850_register_sata_refclk(int rate); int da8xx_register_emac(void); int da8xx_register_uio_pruss(void); diff --git a/arch/arm/mach-davinci/usb-da8xx.c b/arch/arm/mach-davinci/usb-da8xx.c index 50445f0e98de..c8d2f3075e69 100644 --- a/arch/arm/mach-davinci/usb-da8xx.c +++ b/arch/arm/mach-davinci/usb-da8xx.c @@ -2,29 +2,35 @@ /* * DA8xx USB */ -#include +#include #include #include #include #include +#include #include +#include #include #include #include #include -#include #include #include #include #include +#ifndef CONFIG_COMMON_CLK +#include #include "clock.h" +#endif #define DA8XX_USB0_BASE 0x01e00000 #define DA8XX_USB1_BASE 0x01e25000 +#ifndef CONFIG_COMMON_CLK static struct clk *usb20_clk; +#endif static struct da8xx_usb_phy_platform_data da8xx_usb_phy_pdata; @@ -134,6 +140,7 @@ int __init da8xx_register_usb11(struct da8xx_ohci_root_hub *pdata) return platform_device_register(&da8xx_usb11_device); } +#ifndef CONFIG_COMMON_CLK static struct clk usb_refclkin = { .name = "usb_refclkin", .set_rate = davinci_simple_set_rate, @@ -360,3 +367,18 @@ int __init da8xx_register_usb11_phy_clk(bool use_usb_refclkin) return ret; } +#endif +static struct platform_device da8xx_usb_phy_clks_device = { + .name = "da830-usb-phy-clks", + .id = -1, +}; + +int __init da8xx_register_usb_phy_clocks(void) +{ + struct da8xx_cfgchip_clk_platform_data pdata; + + pdata.cfgchip = da8xx_get_cfgchip(); + da8xx_usb_phy_clks_device.dev.platform_data = &pdata; + + return platform_device_register(&da8xx_usb_phy_clks_device); +} From aa1da33c091b731f1e88d0c65ee9f285ac8dd5f9 Mon Sep 17 00:00:00 2001 From: David Lechner Date: Fri, 18 May 2018 11:48:14 -0500 Subject: [PATCH 040/112] ARM: davinci: da8xx: add new sata_refclk init using common clock framework This adds the new SATA REFCLK clock init in mach-davinci/devices-da8xx.c using the new common clock framework drivers. The #ifdefs are needed to prevent compile errors until the entire ARCH_DAVINCI is converted. Also, the #includes are sorted since we are adding some here. Signed-off-by: David Lechner Reviewed-by: Sekhar Nori Signed-off-by: Sekhar Nori --- arch/arm/mach-davinci/devices-da8xx.c | 36 ++++++++++++++++++++------- 1 file changed, 27 insertions(+), 9 deletions(-) diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c index 78390c64e6ca..73de449bbc68 100644 --- a/arch/arm/mach-davinci/devices-da8xx.c +++ b/arch/arm/mach-davinci/devices-da8xx.c @@ -10,25 +10,30 @@ * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. */ +#include +#include +#include +#include +#include +#include #include #include -#include -#include -#include -#include #include -#include +#include -#include #include -#include +#include #include -#include +#include + +#include "asp.h" #include "cpuidle.h" #include "sram.h" +#ifndef CONFIG_COMMON_CLK +#include #include "clock.h" -#include "asp.h" +#endif #define DA8XX_TPCC_BASE 0x01c00000 #define DA8XX_TPTC0_BASE 0x01c08000 @@ -1040,6 +1045,7 @@ int __init da8xx_register_spi_bus(int instance, unsigned num_chipselect) } #ifdef CONFIG_ARCH_DAVINCI_DA850 +#ifndef CONFIG_COMMON_CLK static struct clk sata_refclk = { .name = "sata_refclk", .set_rate = davinci_simple_set_rate, @@ -1061,6 +1067,18 @@ int __init da850_register_sata_refclk(int rate) return 0; } +#else +int __init da850_register_sata_refclk(int rate) +{ + struct clk *clk; + + clk = clk_register_fixed_rate(NULL, "sata_refclk", NULL, 0, rate); + if (IS_ERR(clk)) + return PTR_ERR(clk); + + return clk_register_clkdev(clk, "refclk", "ahci_da850"); +} +#endif static struct resource da850_sata_resources[] = { { From 4d7ee968edea20d5cd50a8e899920843884c1943 Mon Sep 17 00:00:00 2001 From: David Lechner Date: Fri, 18 May 2018 11:48:15 -0500 Subject: [PATCH 041/112] ARM: davinci: remove CONFIG_DAVINCI_RESET_CLOCKS The common clock framework will take care of disabling unused clocks when we switch from the legacy davinci clocks and having this enabled will cause compile errors after we switch, so remove it now. Signed-off-by: David Lechner Reviewed-by: Sekhar Nori Signed-off-by: Sekhar Nori --- arch/arm/mach-davinci/Kconfig | 12 ------------ arch/arm/mach-davinci/common.c | 1 - arch/arm/mach-davinci/include/mach/common.h | 6 ------ 3 files changed, 19 deletions(-) diff --git a/arch/arm/mach-davinci/Kconfig b/arch/arm/mach-davinci/Kconfig index 05c3eecf47cb..ba9912b4dfab 100644 --- a/arch/arm/mach-davinci/Kconfig +++ b/arch/arm/mach-davinci/Kconfig @@ -231,18 +231,6 @@ config DAVINCI_MUX_WARNINGS to change the pin multiplexing setup. When there are no warnings printed, it's safe to deselect DAVINCI_MUX for your product. -config DAVINCI_RESET_CLOCKS - bool "Reset unused clocks during boot" - depends on ARCH_DAVINCI - help - Say Y if you want to reset unused clocks during boot. - This option saves power, but assumes all drivers are - using the clock framework. Broken drivers that do not - yet use clock framework may not work with this option. - If you are booting from another operating system, you - probably do not want this option enabled until your - device drivers work properly. - endmenu endif diff --git a/arch/arm/mach-davinci/common.c b/arch/arm/mach-davinci/common.c index bcb6a7ba84e9..e03f95ccd95c 100644 --- a/arch/arm/mach-davinci/common.c +++ b/arch/arm/mach-davinci/common.c @@ -118,5 +118,4 @@ err: void __init davinci_init_late(void) { davinci_cpufreq_init(); - davinci_clk_disable_unused(); } diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h index 5f45d0ac66a8..ded8f5f42725 100644 --- a/arch/arm/mach-davinci/include/mach/common.h +++ b/arch/arm/mach-davinci/include/mach/common.h @@ -83,12 +83,6 @@ extern void davinci_common_init(const struct davinci_soc_info *soc_info); extern void davinci_init_ide(void); void davinci_init_late(void); -#ifdef CONFIG_DAVINCI_RESET_CLOCKS -int davinci_clk_disable_unused(void); -#else -static inline int davinci_clk_disable_unused(void) { return 0; } -#endif - #ifdef CONFIG_CPU_FREQ int davinci_cpufreq_init(void); #else From 27823278baa72edd776a4d2e195a29877f2975bd Mon Sep 17 00:00:00 2001 From: David Lechner Date: Fri, 18 May 2018 11:48:17 -0500 Subject: [PATCH 042/112] ARM: davinci: switch to common clock framework This switches ARCH_DAVINCI to use the common clock framework. The legacy clock code in arch/arm/mach-davinci/ is no longer used. New drivers in drivers/clk/davinci/ are used instead. A few macros had to be moved to prevent compilation errors. Signed-off-by: David Lechner Signed-off-by: Sekhar Nori --- arch/arm/Kconfig | 5 ++++- arch/arm/mach-davinci/Makefile | 4 ++-- arch/arm/mach-davinci/clock.h | 4 ---- arch/arm/mach-davinci/davinci.h | 4 ++++ arch/arm/mach-davinci/psc.h | 2 -- 5 files changed, 10 insertions(+), 9 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 54eeb8d00bc6..3d7b0fee739d 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -606,13 +606,16 @@ config ARCH_S3C24XX config ARCH_DAVINCI bool "TI DaVinci" select ARCH_HAS_HOLES_MEMORYMODEL - select CLKDEV_LOOKUP + select COMMON_CLK select CPU_ARM926T select GENERIC_ALLOCATOR select GENERIC_CLOCKEVENTS select GENERIC_IRQ_CHIP select GPIOLIB select HAVE_IDE + select PM_GENERIC_DOMAINS if PM + select PM_GENERIC_DOMAINS_OF if PM && OF + select RESET_CONTROLLER select USE_OF select ZONE_DMA help diff --git a/arch/arm/mach-davinci/Makefile b/arch/arm/mach-davinci/Makefile index 4e8178050027..8725d8bea567 100644 --- a/arch/arm/mach-davinci/Makefile +++ b/arch/arm/mach-davinci/Makefile @@ -5,8 +5,8 @@ # # Common objects -obj-y := time.o clock.o serial.o psc.o \ - usb.o common.o sram.o aemif.o +obj-y := time.o serial.o usb.o \ + common.o sram.o aemif.o obj-$(CONFIG_DAVINCI_MUX) += mux.o diff --git a/arch/arm/mach-davinci/clock.h b/arch/arm/mach-davinci/clock.h index d7894d5aaa25..2d058568e004 100644 --- a/arch/arm/mach-davinci/clock.h +++ b/arch/arm/mach-davinci/clock.h @@ -12,10 +12,6 @@ #ifndef __ARCH_ARM_DAVINCI_CLOCK_H #define __ARCH_ARM_DAVINCI_CLOCK_H -#define DAVINCI_PLL1_BASE 0x01c40800 -#define DAVINCI_PLL2_BASE 0x01c40c00 -#define MAX_PLL 2 - /* PLL/Reset register offsets */ #define PLLCTL 0x100 #define PLLCTL_PLLEN BIT(0) diff --git a/arch/arm/mach-davinci/davinci.h b/arch/arm/mach-davinci/davinci.h index fa99197d36f9..db4c95ef4d5c 100644 --- a/arch/arm/mach-davinci/davinci.h +++ b/arch/arm/mach-davinci/davinci.h @@ -35,6 +35,10 @@ #include #include +#define DAVINCI_PLL1_BASE 0x01c40800 +#define DAVINCI_PLL2_BASE 0x01c40c00 +#define DAVINCI_PWR_SLEEP_CNTRL_BASE 0x01c41000 + #define DAVINCI_SYSTEM_MODULE_BASE 0x01c40000 #define SYSMOD_VDAC_CONFIG 0x2c #define SYSMOD_VIDCLKCTL 0x38 diff --git a/arch/arm/mach-davinci/psc.h b/arch/arm/mach-davinci/psc.h index 8af9f09fc10c..b58707cf7033 100644 --- a/arch/arm/mach-davinci/psc.h +++ b/arch/arm/mach-davinci/psc.h @@ -27,8 +27,6 @@ #ifndef __ASM_ARCH_PSC_H #define __ASM_ARCH_PSC_H -#define DAVINCI_PWR_SLEEP_CNTRL_BASE 0x01C41000 - /* Power and Sleep Controller (PSC) Domains */ #define DAVINCI_GPSC_ARMDOMAIN 0 #define DAVINCI_GPSC_DSPDOMAIN 1 From 5ab7ba12ab513c40c1e2868100ee5b45689644f1 Mon Sep 17 00:00:00 2001 From: David Lechner Date: Fri, 18 May 2018 11:48:18 -0500 Subject: [PATCH 043/112] ARM: davinci: da830: Remove legacy clock init This removes the unused legacy clock init code from arch/arm/mach-davinci/da830.c. Signed-off-by: David Lechner Reviewed-by: Sekhar Nori Signed-off-by: Sekhar Nori --- arch/arm/mach-davinci/board-da830-evm.c | 12 - arch/arm/mach-davinci/da830.c | 412 ------------------------ 2 files changed, 424 deletions(-) diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c index ccddbae951d6..b2470141dba3 100644 --- a/arch/arm/mach-davinci/board-da830-evm.c +++ b/arch/arm/mach-davinci/board-da830-evm.c @@ -110,23 +110,11 @@ static __init void da830_evm_usb_init(void) { int ret; -#ifdef CONFIG_COMMON_CLK ret = da8xx_register_usb_phy_clocks(); if (ret) pr_warn("%s: USB PHY CLK registration failed: %d\n", __func__, ret); -#else - /* USB_REFCLKIN is not used. */ - ret = da8xx_register_usb20_phy_clk(false); - if (ret) - pr_warn("%s: USB 2.0 PHY CLK registration failed: %d\n", - __func__, ret); - ret = da8xx_register_usb11_phy_clk(false); - if (ret) - pr_warn("%s: USB 1.1 PHY CLK registration failed: %d\n", - __func__, ret); -#endif ret = da8xx_register_usb_phy(); if (ret) pr_warn("%s: USB PHY registration failed: %d\n", diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c index 8a79e245db1f..0bc5bd2665df 100644 --- a/arch/arm/mach-davinci/da830.c +++ b/arch/arm/mach-davinci/da830.c @@ -24,11 +24,6 @@ #include "mux.h" -#ifndef CONFIG_COMMON_CLK -#include "clock.h" -#include "psc.h" -#endif - /* Offsets of the 8 compare registers on the da830 */ #define DA830_CMP12_0 0x60 #define DA830_CMP12_1 0x64 @@ -41,404 +36,6 @@ #define DA830_REF_FREQ 24000000 -#ifndef CONFIG_COMMON_CLK -static struct pll_data pll0_data = { - .num = 1, - .phys_base = DA8XX_PLL0_BASE, - .flags = PLL_HAS_PREDIV | PLL_HAS_POSTDIV, -}; - -static struct clk ref_clk = { - .name = "ref_clk", - .rate = DA830_REF_FREQ, -}; - -static struct clk pll0_clk = { - .name = "pll0", - .parent = &ref_clk, - .pll_data = &pll0_data, - .flags = CLK_PLL, -}; - -static struct clk pll0_aux_clk = { - .name = "pll0_aux_clk", - .parent = &pll0_clk, - .flags = CLK_PLL | PRE_PLL, -}; - -static struct clk pll0_sysclk2 = { - .name = "pll0_sysclk2", - .parent = &pll0_clk, - .flags = CLK_PLL, - .div_reg = PLLDIV2, -}; - -static struct clk pll0_sysclk3 = { - .name = "pll0_sysclk3", - .parent = &pll0_clk, - .flags = CLK_PLL, - .div_reg = PLLDIV3, -}; - -static struct clk pll0_sysclk4 = { - .name = "pll0_sysclk4", - .parent = &pll0_clk, - .flags = CLK_PLL, - .div_reg = PLLDIV4, -}; - -static struct clk pll0_sysclk5 = { - .name = "pll0_sysclk5", - .parent = &pll0_clk, - .flags = CLK_PLL, - .div_reg = PLLDIV5, -}; - -static struct clk pll0_sysclk6 = { - .name = "pll0_sysclk6", - .parent = &pll0_clk, - .flags = CLK_PLL, - .div_reg = PLLDIV6, -}; - -static struct clk pll0_sysclk7 = { - .name = "pll0_sysclk7", - .parent = &pll0_clk, - .flags = CLK_PLL, - .div_reg = PLLDIV7, -}; - -static struct clk i2c0_clk = { - .name = "i2c0", - .parent = &pll0_aux_clk, -}; - -static struct clk timerp64_0_clk = { - .name = "timer0", - .parent = &pll0_aux_clk, -}; - -static struct clk timerp64_1_clk = { - .name = "timer1", - .parent = &pll0_aux_clk, -}; - -static struct clk arm_rom_clk = { - .name = "arm_rom", - .parent = &pll0_sysclk2, - .lpsc = DA8XX_LPSC0_ARM_RAM_ROM, - .flags = ALWAYS_ENABLED, -}; - -static struct clk scr0_ss_clk = { - .name = "scr0_ss", - .parent = &pll0_sysclk2, - .lpsc = DA8XX_LPSC0_SCR0_SS, - .flags = ALWAYS_ENABLED, -}; - -static struct clk scr1_ss_clk = { - .name = "scr1_ss", - .parent = &pll0_sysclk2, - .lpsc = DA8XX_LPSC0_SCR1_SS, - .flags = ALWAYS_ENABLED, -}; - -static struct clk scr2_ss_clk = { - .name = "scr2_ss", - .parent = &pll0_sysclk2, - .lpsc = DA8XX_LPSC0_SCR2_SS, - .flags = ALWAYS_ENABLED, -}; - -static struct clk dmax_clk = { - .name = "dmax", - .parent = &pll0_sysclk2, - .lpsc = DA8XX_LPSC0_PRUSS, - .flags = ALWAYS_ENABLED, -}; - -static struct clk tpcc_clk = { - .name = "tpcc", - .parent = &pll0_sysclk2, - .lpsc = DA8XX_LPSC0_TPCC, - .flags = ALWAYS_ENABLED | CLK_PSC, -}; - -static struct clk tptc0_clk = { - .name = "tptc0", - .parent = &pll0_sysclk2, - .lpsc = DA8XX_LPSC0_TPTC0, - .flags = ALWAYS_ENABLED, -}; - -static struct clk tptc1_clk = { - .name = "tptc1", - .parent = &pll0_sysclk2, - .lpsc = DA8XX_LPSC0_TPTC1, - .flags = ALWAYS_ENABLED, -}; - -static struct clk mmcsd_clk = { - .name = "mmcsd", - .parent = &pll0_sysclk2, - .lpsc = DA8XX_LPSC0_MMC_SD, -}; - -static struct clk uart0_clk = { - .name = "uart0", - .parent = &pll0_sysclk2, - .lpsc = DA8XX_LPSC0_UART0, -}; - -static struct clk uart1_clk = { - .name = "uart1", - .parent = &pll0_sysclk2, - .lpsc = DA8XX_LPSC1_UART1, - .gpsc = 1, -}; - -static struct clk uart2_clk = { - .name = "uart2", - .parent = &pll0_sysclk2, - .lpsc = DA8XX_LPSC1_UART2, - .gpsc = 1, -}; - -static struct clk spi0_clk = { - .name = "spi0", - .parent = &pll0_sysclk2, - .lpsc = DA8XX_LPSC0_SPI0, -}; - -static struct clk spi1_clk = { - .name = "spi1", - .parent = &pll0_sysclk2, - .lpsc = DA8XX_LPSC1_SPI1, - .gpsc = 1, -}; - -static struct clk ecap0_clk = { - .name = "ecap0", - .parent = &pll0_sysclk2, - .lpsc = DA8XX_LPSC1_ECAP, - .gpsc = 1, -}; - -static struct clk ecap1_clk = { - .name = "ecap1", - .parent = &pll0_sysclk2, - .lpsc = DA8XX_LPSC1_ECAP, - .gpsc = 1, -}; - -static struct clk ecap2_clk = { - .name = "ecap2", - .parent = &pll0_sysclk2, - .lpsc = DA8XX_LPSC1_ECAP, - .gpsc = 1, -}; - -static struct clk pwm0_clk = { - .name = "pwm0", - .parent = &pll0_sysclk2, - .lpsc = DA8XX_LPSC1_PWM, - .gpsc = 1, -}; - -static struct clk pwm1_clk = { - .name = "pwm1", - .parent = &pll0_sysclk2, - .lpsc = DA8XX_LPSC1_PWM, - .gpsc = 1, -}; - -static struct clk pwm2_clk = { - .name = "pwm2", - .parent = &pll0_sysclk2, - .lpsc = DA8XX_LPSC1_PWM, - .gpsc = 1, -}; - -static struct clk eqep0_clk = { - .name = "eqep0", - .parent = &pll0_sysclk2, - .lpsc = DA830_LPSC1_EQEP, - .gpsc = 1, -}; - -static struct clk eqep1_clk = { - .name = "eqep1", - .parent = &pll0_sysclk2, - .lpsc = DA830_LPSC1_EQEP, - .gpsc = 1, -}; - -static struct clk lcdc_clk = { - .name = "lcdc", - .parent = &pll0_sysclk2, - .lpsc = DA8XX_LPSC1_LCDC, - .gpsc = 1, -}; - -static struct clk mcasp0_clk = { - .name = "mcasp0", - .parent = &pll0_sysclk2, - .lpsc = DA8XX_LPSC1_McASP0, - .gpsc = 1, -}; - -static struct clk mcasp1_clk = { - .name = "mcasp1", - .parent = &pll0_sysclk2, - .lpsc = DA830_LPSC1_McASP1, - .gpsc = 1, -}; - -static struct clk mcasp2_clk = { - .name = "mcasp2", - .parent = &pll0_sysclk2, - .lpsc = DA830_LPSC1_McASP2, - .gpsc = 1, -}; - -static struct clk usb20_clk = { - .name = "usb20", - .parent = &pll0_sysclk2, - .lpsc = DA8XX_LPSC1_USB20, - .gpsc = 1, -}; - -static struct clk cppi41_clk = { - .name = "cppi41", - .parent = &usb20_clk, -}; - -static struct clk aemif_clk = { - .name = "aemif", - .parent = &pll0_sysclk3, - .lpsc = DA8XX_LPSC0_EMIF25, - .flags = ALWAYS_ENABLED, -}; - -static struct clk aintc_clk = { - .name = "aintc", - .parent = &pll0_sysclk4, - .lpsc = DA8XX_LPSC0_AINTC, - .flags = ALWAYS_ENABLED, -}; - -static struct clk secu_mgr_clk = { - .name = "secu_mgr", - .parent = &pll0_sysclk4, - .lpsc = DA8XX_LPSC0_SECU_MGR, - .flags = ALWAYS_ENABLED, -}; - -static struct clk emac_clk = { - .name = "emac", - .parent = &pll0_sysclk4, - .lpsc = DA8XX_LPSC1_CPGMAC, - .gpsc = 1, -}; - -static struct clk gpio_clk = { - .name = "gpio", - .parent = &pll0_sysclk4, - .lpsc = DA8XX_LPSC1_GPIO, - .gpsc = 1, -}; - -static struct clk i2c1_clk = { - .name = "i2c1", - .parent = &pll0_sysclk4, - .lpsc = DA8XX_LPSC1_I2C, - .gpsc = 1, -}; - -static struct clk usb11_clk = { - .name = "usb11", - .parent = &pll0_sysclk4, - .lpsc = DA8XX_LPSC1_USB11, - .gpsc = 1, -}; - -static struct clk emif3_clk = { - .name = "emif3", - .parent = &pll0_sysclk5, - .lpsc = DA8XX_LPSC1_EMIF3C, - .gpsc = 1, - .flags = ALWAYS_ENABLED, -}; - -static struct clk arm_clk = { - .name = "arm", - .parent = &pll0_sysclk6, - .lpsc = DA8XX_LPSC0_ARM, - .flags = ALWAYS_ENABLED, -}; - -static struct clk rmii_clk = { - .name = "rmii", - .parent = &pll0_sysclk7, -}; - -static struct clk_lookup da830_clks[] = { - CLK(NULL, "ref", &ref_clk), - CLK(NULL, "pll0", &pll0_clk), - CLK(NULL, "pll0_aux", &pll0_aux_clk), - CLK(NULL, "pll0_sysclk2", &pll0_sysclk2), - CLK(NULL, "pll0_sysclk3", &pll0_sysclk3), - CLK(NULL, "pll0_sysclk4", &pll0_sysclk4), - CLK(NULL, "pll0_sysclk5", &pll0_sysclk5), - CLK(NULL, "pll0_sysclk6", &pll0_sysclk6), - CLK(NULL, "pll0_sysclk7", &pll0_sysclk7), - CLK("i2c_davinci.1", NULL, &i2c0_clk), - CLK(NULL, "timer0", &timerp64_0_clk), - CLK("davinci-wdt", NULL, &timerp64_1_clk), - CLK(NULL, "arm_rom", &arm_rom_clk), - CLK(NULL, "scr0_ss", &scr0_ss_clk), - CLK(NULL, "scr1_ss", &scr1_ss_clk), - CLK(NULL, "scr2_ss", &scr2_ss_clk), - CLK(NULL, "dmax", &dmax_clk), - CLK(NULL, "tpcc", &tpcc_clk), - CLK(NULL, "tptc0", &tptc0_clk), - CLK(NULL, "tptc1", &tptc1_clk), - CLK("da830-mmc.0", NULL, &mmcsd_clk), - CLK("serial8250.0", NULL, &uart0_clk), - CLK("serial8250.1", NULL, &uart1_clk), - CLK("serial8250.2", NULL, &uart2_clk), - CLK("spi_davinci.0", NULL, &spi0_clk), - CLK("spi_davinci.1", NULL, &spi1_clk), - CLK(NULL, "ecap0", &ecap0_clk), - CLK(NULL, "ecap1", &ecap1_clk), - CLK(NULL, "ecap2", &ecap2_clk), - CLK(NULL, "pwm0", &pwm0_clk), - CLK(NULL, "pwm1", &pwm1_clk), - CLK(NULL, "pwm2", &pwm2_clk), - CLK("eqep.0", NULL, &eqep0_clk), - CLK("eqep.1", NULL, &eqep1_clk), - CLK("da8xx_lcdc.0", "fck", &lcdc_clk), - CLK("davinci-mcasp.0", NULL, &mcasp0_clk), - CLK("davinci-mcasp.1", NULL, &mcasp1_clk), - CLK("davinci-mcasp.2", NULL, &mcasp2_clk), - CLK("musb-da8xx", NULL, &usb20_clk), - CLK("cppi41-dmaengine", NULL, &cppi41_clk), - CLK(NULL, "aemif", &aemif_clk), - CLK(NULL, "aintc", &aintc_clk), - CLK(NULL, "secu_mgr", &secu_mgr_clk), - CLK("davinci_emac.1", NULL, &emac_clk), - CLK("davinci_mdio.0", "fck", &emac_clk), - CLK(NULL, "gpio", &gpio_clk), - CLK("i2c_davinci.2", NULL, &i2c1_clk), - CLK("ohci-da8xx", NULL, &usb11_clk), - CLK(NULL, "emif3", &emif3_clk), - CLK(NULL, "arm", &arm_clk), - CLK(NULL, "rmii", &rmii_clk), - CLK(NULL, NULL, NULL), -}; -#endif - /* * Device specific mux setup * @@ -1136,8 +733,6 @@ static struct map_desc da830_io_desc[] = { }, }; -static u32 da830_psc_bases[] = { DA8XX_PSC0_BASE, DA8XX_PSC1_BASE }; - /* Contents of JTAG ID register used to identify exact cpu type */ static struct davinci_id da830_ids[] = { { @@ -1206,8 +801,6 @@ static const struct davinci_soc_info davinci_soc_info_da830 = { .jtag_id_reg = DA8XX_SYSCFG0_BASE + DA8XX_JTAG_ID_REG, .ids = da830_ids, .ids_num = ARRAY_SIZE(da830_ids), - .psc_bases = da830_psc_bases, - .psc_bases_num = ARRAY_SIZE(da830_psc_bases), .pinmux_base = DA8XX_SYSCFG0_BASE + 0x120, .pinmux_pins = da830_pins, .pinmux_pins_num = ARRAY_SIZE(da830_pins), @@ -1229,7 +822,6 @@ void __init da830_init(void) void __init da830_init_time(void) { -#ifdef CONFIG_COMMON_CLK void __iomem *pll; struct clk *clk; @@ -1242,10 +834,6 @@ void __init da830_init_time(void) clk = clk_get(NULL, "timer0"); davinci_timer_init(clk); -#else - davinci_clk_init(da830_clks); - davinci_timer_init(&timerp64_0_clk); -#endif } static struct resource da830_psc0_resources[] = { From 9cc247b82d3c2d30f0a075020d0cdeba6aaafdd8 Mon Sep 17 00:00:00 2001 From: David Lechner Date: Fri, 18 May 2018 11:48:19 -0500 Subject: [PATCH 044/112] ARM: davinci: da850: Remove legacy clock init This removes the unused legacy clock init code from arch/arm/mach-davinci/da850.c. Signed-off-by: David Lechner Reviewed-by: Sekhar Nori Signed-off-by: Sekhar Nori --- arch/arm/mach-davinci/board-omapl138-hawk.c | 12 +- arch/arm/mach-davinci/da850.c | 653 +------------------- arch/arm/mach-davinci/da8xx-dt.c | 12 +- 3 files changed, 3 insertions(+), 674 deletions(-) diff --git a/arch/arm/mach-davinci/board-omapl138-hawk.c b/arch/arm/mach-davinci/board-omapl138-hawk.c index 949ca567e965..466e87b24e9a 100644 --- a/arch/arm/mach-davinci/board-omapl138-hawk.c +++ b/arch/arm/mach-davinci/board-omapl138-hawk.c @@ -235,22 +235,12 @@ static __init void omapl138_hawk_usb_init(void) pr_warn("%s: USB 1.1 PinMux setup failed: %d\n", __func__, ret); return; } -#ifdef CONFIG_COMMON_CLK + ret = da8xx_register_usb_phy_clocks(); if (ret) pr_warn("%s: USB PHY CLK registration failed: %d\n", __func__, ret); -#else - ret = da8xx_register_usb20_phy_clk(false); - if (ret) - pr_warn("%s: USB 2.0 PHY CLK registration failed: %d\n", - __func__, ret); - ret = da8xx_register_usb11_phy_clk(false); - if (ret) - pr_warn("%s: USB 1.1 PHY CLK registration failed: %d\n", - __func__, ret); -#endif ret = da8xx_register_usb_phy(); if (ret) pr_warn("%s: USB PHY registration failed: %d\n", diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c index 9e00beb943c9..4528bbf0c861 100644 --- a/arch/arm/mach-davinci/da850.c +++ b/arch/arm/mach-davinci/da850.c @@ -38,559 +38,12 @@ #include "mux.h" -#ifndef CONFIG_COMMON_CLK -#include "clock.h" -#include "psc.h" -#endif - #define DA850_PLL1_BASE 0x01e1a000 #define DA850_TIMER64P2_BASE 0x01f0c000 #define DA850_TIMER64P3_BASE 0x01f0d000 #define DA850_REF_FREQ 24000000 -#ifndef CONFIG_COMMON_CLK -static int da850_set_armrate(struct clk *clk, unsigned long rate); -static int da850_round_armrate(struct clk *clk, unsigned long rate); -static int da850_set_pll0rate(struct clk *clk, unsigned long armrate); - -static struct pll_data pll0_data = { - .num = 1, - .phys_base = DA8XX_PLL0_BASE, - .flags = PLL_HAS_PREDIV | PLL_HAS_POSTDIV, -}; - -static struct clk ref_clk = { - .name = "ref_clk", - .rate = DA850_REF_FREQ, - .set_rate = davinci_simple_set_rate, -}; - -static struct clk pll0_clk = { - .name = "pll0", - .parent = &ref_clk, - .pll_data = &pll0_data, - .flags = CLK_PLL, - .set_rate = da850_set_pll0rate, -}; - -static struct clk pll0_aux_clk = { - .name = "pll0_aux_clk", - .parent = &pll0_clk, - .flags = CLK_PLL | PRE_PLL, -}; - -static struct clk pll0_sysclk1 = { - .name = "pll0_sysclk1", - .parent = &pll0_clk, - .flags = CLK_PLL, - .div_reg = PLLDIV1, -}; - -static struct clk pll0_sysclk2 = { - .name = "pll0_sysclk2", - .parent = &pll0_clk, - .flags = CLK_PLL, - .div_reg = PLLDIV2, -}; - -static struct clk pll0_sysclk3 = { - .name = "pll0_sysclk3", - .parent = &pll0_clk, - .flags = CLK_PLL, - .div_reg = PLLDIV3, - .set_rate = davinci_set_sysclk_rate, - .maxrate = 100000000, -}; - -static struct clk pll0_sysclk4 = { - .name = "pll0_sysclk4", - .parent = &pll0_clk, - .flags = CLK_PLL, - .div_reg = PLLDIV4, -}; - -static struct clk pll0_sysclk5 = { - .name = "pll0_sysclk5", - .parent = &pll0_clk, - .flags = CLK_PLL, - .div_reg = PLLDIV5, -}; - -static struct clk pll0_sysclk6 = { - .name = "pll0_sysclk6", - .parent = &pll0_clk, - .flags = CLK_PLL, - .div_reg = PLLDIV6, -}; - -static struct clk pll0_sysclk7 = { - .name = "pll0_sysclk7", - .parent = &pll0_clk, - .flags = CLK_PLL, - .div_reg = PLLDIV7, -}; - -static struct pll_data pll1_data = { - .num = 2, - .phys_base = DA850_PLL1_BASE, - .flags = PLL_HAS_POSTDIV, -}; - -static struct clk pll1_clk = { - .name = "pll1", - .parent = &ref_clk, - .pll_data = &pll1_data, - .flags = CLK_PLL, -}; - -static struct clk pll1_aux_clk = { - .name = "pll1_aux_clk", - .parent = &pll1_clk, - .flags = CLK_PLL | PRE_PLL, -}; - -static struct clk pll1_sysclk2 = { - .name = "pll1_sysclk2", - .parent = &pll1_clk, - .flags = CLK_PLL, - .div_reg = PLLDIV2, -}; - -static struct clk pll1_sysclk3 = { - .name = "pll1_sysclk3", - .parent = &pll1_clk, - .flags = CLK_PLL, - .div_reg = PLLDIV3, -}; - -static int da850_async3_set_parent(struct clk *clk, struct clk *parent) -{ - u32 val; - - val = readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG)); - - if (parent == &pll0_sysclk2) { - val &= ~CFGCHIP3_ASYNC3_CLKSRC; - } else if (parent == &pll1_sysclk2) { - val |= CFGCHIP3_ASYNC3_CLKSRC; - } else { - pr_err("Bad parent on async3 clock mux\n"); - return -EINVAL; - } - - writel(val, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG)); - - return 0; -} - -static struct clk async3_clk = { - .name = "async3", - .parent = &pll1_sysclk2, - .set_parent = da850_async3_set_parent, -}; - -static struct clk i2c0_clk = { - .name = "i2c0", - .parent = &pll0_aux_clk, -}; - -static struct clk timerp64_0_clk = { - .name = "timer0", - .parent = &pll0_aux_clk, -}; - -static struct clk timerp64_1_clk = { - .name = "timer1", - .parent = &pll0_aux_clk, -}; - -static struct clk arm_rom_clk = { - .name = "arm_rom", - .parent = &pll0_sysclk2, - .lpsc = DA8XX_LPSC0_ARM_RAM_ROM, - .flags = ALWAYS_ENABLED, -}; - -static struct clk tpcc0_clk = { - .name = "tpcc0", - .parent = &pll0_sysclk2, - .lpsc = DA8XX_LPSC0_TPCC, - .flags = ALWAYS_ENABLED | CLK_PSC, -}; - -static struct clk tptc0_clk = { - .name = "tptc0", - .parent = &pll0_sysclk2, - .lpsc = DA8XX_LPSC0_TPTC0, - .flags = ALWAYS_ENABLED, -}; - -static struct clk tptc1_clk = { - .name = "tptc1", - .parent = &pll0_sysclk2, - .lpsc = DA8XX_LPSC0_TPTC1, - .flags = ALWAYS_ENABLED, -}; - -static struct clk tpcc1_clk = { - .name = "tpcc1", - .parent = &pll0_sysclk2, - .lpsc = DA850_LPSC1_TPCC1, - .gpsc = 1, - .flags = CLK_PSC | ALWAYS_ENABLED, -}; - -static struct clk tptc2_clk = { - .name = "tptc2", - .parent = &pll0_sysclk2, - .lpsc = DA850_LPSC1_TPTC2, - .gpsc = 1, - .flags = ALWAYS_ENABLED, -}; - -static struct clk pruss_clk = { - .name = "pruss", - .parent = &pll0_sysclk2, - .lpsc = DA8XX_LPSC0_PRUSS, -}; - -static struct clk uart0_clk = { - .name = "uart0", - .parent = &pll0_sysclk2, - .lpsc = DA8XX_LPSC0_UART0, -}; - -static struct clk uart1_clk = { - .name = "uart1", - .parent = &async3_clk, - .lpsc = DA8XX_LPSC1_UART1, - .gpsc = 1, -}; - -static struct clk uart2_clk = { - .name = "uart2", - .parent = &async3_clk, - .lpsc = DA8XX_LPSC1_UART2, - .gpsc = 1, -}; - -static struct clk aintc_clk = { - .name = "aintc", - .parent = &pll0_sysclk4, - .lpsc = DA8XX_LPSC0_AINTC, - .flags = ALWAYS_ENABLED, -}; - -static struct clk gpio_clk = { - .name = "gpio", - .parent = &pll0_sysclk4, - .lpsc = DA8XX_LPSC1_GPIO, - .gpsc = 1, -}; - -static struct clk i2c1_clk = { - .name = "i2c1", - .parent = &pll0_sysclk4, - .lpsc = DA8XX_LPSC1_I2C, - .gpsc = 1, -}; - -static struct clk emif3_clk = { - .name = "emif3", - .parent = &pll0_sysclk5, - .lpsc = DA8XX_LPSC1_EMIF3C, - .gpsc = 1, - .flags = ALWAYS_ENABLED, -}; - -static struct clk arm_clk = { - .name = "arm", - .parent = &pll0_sysclk6, - .lpsc = DA8XX_LPSC0_ARM, - .flags = ALWAYS_ENABLED, - .set_rate = da850_set_armrate, - .round_rate = da850_round_armrate, -}; - -static struct clk rmii_clk = { - .name = "rmii", - .parent = &pll0_sysclk7, -}; - -static struct clk emac_clk = { - .name = "emac", - .parent = &pll0_sysclk4, - .lpsc = DA8XX_LPSC1_CPGMAC, - .gpsc = 1, -}; - -/* - * In order to avoid adding the emac_clk to the clock lookup table twice (and - * screwing up the linked list in the process) create a separate clock for - * mdio inheriting the rate from emac_clk. - */ -static struct clk mdio_clk = { - .name = "mdio", - .parent = &emac_clk, -}; - -static struct clk mcasp_clk = { - .name = "mcasp", - .parent = &async3_clk, - .lpsc = DA8XX_LPSC1_McASP0, - .gpsc = 1, -}; - -static struct clk mcbsp0_clk = { - .name = "mcbsp0", - .parent = &async3_clk, - .lpsc = DA850_LPSC1_McBSP0, - .gpsc = 1, -}; - -static struct clk mcbsp1_clk = { - .name = "mcbsp1", - .parent = &async3_clk, - .lpsc = DA850_LPSC1_McBSP1, - .gpsc = 1, -}; - -static struct clk lcdc_clk = { - .name = "lcdc", - .parent = &pll0_sysclk2, - .lpsc = DA8XX_LPSC1_LCDC, - .gpsc = 1, -}; - -static struct clk mmcsd0_clk = { - .name = "mmcsd0", - .parent = &pll0_sysclk2, - .lpsc = DA8XX_LPSC0_MMC_SD, -}; - -static struct clk mmcsd1_clk = { - .name = "mmcsd1", - .parent = &pll0_sysclk2, - .lpsc = DA850_LPSC1_MMC_SD1, - .gpsc = 1, -}; - -static struct clk aemif_clk = { - .name = "aemif", - .parent = &pll0_sysclk3, - .lpsc = DA8XX_LPSC0_EMIF25, - .flags = ALWAYS_ENABLED, -}; - -/* - * In order to avoid adding the aemif_clk to the clock lookup table twice (and - * screwing up the linked list in the process) create a separate clock for - * nand inheriting the rate from aemif_clk. - */ -static struct clk aemif_nand_clk = { - .name = "nand", - .parent = &aemif_clk, -}; - -static struct clk usb11_clk = { - .name = "usb11", - .parent = &pll0_sysclk4, - .lpsc = DA8XX_LPSC1_USB11, - .gpsc = 1, -}; - -static struct clk usb20_clk = { - .name = "usb20", - .parent = &pll0_sysclk2, - .lpsc = DA8XX_LPSC1_USB20, - .gpsc = 1, -}; - -static struct clk cppi41_clk = { - .name = "cppi41", - .parent = &usb20_clk, -}; - -static struct clk spi0_clk = { - .name = "spi0", - .parent = &pll0_sysclk2, - .lpsc = DA8XX_LPSC0_SPI0, -}; - -static struct clk spi1_clk = { - .name = "spi1", - .parent = &async3_clk, - .lpsc = DA8XX_LPSC1_SPI1, - .gpsc = 1, -}; - -static struct clk vpif_clk = { - .name = "vpif", - .parent = &pll0_sysclk2, - .lpsc = DA850_LPSC1_VPIF, - .gpsc = 1, -}; - -static struct clk sata_clk = { - .name = "sata", - .parent = &pll0_sysclk2, - .lpsc = DA850_LPSC1_SATA, - .gpsc = 1, - .flags = PSC_FORCE, -}; - -static struct clk dsp_clk = { - .name = "dsp", - .parent = &pll0_sysclk1, - .domain = DAVINCI_GPSC_DSPDOMAIN, - .lpsc = DA8XX_LPSC0_GEM, - .flags = PSC_LRST | PSC_FORCE, -}; - -static struct clk ehrpwm_clk = { - .name = "ehrpwm", - .parent = &async3_clk, - .lpsc = DA8XX_LPSC1_PWM, - .gpsc = 1, -}; - -static struct clk ehrpwm0_clk = { - .name = "ehrpwm0", - .parent = &ehrpwm_clk, -}; - -static struct clk ehrpwm1_clk = { - .name = "ehrpwm1", - .parent = &ehrpwm_clk, -}; - -#define DA8XX_EHRPWM_TBCLKSYNC BIT(12) - -static void ehrpwm_tblck_enable(struct clk *clk) -{ - u32 val; - - val = readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP1_REG)); - val |= DA8XX_EHRPWM_TBCLKSYNC; - writel(val, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP1_REG)); -} - -static void ehrpwm_tblck_disable(struct clk *clk) -{ - u32 val; - - val = readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP1_REG)); - val &= ~DA8XX_EHRPWM_TBCLKSYNC; - writel(val, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP1_REG)); -} - -static struct clk ehrpwm_tbclk = { - .name = "ehrpwm_tbclk", - .parent = &ehrpwm_clk, - .clk_enable = ehrpwm_tblck_enable, - .clk_disable = ehrpwm_tblck_disable, -}; - -static struct clk ehrpwm0_tbclk = { - .name = "ehrpwm0_tbclk", - .parent = &ehrpwm_tbclk, -}; - -static struct clk ehrpwm1_tbclk = { - .name = "ehrpwm1_tbclk", - .parent = &ehrpwm_tbclk, -}; - -static struct clk ecap_clk = { - .name = "ecap", - .parent = &async3_clk, - .lpsc = DA8XX_LPSC1_ECAP, - .gpsc = 1, -}; - -static struct clk ecap0_clk = { - .name = "ecap0_clk", - .parent = &ecap_clk, -}; - -static struct clk ecap1_clk = { - .name = "ecap1_clk", - .parent = &ecap_clk, -}; - -static struct clk ecap2_clk = { - .name = "ecap2_clk", - .parent = &ecap_clk, -}; - -static struct clk_lookup da850_clks[] = { - CLK(NULL, "ref", &ref_clk), - CLK(NULL, "pll0", &pll0_clk), - CLK(NULL, "pll0_aux", &pll0_aux_clk), - CLK(NULL, "pll0_sysclk1", &pll0_sysclk1), - CLK(NULL, "pll0_sysclk2", &pll0_sysclk2), - CLK(NULL, "pll0_sysclk3", &pll0_sysclk3), - CLK(NULL, "pll0_sysclk4", &pll0_sysclk4), - CLK(NULL, "pll0_sysclk5", &pll0_sysclk5), - CLK(NULL, "pll0_sysclk6", &pll0_sysclk6), - CLK(NULL, "pll0_sysclk7", &pll0_sysclk7), - CLK(NULL, "pll1", &pll1_clk), - CLK(NULL, "pll1_aux", &pll1_aux_clk), - CLK(NULL, "pll1_sysclk2", &pll1_sysclk2), - CLK(NULL, "pll1_sysclk3", &pll1_sysclk3), - CLK(NULL, "async3", &async3_clk), - CLK("i2c_davinci.1", NULL, &i2c0_clk), - CLK(NULL, "timer0", &timerp64_0_clk), - CLK("davinci-wdt", NULL, &timerp64_1_clk), - CLK(NULL, "arm_rom", &arm_rom_clk), - CLK(NULL, "tpcc0", &tpcc0_clk), - CLK(NULL, "tptc0", &tptc0_clk), - CLK(NULL, "tptc1", &tptc1_clk), - CLK(NULL, "tpcc1", &tpcc1_clk), - CLK(NULL, "tptc2", &tptc2_clk), - CLK("pruss_uio", "pruss", &pruss_clk), - CLK("serial8250.0", NULL, &uart0_clk), - CLK("serial8250.1", NULL, &uart1_clk), - CLK("serial8250.2", NULL, &uart2_clk), - CLK(NULL, "aintc", &aintc_clk), - CLK(NULL, "gpio", &gpio_clk), - CLK("i2c_davinci.2", NULL, &i2c1_clk), - CLK(NULL, "emif3", &emif3_clk), - CLK(NULL, "arm", &arm_clk), - CLK(NULL, "rmii", &rmii_clk), - CLK("davinci_emac.1", NULL, &emac_clk), - CLK("davinci_mdio.0", "fck", &mdio_clk), - CLK("davinci-mcasp.0", NULL, &mcasp_clk), - CLK("davinci-mcbsp.0", NULL, &mcbsp0_clk), - CLK("davinci-mcbsp.1", NULL, &mcbsp1_clk), - CLK("da8xx_lcdc.0", "fck", &lcdc_clk), - CLK("da830-mmc.0", NULL, &mmcsd0_clk), - CLK("da830-mmc.1", NULL, &mmcsd1_clk), - CLK("ti-aemif", NULL, &aemif_clk), - CLK("davinci-nand.0", "aemif", &aemif_nand_clk), - CLK("ohci-da8xx", NULL, &usb11_clk), - CLK("musb-da8xx", NULL, &usb20_clk), - CLK("cppi41-dmaengine", NULL, &cppi41_clk), - CLK("spi_davinci.0", NULL, &spi0_clk), - CLK("spi_davinci.1", NULL, &spi1_clk), - CLK("vpif", NULL, &vpif_clk), - CLK("ahci_da850", "fck", &sata_clk), - CLK("davinci-rproc.0", NULL, &dsp_clk), - CLK(NULL, NULL, &ehrpwm_clk), - CLK("ehrpwm.0", "fck", &ehrpwm0_clk), - CLK("ehrpwm.1", "fck", &ehrpwm1_clk), - CLK(NULL, NULL, &ehrpwm_tbclk), - CLK("ehrpwm.0", "tbclk", &ehrpwm0_tbclk), - CLK("ehrpwm.1", "tbclk", &ehrpwm1_tbclk), - CLK(NULL, NULL, &ecap_clk), - CLK("ecap.0", "fck", &ecap0_clk), - CLK("ecap.1", "fck", &ecap1_clk), - CLK("ecap.2", "fck", &ecap2_clk), - CLK(NULL, NULL, NULL), -}; -#endif - /* * Device specific mux setup * @@ -965,8 +418,6 @@ static struct map_desc da850_io_desc[] = { }, }; -static u32 da850_psc_bases[] = { DA8XX_PSC0_BASE, DA8XX_PSC1_BASE }; - /* Contents of JTAG ID register used to identify exact cpu type */ static struct davinci_id da850_ids[] = { { @@ -1176,93 +627,11 @@ int da850_register_cpufreq(char *async_clk) return platform_device_register(&da850_cpufreq_device); } - -#ifndef CONFIG_COMMON_CLK -static int da850_round_armrate(struct clk *clk, unsigned long rate) -{ - int ret = 0, diff; - unsigned int best = (unsigned int) -1; - struct cpufreq_frequency_table *table = cpufreq_info.freq_table; - struct cpufreq_frequency_table *pos; - - rate /= 1000; /* convert to kHz */ - - cpufreq_for_each_entry(pos, table) { - diff = pos->frequency - rate; - if (diff < 0) - diff = -diff; - - if (diff < best) { - best = diff; - ret = pos->frequency; - } - } - - return ret * 1000; -} - -static int da850_set_armrate(struct clk *clk, unsigned long index) -{ - struct clk *pllclk = &pll0_clk; - - return clk_set_rate(pllclk, index); -} - -static int da850_set_pll0rate(struct clk *clk, unsigned long rate) -{ - struct pll_data *pll = clk->pll_data; - struct cpufreq_frequency_table *freq; - unsigned int prediv, mult, postdiv; - struct da850_opp *opp = NULL; - int ret; - - rate /= 1000; - - for (freq = da850_freq_table; - freq->frequency != CPUFREQ_TABLE_END; freq++) { - /* rate is in Hz, freq->frequency is in KHz */ - if (freq->frequency == rate) { - opp = (struct da850_opp *)freq->driver_data; - break; - } - } - - if (!opp) - return -EINVAL; - - prediv = opp->prediv; - mult = opp->mult; - postdiv = opp->postdiv; - - ret = davinci_set_pllrate(pll, prediv, mult, postdiv); - if (WARN_ON(ret)) - return ret; - - return 0; -} -#endif /* CONFIG_COMMON_CLK */ #else int __init da850_register_cpufreq(char *async_clk) { return 0; } - -#ifndef CONFIG_COMMON_CLK -static int da850_set_armrate(struct clk *clk, unsigned long rate) -{ - return -EINVAL; -} - -static int da850_set_pll0rate(struct clk *clk, unsigned long armrate) -{ - return -EINVAL; -} - -static int da850_round_armrate(struct clk *clk, unsigned long rate) -{ - return clk->rate; -} -#endif /* CONFIG_COMMON_CLK */ #endif /* VPIF resource, platform data */ @@ -1364,8 +733,6 @@ static const struct davinci_soc_info davinci_soc_info_da850 = { .jtag_id_reg = DA8XX_SYSCFG0_BASE + DA8XX_JTAG_ID_REG, .ids = da850_ids, .ids_num = ARRAY_SIZE(da850_ids), - .psc_bases = da850_psc_bases, - .psc_bases_num = ARRAY_SIZE(da850_psc_bases), .pinmux_base = DA8XX_SYSCFG0_BASE + 0x120, .pinmux_pins = da850_pins, .pinmux_pins_num = ARRAY_SIZE(da850_pins), @@ -1381,8 +748,6 @@ static const struct davinci_soc_info davinci_soc_info_da850 = { void __init da850_init(void) { - unsigned int v; - davinci_common_init(&davinci_soc_info_da850); da8xx_syscfg0_base = ioremap(DA8XX_SYSCFG0_BASE, SZ_4K); @@ -1390,23 +755,11 @@ void __init da850_init(void) return; da8xx_syscfg1_base = ioremap(DA8XX_SYSCFG1_BASE, SZ_4K); - if (WARN(!da8xx_syscfg1_base, "Unable to map syscfg1 module")) - return; - - /* Unlock writing to PLL0 registers */ - v = __raw_readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP0_REG)); - v &= ~CFGCHIP0_PLL_MASTER_LOCK; - __raw_writel(v, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP0_REG)); - - /* Unlock writing to PLL1 registers */ - v = __raw_readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG)); - v &= ~CFGCHIP3_PLL1_MASTER_LOCK; - __raw_writel(v, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG)); + WARN(!da8xx_syscfg1_base, "Unable to map syscfg1 module"); } void __init da850_init_time(void) { -#ifdef CONFIG_COMMON_CLK void __iomem *pll0; struct regmap *cfgchip; struct clk *clk; @@ -1421,10 +774,6 @@ void __init da850_init_time(void) clk = clk_get(NULL, "timer0"); davinci_timer_init(clk); -#else - davinci_clk_init(da850_clks); - davinci_timer_init(&timerp64_0_clk); -#endif } static struct resource da850_pll1_resources[] = { diff --git a/arch/arm/mach-davinci/da8xx-dt.c b/arch/arm/mach-davinci/da8xx-dt.c index c4edf051ef9b..088bc5c0318b 100644 --- a/arch/arm/mach-davinci/da8xx-dt.c +++ b/arch/arm/mach-davinci/da8xx-dt.c @@ -69,21 +69,11 @@ static void __init da850_init_machine(void) da850_register_clocks(); -#ifdef CONFIG_COMMON_CLK ret = da8xx_register_usb_phy_clocks(); if (ret) pr_warn("%s: USB PHY CLK registration failed: %d\n", __func__, ret); -#else - ret = da8xx_register_usb20_phy_clk(false); - if (ret) - pr_warn("%s: registering USB 2.0 PHY clock failed: %d", - __func__, ret); - ret = da8xx_register_usb11_phy_clk(false); - if (ret) - pr_warn("%s: registering USB 1.1 PHY clock failed: %d", - __func__, ret); -#endif + ret = da850_register_sata_refclk(sata_refclkpn); if (ret) pr_warn("%s: registering SATA REFCLK failed: %d", From feee4eda2de296aeaecbba8fa1128e1e2006ff0a Mon Sep 17 00:00:00 2001 From: David Lechner Date: Fri, 18 May 2018 11:48:20 -0500 Subject: [PATCH 045/112] ARM: davinci: dm355: Remove legacy clock init This removes the unused legacy clock init code from arch/arm/mach-davinci/dm355.c. Signed-off-by: David Lechner Reviewed-by: Sekhar Nori Signed-off-by: Sekhar Nori --- arch/arm/mach-davinci/dm355.c | 357 ---------------------------------- 1 file changed, 357 deletions(-) diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c index 14014b942e8a..9f7d38d12c88 100644 --- a/arch/arm/mach-davinci/dm355.c +++ b/arch/arm/mach-davinci/dm355.c @@ -35,11 +35,6 @@ #include "davinci.h" #include "mux.h" -#ifndef CONFIG_COMMON_CLK -#include "clock.h" -#include "psc.h" -#endif - #define DM355_UART2_BASE (IO_PHYS + 0x206000) #define DM355_OSD_BASE (IO_PHYS + 0x70200) #define DM355_VENC_BASE (IO_PHYS + 0x70400) @@ -49,349 +44,6 @@ */ #define DM355_REF_FREQ 24000000 /* 24 or 36 MHz */ -#ifndef CONFIG_COMMON_CLK -static struct pll_data pll1_data = { - .num = 1, - .phys_base = DAVINCI_PLL1_BASE, - .flags = PLL_HAS_PREDIV | PLL_HAS_POSTDIV, -}; - -static struct pll_data pll2_data = { - .num = 2, - .phys_base = DAVINCI_PLL2_BASE, - .flags = PLL_HAS_PREDIV, -}; - -static struct clk ref_clk = { - .name = "ref_clk", - /* FIXME -- crystal rate is board-specific */ - .rate = DM355_REF_FREQ, -}; - -static struct clk pll1_clk = { - .name = "pll1", - .parent = &ref_clk, - .flags = CLK_PLL, - .pll_data = &pll1_data, -}; - -static struct clk pll1_aux_clk = { - .name = "pll1_aux_clk", - .parent = &pll1_clk, - .flags = CLK_PLL | PRE_PLL, -}; - -static struct clk pll1_sysclk1 = { - .name = "pll1_sysclk1", - .parent = &pll1_clk, - .flags = CLK_PLL, - .div_reg = PLLDIV1, -}; - -static struct clk pll1_sysclk2 = { - .name = "pll1_sysclk2", - .parent = &pll1_clk, - .flags = CLK_PLL, - .div_reg = PLLDIV2, -}; - -static struct clk pll1_sysclk3 = { - .name = "pll1_sysclk3", - .parent = &pll1_clk, - .flags = CLK_PLL, - .div_reg = PLLDIV3, -}; - -static struct clk pll1_sysclk4 = { - .name = "pll1_sysclk4", - .parent = &pll1_clk, - .flags = CLK_PLL, - .div_reg = PLLDIV4, -}; - -static struct clk pll1_sysclkbp = { - .name = "pll1_sysclkbp", - .parent = &pll1_clk, - .flags = CLK_PLL | PRE_PLL, - .div_reg = BPDIV -}; - -static struct clk vpss_dac_clk = { - .name = "vpss_dac", - .parent = &pll1_sysclk3, - .lpsc = DM355_LPSC_VPSS_DAC, -}; - -static struct clk vpss_master_clk = { - .name = "vpss_master", - .parent = &pll1_sysclk4, - .lpsc = DAVINCI_LPSC_VPSSMSTR, - .flags = CLK_PSC, -}; - -static struct clk vpss_slave_clk = { - .name = "vpss_slave", - .parent = &pll1_sysclk4, - .lpsc = DAVINCI_LPSC_VPSSSLV, -}; - -static struct clk clkout1_clk = { - .name = "clkout1", - .parent = &pll1_aux_clk, - /* NOTE: clkout1 can be externally gated by muxing GPIO-18 */ -}; - -static struct clk clkout2_clk = { - .name = "clkout2", - .parent = &pll1_sysclkbp, -}; - -static struct clk pll2_clk = { - .name = "pll2", - .parent = &ref_clk, - .flags = CLK_PLL, - .pll_data = &pll2_data, -}; - -static struct clk pll2_sysclk1 = { - .name = "pll2_sysclk1", - .parent = &pll2_clk, - .flags = CLK_PLL, - .div_reg = PLLDIV1, -}; - -static struct clk pll2_sysclkbp = { - .name = "pll2_sysclkbp", - .parent = &pll2_clk, - .flags = CLK_PLL | PRE_PLL, - .div_reg = BPDIV -}; - -static struct clk clkout3_clk = { - .name = "clkout3", - .parent = &pll2_sysclkbp, - /* NOTE: clkout3 can be externally gated by muxing GPIO-16 */ -}; - -static struct clk arm_clk = { - .name = "arm_clk", - .parent = &pll1_sysclk1, - .lpsc = DAVINCI_LPSC_ARM, - .flags = ALWAYS_ENABLED, -}; - -/* - * NOT LISTED below, and not touched by Linux - * - in SyncReset state by default - * .lpsc = DAVINCI_LPSC_TPCC, - * .lpsc = DAVINCI_LPSC_TPTC0, - * .lpsc = DAVINCI_LPSC_TPTC1, - * .lpsc = DAVINCI_LPSC_DDR_EMIF, .parent = &sysclk2_clk, - * .lpsc = DAVINCI_LPSC_MEMSTICK, - * - in Enabled state by default - * .lpsc = DAVINCI_LPSC_SYSTEM_SUBSYS, - * .lpsc = DAVINCI_LPSC_SCR2, // "bus" - * .lpsc = DAVINCI_LPSC_SCR3, // "bus" - * .lpsc = DAVINCI_LPSC_SCR4, // "bus" - * .lpsc = DAVINCI_LPSC_CROSSBAR, // "emulation" - * .lpsc = DAVINCI_LPSC_CFG27, // "test" - * .lpsc = DAVINCI_LPSC_CFG3, // "test" - * .lpsc = DAVINCI_LPSC_CFG5, // "test" - */ - -static struct clk mjcp_clk = { - .name = "mjcp", - .parent = &pll1_sysclk1, - .lpsc = DAVINCI_LPSC_IMCOP, -}; - -static struct clk uart0_clk = { - .name = "uart0", - .parent = &pll1_aux_clk, - .lpsc = DAVINCI_LPSC_UART0, -}; - -static struct clk uart1_clk = { - .name = "uart1", - .parent = &pll1_aux_clk, - .lpsc = DAVINCI_LPSC_UART1, -}; - -static struct clk uart2_clk = { - .name = "uart2", - .parent = &pll1_sysclk2, - .lpsc = DAVINCI_LPSC_UART2, -}; - -static struct clk i2c_clk = { - .name = "i2c", - .parent = &pll1_aux_clk, - .lpsc = DAVINCI_LPSC_I2C, -}; - -static struct clk asp0_clk = { - .name = "asp0", - .parent = &pll1_sysclk2, - .lpsc = DAVINCI_LPSC_McBSP, -}; - -static struct clk asp1_clk = { - .name = "asp1", - .parent = &pll1_sysclk2, - .lpsc = DM355_LPSC_McBSP1, -}; - -static struct clk mmcsd0_clk = { - .name = "mmcsd0", - .parent = &pll1_sysclk2, - .lpsc = DAVINCI_LPSC_MMC_SD, -}; - -static struct clk mmcsd1_clk = { - .name = "mmcsd1", - .parent = &pll1_sysclk2, - .lpsc = DM355_LPSC_MMC_SD1, -}; - -static struct clk spi0_clk = { - .name = "spi0", - .parent = &pll1_sysclk2, - .lpsc = DAVINCI_LPSC_SPI, -}; - -static struct clk spi1_clk = { - .name = "spi1", - .parent = &pll1_sysclk2, - .lpsc = DM355_LPSC_SPI1, -}; - -static struct clk spi2_clk = { - .name = "spi2", - .parent = &pll1_sysclk2, - .lpsc = DM355_LPSC_SPI2, -}; - -static struct clk gpio_clk = { - .name = "gpio", - .parent = &pll1_sysclk2, - .lpsc = DAVINCI_LPSC_GPIO, -}; - -static struct clk aemif_clk = { - .name = "aemif", - .parent = &pll1_sysclk2, - .lpsc = DAVINCI_LPSC_AEMIF, -}; - -static struct clk pwm0_clk = { - .name = "pwm0", - .parent = &pll1_aux_clk, - .lpsc = DAVINCI_LPSC_PWM0, -}; - -static struct clk pwm1_clk = { - .name = "pwm1", - .parent = &pll1_aux_clk, - .lpsc = DAVINCI_LPSC_PWM1, -}; - -static struct clk pwm2_clk = { - .name = "pwm2", - .parent = &pll1_aux_clk, - .lpsc = DAVINCI_LPSC_PWM2, -}; - -static struct clk pwm3_clk = { - .name = "pwm3", - .parent = &pll1_aux_clk, - .lpsc = DM355_LPSC_PWM3, -}; - -static struct clk timer0_clk = { - .name = "timer0", - .parent = &pll1_aux_clk, - .lpsc = DAVINCI_LPSC_TIMER0, -}; - -static struct clk timer1_clk = { - .name = "timer1", - .parent = &pll1_aux_clk, - .lpsc = DAVINCI_LPSC_TIMER1, -}; - -static struct clk timer2_clk = { - .name = "timer2", - .parent = &pll1_aux_clk, - .lpsc = DAVINCI_LPSC_TIMER2, - .usecount = 1, /* REVISIT: why can't this be disabled? */ -}; - -static struct clk timer3_clk = { - .name = "timer3", - .parent = &pll1_aux_clk, - .lpsc = DM355_LPSC_TIMER3, -}; - -static struct clk rto_clk = { - .name = "rto", - .parent = &pll1_aux_clk, - .lpsc = DM355_LPSC_RTO, -}; - -static struct clk usb_clk = { - .name = "usb", - .parent = &pll1_sysclk2, - .lpsc = DAVINCI_LPSC_USB, -}; - -static struct clk_lookup dm355_clks[] = { - CLK(NULL, "ref", &ref_clk), - CLK(NULL, "pll1", &pll1_clk), - CLK(NULL, "pll1_sysclk1", &pll1_sysclk1), - CLK(NULL, "pll1_sysclk2", &pll1_sysclk2), - CLK(NULL, "pll1_sysclk3", &pll1_sysclk3), - CLK(NULL, "pll1_sysclk4", &pll1_sysclk4), - CLK(NULL, "pll1_aux", &pll1_aux_clk), - CLK(NULL, "pll1_sysclkbp", &pll1_sysclkbp), - CLK(NULL, "vpss_dac", &vpss_dac_clk), - CLK("vpss", "master", &vpss_master_clk), - CLK("vpss", "slave", &vpss_slave_clk), - CLK(NULL, "clkout1", &clkout1_clk), - CLK(NULL, "clkout2", &clkout2_clk), - CLK(NULL, "pll2", &pll2_clk), - CLK(NULL, "pll2_sysclk1", &pll2_sysclk1), - CLK(NULL, "pll2_sysclkbp", &pll2_sysclkbp), - CLK(NULL, "clkout3", &clkout3_clk), - CLK(NULL, "arm", &arm_clk), - CLK(NULL, "mjcp", &mjcp_clk), - CLK("serial8250.0", NULL, &uart0_clk), - CLK("serial8250.1", NULL, &uart1_clk), - CLK("serial8250.2", NULL, &uart2_clk), - CLK("i2c_davinci.1", NULL, &i2c_clk), - CLK("davinci-mcbsp.0", NULL, &asp0_clk), - CLK("davinci-mcbsp.1", NULL, &asp1_clk), - CLK("dm6441-mmc.0", NULL, &mmcsd0_clk), - CLK("dm6441-mmc.1", NULL, &mmcsd1_clk), - CLK("spi_davinci.0", NULL, &spi0_clk), - CLK("spi_davinci.1", NULL, &spi1_clk), - CLK("spi_davinci.2", NULL, &spi2_clk), - CLK(NULL, "gpio", &gpio_clk), - CLK(NULL, "aemif", &aemif_clk), - CLK(NULL, "pwm0", &pwm0_clk), - CLK(NULL, "pwm1", &pwm1_clk), - CLK(NULL, "pwm2", &pwm2_clk), - CLK(NULL, "pwm3", &pwm3_clk), - CLK(NULL, "timer0", &timer0_clk), - CLK(NULL, "timer1", &timer1_clk), - CLK("davinci-wdt", NULL, &timer2_clk), - CLK(NULL, "timer3", &timer3_clk), - CLK(NULL, "rto", &rto_clk), - CLK(NULL, "usb", &usb_clk), - CLK(NULL, NULL, NULL), -}; -#endif -/*----------------------------------------------------------------------*/ - static u64 dm355_spi0_dma_mask = DMA_BIT_MASK(32); static struct resource dm355_spi0_resources[] = { @@ -933,8 +585,6 @@ static struct davinci_id dm355_ids[] = { }, }; -static u32 dm355_psc_bases[] = { DAVINCI_PWR_SLEEP_CNTRL_BASE }; - /* * T0_BOT: Timer 0, bottom: clockevent source for hrtimers * T0_TOP: Timer 0, top : clocksource for generic timekeeping @@ -1019,8 +669,6 @@ static const struct davinci_soc_info davinci_soc_info_dm355 = { .jtag_id_reg = 0x01c40028, .ids = dm355_ids, .ids_num = ARRAY_SIZE(dm355_ids), - .psc_bases = dm355_psc_bases, - .psc_bases_num = ARRAY_SIZE(dm355_psc_bases), .pinmux_base = DAVINCI_SYSTEM_MODULE_BASE, .pinmux_pins = dm355_pins, .pinmux_pins_num = ARRAY_SIZE(dm355_pins), @@ -1053,7 +701,6 @@ void __init dm355_init(void) void __init dm355_init_time(void) { -#ifdef CONFIG_COMMON_CLK void __iomem *pll1, *psc; struct clk *clk; @@ -1068,10 +715,6 @@ void __init dm355_init_time(void) clk = clk_get(NULL, "timer0"); davinci_timer_init(clk); -#else - davinci_clk_init(dm355_clks); - davinci_timer_init(&timer0_clk); -#endif } static struct resource dm355_pll2_resources[] = { From ab0f2a60bb0df6f72db111865e368da8365171b1 Mon Sep 17 00:00:00 2001 From: David Lechner Date: Fri, 18 May 2018 11:48:21 -0500 Subject: [PATCH 046/112] ARM: davinci: dm365: Remove legacy clock init This removes the unused legacy clock init code from arch/arm/mach-davinci/dm365.c. Signed-off-by: David Lechner Reviewed-by: Sekhar Nori Signed-off-by: Sekhar Nori --- arch/arm/mach-davinci/dm365.c | 449 ---------------------------------- 1 file changed, 449 deletions(-) diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c index 76de426a0e41..abcf2a5ed89b 100644 --- a/arch/arm/mach-davinci/dm365.c +++ b/arch/arm/mach-davinci/dm365.c @@ -40,11 +40,6 @@ #include "davinci.h" #include "mux.h" -#ifndef CONFIG_COMMON_CLK -#include "clock.h" -#include "psc.h" -#endif - #define DM365_REF_FREQ 24000000 /* 24 MHz on the DM365 EVM */ #define DM365_RTC_BASE 0x01c69000 #define DM365_KEYSCAN_BASE 0x01c69400 @@ -60,441 +55,6 @@ #define DM365_EMAC_CNTRL_RAM_OFFSET 0x1000 #define DM365_EMAC_CNTRL_RAM_SIZE 0x2000 -#ifndef CONFIG_COMMON_CLK -static struct pll_data pll1_data = { - .num = 1, - .phys_base = DAVINCI_PLL1_BASE, - .flags = PLL_HAS_POSTDIV | PLL_HAS_PREDIV, -}; - -static struct pll_data pll2_data = { - .num = 2, - .phys_base = DAVINCI_PLL2_BASE, - .flags = PLL_HAS_POSTDIV | PLL_HAS_PREDIV, -}; - -static struct clk ref_clk = { - .name = "ref_clk", - .rate = DM365_REF_FREQ, -}; - -static struct clk pll1_clk = { - .name = "pll1", - .parent = &ref_clk, - .flags = CLK_PLL, - .pll_data = &pll1_data, -}; - -static struct clk pll1_aux_clk = { - .name = "pll1_aux_clk", - .parent = &pll1_clk, - .flags = CLK_PLL | PRE_PLL, -}; - -static struct clk pll1_sysclkbp = { - .name = "pll1_sysclkbp", - .parent = &pll1_clk, - .flags = CLK_PLL | PRE_PLL, - .div_reg = BPDIV -}; - -static struct clk clkout0_clk = { - .name = "clkout0", - .parent = &pll1_clk, - .flags = CLK_PLL | PRE_PLL, -}; - -static struct clk pll1_sysclk1 = { - .name = "pll1_sysclk1", - .parent = &pll1_clk, - .flags = CLK_PLL, - .div_reg = PLLDIV1, -}; - -static struct clk pll1_sysclk2 = { - .name = "pll1_sysclk2", - .parent = &pll1_clk, - .flags = CLK_PLL, - .div_reg = PLLDIV2, -}; - -static struct clk pll1_sysclk3 = { - .name = "pll1_sysclk3", - .parent = &pll1_clk, - .flags = CLK_PLL, - .div_reg = PLLDIV3, -}; - -static struct clk pll1_sysclk4 = { - .name = "pll1_sysclk4", - .parent = &pll1_clk, - .flags = CLK_PLL, - .div_reg = PLLDIV4, -}; - -static struct clk pll1_sysclk5 = { - .name = "pll1_sysclk5", - .parent = &pll1_clk, - .flags = CLK_PLL, - .div_reg = PLLDIV5, -}; - -static struct clk pll1_sysclk6 = { - .name = "pll1_sysclk6", - .parent = &pll1_clk, - .flags = CLK_PLL, - .div_reg = PLLDIV6, -}; - -static struct clk pll1_sysclk7 = { - .name = "pll1_sysclk7", - .parent = &pll1_clk, - .flags = CLK_PLL, - .div_reg = PLLDIV7, -}; - -static struct clk pll1_sysclk8 = { - .name = "pll1_sysclk8", - .parent = &pll1_clk, - .flags = CLK_PLL, - .div_reg = PLLDIV8, -}; - -static struct clk pll1_sysclk9 = { - .name = "pll1_sysclk9", - .parent = &pll1_clk, - .flags = CLK_PLL, - .div_reg = PLLDIV9, -}; - -static struct clk pll2_clk = { - .name = "pll2", - .parent = &ref_clk, - .flags = CLK_PLL, - .pll_data = &pll2_data, -}; - -static struct clk pll2_aux_clk = { - .name = "pll2_aux_clk", - .parent = &pll2_clk, - .flags = CLK_PLL | PRE_PLL, -}; - -static struct clk clkout1_clk = { - .name = "clkout1", - .parent = &pll2_clk, - .flags = CLK_PLL | PRE_PLL, -}; - -static struct clk pll2_sysclk1 = { - .name = "pll2_sysclk1", - .parent = &pll2_clk, - .flags = CLK_PLL, - .div_reg = PLLDIV1, -}; - -static struct clk pll2_sysclk2 = { - .name = "pll2_sysclk2", - .parent = &pll2_clk, - .flags = CLK_PLL, - .div_reg = PLLDIV2, -}; - -static struct clk pll2_sysclk3 = { - .name = "pll2_sysclk3", - .parent = &pll2_clk, - .flags = CLK_PLL, - .div_reg = PLLDIV3, -}; - -static struct clk pll2_sysclk4 = { - .name = "pll2_sysclk4", - .parent = &pll2_clk, - .flags = CLK_PLL, - .div_reg = PLLDIV4, -}; - -static struct clk pll2_sysclk5 = { - .name = "pll2_sysclk5", - .parent = &pll2_clk, - .flags = CLK_PLL, - .div_reg = PLLDIV5, -}; - -static struct clk pll2_sysclk6 = { - .name = "pll2_sysclk6", - .parent = &pll2_clk, - .flags = CLK_PLL, - .div_reg = PLLDIV6, -}; - -static struct clk pll2_sysclk7 = { - .name = "pll2_sysclk7", - .parent = &pll2_clk, - .flags = CLK_PLL, - .div_reg = PLLDIV7, -}; - -static struct clk pll2_sysclk8 = { - .name = "pll2_sysclk8", - .parent = &pll2_clk, - .flags = CLK_PLL, - .div_reg = PLLDIV8, -}; - -static struct clk pll2_sysclk9 = { - .name = "pll2_sysclk9", - .parent = &pll2_clk, - .flags = CLK_PLL, - .div_reg = PLLDIV9, -}; - -static struct clk vpss_dac_clk = { - .name = "vpss_dac", - .parent = &pll1_sysclk3, - .lpsc = DM365_LPSC_DAC_CLK, -}; - -static struct clk vpss_master_clk = { - .name = "vpss_master", - .parent = &pll1_sysclk5, - .lpsc = DM365_LPSC_VPSSMSTR, - .flags = CLK_PSC, -}; - -static struct clk vpss_slave_clk = { - .name = "vpss_slave", - .parent = &pll1_sysclk5, - .lpsc = DAVINCI_LPSC_VPSSSLV, -}; - -static struct clk arm_clk = { - .name = "arm_clk", - .parent = &pll2_sysclk2, - .lpsc = DAVINCI_LPSC_ARM, - .flags = ALWAYS_ENABLED, -}; - -static struct clk uart0_clk = { - .name = "uart0", - .parent = &pll1_aux_clk, - .lpsc = DAVINCI_LPSC_UART0, -}; - -static struct clk uart1_clk = { - .name = "uart1", - .parent = &pll1_sysclk4, - .lpsc = DAVINCI_LPSC_UART1, -}; - -static struct clk i2c_clk = { - .name = "i2c", - .parent = &pll1_aux_clk, - .lpsc = DAVINCI_LPSC_I2C, -}; - -static struct clk mmcsd0_clk = { - .name = "mmcsd0", - .parent = &pll1_sysclk8, - .lpsc = DAVINCI_LPSC_MMC_SD, -}; - -static struct clk mmcsd1_clk = { - .name = "mmcsd1", - .parent = &pll1_sysclk4, - .lpsc = DM365_LPSC_MMC_SD1, -}; - -static struct clk spi0_clk = { - .name = "spi0", - .parent = &pll1_sysclk4, - .lpsc = DAVINCI_LPSC_SPI, -}; - -static struct clk spi1_clk = { - .name = "spi1", - .parent = &pll1_sysclk4, - .lpsc = DM365_LPSC_SPI1, -}; - -static struct clk spi2_clk = { - .name = "spi2", - .parent = &pll1_sysclk4, - .lpsc = DM365_LPSC_SPI2, -}; - -static struct clk spi3_clk = { - .name = "spi3", - .parent = &pll1_sysclk4, - .lpsc = DM365_LPSC_SPI3, -}; - -static struct clk spi4_clk = { - .name = "spi4", - .parent = &pll1_aux_clk, - .lpsc = DM365_LPSC_SPI4, -}; - -static struct clk gpio_clk = { - .name = "gpio", - .parent = &pll1_sysclk4, - .lpsc = DAVINCI_LPSC_GPIO, -}; - -static struct clk aemif_clk = { - .name = "aemif", - .parent = &pll1_sysclk4, - .lpsc = DAVINCI_LPSC_AEMIF, -}; - -static struct clk pwm0_clk = { - .name = "pwm0", - .parent = &pll1_aux_clk, - .lpsc = DAVINCI_LPSC_PWM0, -}; - -static struct clk pwm1_clk = { - .name = "pwm1", - .parent = &pll1_aux_clk, - .lpsc = DAVINCI_LPSC_PWM1, -}; - -static struct clk pwm2_clk = { - .name = "pwm2", - .parent = &pll1_aux_clk, - .lpsc = DAVINCI_LPSC_PWM2, -}; - -static struct clk pwm3_clk = { - .name = "pwm3", - .parent = &ref_clk, - .lpsc = DM365_LPSC_PWM3, -}; - -static struct clk timer0_clk = { - .name = "timer0", - .parent = &pll1_aux_clk, - .lpsc = DAVINCI_LPSC_TIMER0, -}; - -static struct clk timer1_clk = { - .name = "timer1", - .parent = &pll1_aux_clk, - .lpsc = DAVINCI_LPSC_TIMER1, -}; - -static struct clk timer2_clk = { - .name = "timer2", - .parent = &pll1_aux_clk, - .lpsc = DAVINCI_LPSC_TIMER2, - .usecount = 1, -}; - -static struct clk timer3_clk = { - .name = "timer3", - .parent = &pll1_aux_clk, - .lpsc = DM365_LPSC_TIMER3, -}; - -static struct clk usb_clk = { - .name = "usb", - .parent = &pll1_aux_clk, - .lpsc = DAVINCI_LPSC_USB, -}; - -static struct clk emac_clk = { - .name = "emac", - .parent = &pll1_sysclk4, - .lpsc = DM365_LPSC_EMAC, -}; - -static struct clk voicecodec_clk = { - .name = "voice_codec", - .parent = &pll2_sysclk4, - .lpsc = DM365_LPSC_VOICE_CODEC, -}; - -static struct clk asp0_clk = { - .name = "asp0", - .parent = &pll1_sysclk4, - .lpsc = DM365_LPSC_McBSP1, -}; - -static struct clk rto_clk = { - .name = "rto", - .parent = &pll1_sysclk4, - .lpsc = DM365_LPSC_RTO, -}; - -static struct clk mjcp_clk = { - .name = "mjcp", - .parent = &pll1_sysclk3, - .lpsc = DM365_LPSC_MJCP, -}; - -static struct clk_lookup dm365_clks[] = { - CLK(NULL, "ref", &ref_clk), - CLK(NULL, "pll1", &pll1_clk), - CLK(NULL, "pll1_aux", &pll1_aux_clk), - CLK(NULL, "pll1_sysclkbp", &pll1_sysclkbp), - CLK(NULL, "clkout0", &clkout0_clk), - CLK(NULL, "pll1_sysclk1", &pll1_sysclk1), - CLK(NULL, "pll1_sysclk2", &pll1_sysclk2), - CLK(NULL, "pll1_sysclk3", &pll1_sysclk3), - CLK(NULL, "pll1_sysclk4", &pll1_sysclk4), - CLK(NULL, "pll1_sysclk5", &pll1_sysclk5), - CLK(NULL, "pll1_sysclk6", &pll1_sysclk6), - CLK(NULL, "pll1_sysclk7", &pll1_sysclk7), - CLK(NULL, "pll1_sysclk8", &pll1_sysclk8), - CLK(NULL, "pll1_sysclk9", &pll1_sysclk9), - CLK(NULL, "pll2", &pll2_clk), - CLK(NULL, "pll2_aux", &pll2_aux_clk), - CLK(NULL, "clkout1", &clkout1_clk), - CLK(NULL, "pll2_sysclk1", &pll2_sysclk1), - CLK(NULL, "pll2_sysclk2", &pll2_sysclk2), - CLK(NULL, "pll2_sysclk3", &pll2_sysclk3), - CLK(NULL, "pll2_sysclk4", &pll2_sysclk4), - CLK(NULL, "pll2_sysclk5", &pll2_sysclk5), - CLK(NULL, "pll2_sysclk6", &pll2_sysclk6), - CLK(NULL, "pll2_sysclk7", &pll2_sysclk7), - CLK(NULL, "pll2_sysclk8", &pll2_sysclk8), - CLK(NULL, "pll2_sysclk9", &pll2_sysclk9), - CLK(NULL, "vpss_dac", &vpss_dac_clk), - CLK("vpss", "master", &vpss_master_clk), - CLK("vpss", "slave", &vpss_slave_clk), - CLK(NULL, "arm", &arm_clk), - CLK("serial8250.0", NULL, &uart0_clk), - CLK("serial8250.1", NULL, &uart1_clk), - CLK("i2c_davinci.1", NULL, &i2c_clk), - CLK("da830-mmc.0", NULL, &mmcsd0_clk), - CLK("da830-mmc.1", NULL, &mmcsd1_clk), - CLK("spi_davinci.0", NULL, &spi0_clk), - CLK("spi_davinci.1", NULL, &spi1_clk), - CLK("spi_davinci.2", NULL, &spi2_clk), - CLK("spi_davinci.3", NULL, &spi3_clk), - CLK("spi_davinci.4", NULL, &spi4_clk), - CLK(NULL, "gpio", &gpio_clk), - CLK(NULL, "aemif", &aemif_clk), - CLK(NULL, "pwm0", &pwm0_clk), - CLK(NULL, "pwm1", &pwm1_clk), - CLK(NULL, "pwm2", &pwm2_clk), - CLK(NULL, "pwm3", &pwm3_clk), - CLK(NULL, "timer0", &timer0_clk), - CLK(NULL, "timer1", &timer1_clk), - CLK("davinci-wdt", NULL, &timer2_clk), - CLK(NULL, "timer3", &timer3_clk), - CLK(NULL, "usb", &usb_clk), - CLK("davinci_emac.1", NULL, &emac_clk), - CLK("davinci_mdio.0", "fck", &emac_clk), - CLK("davinci_voicecodec", NULL, &voicecodec_clk), - CLK("davinci-mcbsp", NULL, &asp0_clk), - CLK(NULL, "rto", &rto_clk), - CLK(NULL, "mjcp", &mjcp_clk), - CLK(NULL, NULL, NULL), -}; -#endif -/*----------------------------------------------------------------------*/ - #define INTMUX 0x18 #define EVTMUX 0x1c @@ -1061,8 +621,6 @@ static struct davinci_id dm365_ids[] = { }, }; -static u32 dm365_psc_bases[] = { DAVINCI_PWR_SLEEP_CNTRL_BASE }; - static struct davinci_timer_info dm365_timer_info = { .timers = davinci_timer_instance, .clockevent_id = T0_BOT, @@ -1123,8 +681,6 @@ static const struct davinci_soc_info davinci_soc_info_dm365 = { .jtag_id_reg = 0x01c40028, .ids = dm365_ids, .ids_num = ARRAY_SIZE(dm365_ids), - .psc_bases = dm365_psc_bases, - .psc_bases_num = ARRAY_SIZE(dm365_psc_bases), .pinmux_base = DAVINCI_SYSTEM_MODULE_BASE, .pinmux_pins = dm365_pins, .pinmux_pins_num = ARRAY_SIZE(dm365_pins), @@ -1178,7 +734,6 @@ void __init dm365_init(void) void __init dm365_init_time(void) { -#ifdef CONFIG_COMMON_CLK void __iomem *pll1, *pll2, *psc; struct clk *clk; @@ -1196,10 +751,6 @@ void __init dm365_init_time(void) clk = clk_get(NULL, "timer0"); davinci_timer_init(clk); -#else - davinci_clk_init(dm365_clks); - davinci_timer_init(&timer0_clk); -#endif } void __init dm365_register_clocks(void) From 015927027bce0dbff45bf50661cd17992073c60e Mon Sep 17 00:00:00 2001 From: David Lechner Date: Fri, 18 May 2018 11:48:22 -0500 Subject: [PATCH 047/112] ARM: davinci: dm644x: Remove legacy clock init This removes the unused legacy clock init code from arch/arm/mach-davinci/dm644x.c. Signed-off-by: David Lechner Reviewed-by: Sekhar Nori Signed-off-by: Sekhar Nori --- arch/arm/mach-davinci/dm644x.c | 300 --------------------------------- 1 file changed, 300 deletions(-) diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c index c3cd27c6cd70..0720da7809a6 100644 --- a/arch/arm/mach-davinci/dm644x.c +++ b/arch/arm/mach-davinci/dm644x.c @@ -32,11 +32,6 @@ #include "davinci.h" #include "mux.h" -#ifndef CONFIG_COMMON_CLK -#include "clock.h" -#include "psc.h" -#endif - /* * Device specific clocks */ @@ -49,292 +44,6 @@ #define DM644X_EMAC_CNTRL_RAM_OFFSET 0x2000 #define DM644X_EMAC_CNTRL_RAM_SIZE 0x2000 -#ifndef CONFIG_COMMON_CLK -static struct pll_data pll1_data = { - .num = 1, - .phys_base = DAVINCI_PLL1_BASE, -}; - -static struct pll_data pll2_data = { - .num = 2, - .phys_base = DAVINCI_PLL2_BASE, -}; - -static struct clk ref_clk = { - .name = "ref_clk", - .rate = DM644X_REF_FREQ, -}; - -static struct clk pll1_clk = { - .name = "pll1", - .parent = &ref_clk, - .pll_data = &pll1_data, - .flags = CLK_PLL, -}; - -static struct clk pll1_sysclk1 = { - .name = "pll1_sysclk1", - .parent = &pll1_clk, - .flags = CLK_PLL, - .div_reg = PLLDIV1, -}; - -static struct clk pll1_sysclk2 = { - .name = "pll1_sysclk2", - .parent = &pll1_clk, - .flags = CLK_PLL, - .div_reg = PLLDIV2, -}; - -static struct clk pll1_sysclk3 = { - .name = "pll1_sysclk3", - .parent = &pll1_clk, - .flags = CLK_PLL, - .div_reg = PLLDIV3, -}; - -static struct clk pll1_sysclk5 = { - .name = "pll1_sysclk5", - .parent = &pll1_clk, - .flags = CLK_PLL, - .div_reg = PLLDIV5, -}; - -static struct clk pll1_aux_clk = { - .name = "pll1_aux_clk", - .parent = &pll1_clk, - .flags = CLK_PLL | PRE_PLL, -}; - -static struct clk pll1_sysclkbp = { - .name = "pll1_sysclkbp", - .parent = &pll1_clk, - .flags = CLK_PLL | PRE_PLL, - .div_reg = BPDIV -}; - -static struct clk pll2_clk = { - .name = "pll2", - .parent = &ref_clk, - .pll_data = &pll2_data, - .flags = CLK_PLL, -}; - -static struct clk pll2_sysclk1 = { - .name = "pll2_sysclk1", - .parent = &pll2_clk, - .flags = CLK_PLL, - .div_reg = PLLDIV1, -}; - -static struct clk pll2_sysclk2 = { - .name = "pll2_sysclk2", - .parent = &pll2_clk, - .flags = CLK_PLL, - .div_reg = PLLDIV2, -}; - -static struct clk pll2_sysclkbp = { - .name = "pll2_sysclkbp", - .parent = &pll2_clk, - .flags = CLK_PLL | PRE_PLL, - .div_reg = BPDIV -}; - -static struct clk dsp_clk = { - .name = "dsp", - .parent = &pll1_sysclk1, - .lpsc = DAVINCI_LPSC_GEM, - .domain = DAVINCI_GPSC_DSPDOMAIN, - .usecount = 1, /* REVISIT how to disable? */ -}; - -static struct clk arm_clk = { - .name = "arm", - .parent = &pll1_sysclk2, - .lpsc = DAVINCI_LPSC_ARM, - .flags = ALWAYS_ENABLED, -}; - -static struct clk vicp_clk = { - .name = "vicp", - .parent = &pll1_sysclk2, - .lpsc = DAVINCI_LPSC_IMCOP, - .domain = DAVINCI_GPSC_DSPDOMAIN, - .usecount = 1, /* REVISIT how to disable? */ -}; - -static struct clk vpss_master_clk = { - .name = "vpss_master", - .parent = &pll1_sysclk3, - .lpsc = DAVINCI_LPSC_VPSSMSTR, - .flags = CLK_PSC, -}; - -static struct clk vpss_slave_clk = { - .name = "vpss_slave", - .parent = &pll1_sysclk3, - .lpsc = DAVINCI_LPSC_VPSSSLV, -}; - -static struct clk uart0_clk = { - .name = "uart0", - .parent = &pll1_aux_clk, - .lpsc = DAVINCI_LPSC_UART0, -}; - -static struct clk uart1_clk = { - .name = "uart1", - .parent = &pll1_aux_clk, - .lpsc = DAVINCI_LPSC_UART1, -}; - -static struct clk uart2_clk = { - .name = "uart2", - .parent = &pll1_aux_clk, - .lpsc = DAVINCI_LPSC_UART2, -}; - -static struct clk emac_clk = { - .name = "emac", - .parent = &pll1_sysclk5, - .lpsc = DAVINCI_LPSC_EMAC_WRAPPER, -}; - -static struct clk i2c_clk = { - .name = "i2c", - .parent = &pll1_aux_clk, - .lpsc = DAVINCI_LPSC_I2C, -}; - -static struct clk ide_clk = { - .name = "ide", - .parent = &pll1_sysclk5, - .lpsc = DAVINCI_LPSC_ATA, -}; - -static struct clk asp_clk = { - .name = "asp0", - .parent = &pll1_sysclk5, - .lpsc = DAVINCI_LPSC_McBSP, -}; - -static struct clk mmcsd_clk = { - .name = "mmcsd", - .parent = &pll1_sysclk5, - .lpsc = DAVINCI_LPSC_MMC_SD, -}; - -static struct clk spi_clk = { - .name = "spi", - .parent = &pll1_sysclk5, - .lpsc = DAVINCI_LPSC_SPI, -}; - -static struct clk gpio_clk = { - .name = "gpio", - .parent = &pll1_sysclk5, - .lpsc = DAVINCI_LPSC_GPIO, -}; - -static struct clk usb_clk = { - .name = "usb", - .parent = &pll1_sysclk5, - .lpsc = DAVINCI_LPSC_USB, -}; - -static struct clk vlynq_clk = { - .name = "vlynq", - .parent = &pll1_sysclk5, - .lpsc = DAVINCI_LPSC_VLYNQ, -}; - -static struct clk aemif_clk = { - .name = "aemif", - .parent = &pll1_sysclk5, - .lpsc = DAVINCI_LPSC_AEMIF, -}; - -static struct clk pwm0_clk = { - .name = "pwm0", - .parent = &pll1_aux_clk, - .lpsc = DAVINCI_LPSC_PWM0, -}; - -static struct clk pwm1_clk = { - .name = "pwm1", - .parent = &pll1_aux_clk, - .lpsc = DAVINCI_LPSC_PWM1, -}; - -static struct clk pwm2_clk = { - .name = "pwm2", - .parent = &pll1_aux_clk, - .lpsc = DAVINCI_LPSC_PWM2, -}; - -static struct clk timer0_clk = { - .name = "timer0", - .parent = &pll1_aux_clk, - .lpsc = DAVINCI_LPSC_TIMER0, -}; - -static struct clk timer1_clk = { - .name = "timer1", - .parent = &pll1_aux_clk, - .lpsc = DAVINCI_LPSC_TIMER1, -}; - -static struct clk timer2_clk = { - .name = "timer2", - .parent = &pll1_aux_clk, - .lpsc = DAVINCI_LPSC_TIMER2, - .usecount = 1, /* REVISIT: why can't this be disabled? */ -}; - -static struct clk_lookup dm644x_clks[] = { - CLK(NULL, "ref", &ref_clk), - CLK(NULL, "pll1", &pll1_clk), - CLK(NULL, "pll1_sysclk1", &pll1_sysclk1), - CLK(NULL, "pll1_sysclk2", &pll1_sysclk2), - CLK(NULL, "pll1_sysclk3", &pll1_sysclk3), - CLK(NULL, "pll1_sysclk5", &pll1_sysclk5), - CLK(NULL, "pll1_aux", &pll1_aux_clk), - CLK(NULL, "pll1_sysclkbp", &pll1_sysclkbp), - CLK(NULL, "pll2", &pll2_clk), - CLK(NULL, "pll2_sysclk1", &pll2_sysclk1), - CLK(NULL, "pll2_sysclk2", &pll2_sysclk2), - CLK(NULL, "pll2_sysclkbp", &pll2_sysclkbp), - CLK(NULL, "dsp", &dsp_clk), - CLK(NULL, "arm", &arm_clk), - CLK(NULL, "vicp", &vicp_clk), - CLK("vpss", "master", &vpss_master_clk), - CLK("vpss", "slave", &vpss_slave_clk), - CLK(NULL, "arm", &arm_clk), - CLK("serial8250.0", NULL, &uart0_clk), - CLK("serial8250.1", NULL, &uart1_clk), - CLK("serial8250.2", NULL, &uart2_clk), - CLK("davinci_emac.1", NULL, &emac_clk), - CLK("davinci_mdio.0", "fck", &emac_clk), - CLK("i2c_davinci.1", NULL, &i2c_clk), - CLK("palm_bk3710", NULL, &ide_clk), - CLK("davinci-mcbsp", NULL, &asp_clk), - CLK("dm6441-mmc.0", NULL, &mmcsd_clk), - CLK(NULL, "spi", &spi_clk), - CLK(NULL, "gpio", &gpio_clk), - CLK(NULL, "usb", &usb_clk), - CLK(NULL, "vlynq", &vlynq_clk), - CLK(NULL, "aemif", &aemif_clk), - CLK(NULL, "pwm0", &pwm0_clk), - CLK(NULL, "pwm1", &pwm1_clk), - CLK(NULL, "pwm2", &pwm2_clk), - CLK(NULL, "timer0", &timer0_clk), - CLK(NULL, "timer1", &timer1_clk), - CLK("davinci-wdt", NULL, &timer2_clk), - CLK(NULL, NULL, NULL), -}; -#endif - static struct emac_platform_data dm644x_emac_pdata = { .ctrl_reg_offset = DM644X_EMAC_CNTRL_OFFSET, .ctrl_mod_reg_offset = DM644X_EMAC_CNTRL_MOD_OFFSET, @@ -827,8 +536,6 @@ static struct davinci_id dm644x_ids[] = { }, }; -static u32 dm644x_psc_bases[] = { DAVINCI_PWR_SLEEP_CNTRL_BASE }; - /* * T0_BOT: Timer 0, bottom: clockevent source for hrtimers * T0_TOP: Timer 0, top : clocksource for generic timekeeping @@ -913,8 +620,6 @@ static const struct davinci_soc_info davinci_soc_info_dm644x = { .jtag_id_reg = 0x01c40028, .ids = dm644x_ids, .ids_num = ARRAY_SIZE(dm644x_ids), - .psc_bases = dm644x_psc_bases, - .psc_bases_num = ARRAY_SIZE(dm644x_psc_bases), .pinmux_base = DAVINCI_SYSTEM_MODULE_BASE, .pinmux_pins = dm644x_pins, .pinmux_pins_num = ARRAY_SIZE(dm644x_pins), @@ -942,7 +647,6 @@ void __init dm644x_init(void) void __init dm644x_init_time(void) { -#ifdef CONFIG_COMMON_CLK void __iomem *pll1, *psc; struct clk *clk; @@ -957,10 +661,6 @@ void __init dm644x_init_time(void) clk = clk_get(NULL, "timer0"); davinci_timer_init(clk); -#else - davinci_clk_init(dm644x_clks); - davinci_timer_init(&timer0_clk); -#endif } static struct resource dm644x_pll2_resources[] = { From cf0a51b4f08617c4bc50c6fd3172f4e86d347ac2 Mon Sep 17 00:00:00 2001 From: David Lechner Date: Fri, 18 May 2018 11:48:23 -0500 Subject: [PATCH 048/112] ARM: davinci: dm646x: Remove legacy clock init This removes the unused legacy clock init code from arch/arm/mach-davinci/dm646x.c. Signed-off-by: David Lechner Reviewed-by: Sekhar Nori Signed-off-by: Sekhar Nori --- arch/arm/mach-davinci/dm646x.c | 329 --------------------------------- 1 file changed, 329 deletions(-) diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c index f05090317469..6bd2ed069d0d 100644 --- a/arch/arm/mach-davinci/dm646x.c +++ b/arch/arm/mach-davinci/dm646x.c @@ -33,11 +33,6 @@ #include "davinci.h" #include "mux.h" -#ifndef CONFIG_COMMON_CLK -#include "clock.h" -#include "psc.h" -#endif - #define DAVINCI_VPIF_BASE (0x01C12000) #define VDD3P3V_VID_MASK (BIT_MASK(3) | BIT_MASK(2) | BIT_MASK(1) |\ @@ -52,319 +47,6 @@ #define DM646X_EMAC_CNTRL_RAM_OFFSET 0x2000 #define DM646X_EMAC_CNTRL_RAM_SIZE 0x2000 -#ifndef CONFIG_COMMON_CLK -static struct pll_data pll1_data = { - .num = 1, - .phys_base = DAVINCI_PLL1_BASE, -}; - -static struct pll_data pll2_data = { - .num = 2, - .phys_base = DAVINCI_PLL2_BASE, -}; - -static struct clk ref_clk = { - .name = "ref_clk", - /* rate is initialized in dm646x_init_time() */ -}; - -static struct clk aux_clkin = { - .name = "aux_clkin", - /* rate is initialized in dm646x_init_time() */ -}; - -static struct clk pll1_clk = { - .name = "pll1", - .parent = &ref_clk, - .pll_data = &pll1_data, - .flags = CLK_PLL, -}; - -static struct clk pll1_sysclk1 = { - .name = "pll1_sysclk1", - .parent = &pll1_clk, - .flags = CLK_PLL, - .div_reg = PLLDIV1, -}; - -static struct clk pll1_sysclk2 = { - .name = "pll1_sysclk2", - .parent = &pll1_clk, - .flags = CLK_PLL, - .div_reg = PLLDIV2, -}; - -static struct clk pll1_sysclk3 = { - .name = "pll1_sysclk3", - .parent = &pll1_clk, - .flags = CLK_PLL, - .div_reg = PLLDIV3, -}; - -static struct clk pll1_sysclk4 = { - .name = "pll1_sysclk4", - .parent = &pll1_clk, - .flags = CLK_PLL, - .div_reg = PLLDIV4, -}; - -static struct clk pll1_sysclk5 = { - .name = "pll1_sysclk5", - .parent = &pll1_clk, - .flags = CLK_PLL, - .div_reg = PLLDIV5, -}; - -static struct clk pll1_sysclk6 = { - .name = "pll1_sysclk6", - .parent = &pll1_clk, - .flags = CLK_PLL, - .div_reg = PLLDIV6, -}; - -static struct clk pll1_sysclk8 = { - .name = "pll1_sysclk8", - .parent = &pll1_clk, - .flags = CLK_PLL, - .div_reg = PLLDIV8, -}; - -static struct clk pll1_sysclk9 = { - .name = "pll1_sysclk9", - .parent = &pll1_clk, - .flags = CLK_PLL, - .div_reg = PLLDIV9, -}; - -static struct clk pll1_sysclkbp = { - .name = "pll1_sysclkbp", - .parent = &pll1_clk, - .flags = CLK_PLL | PRE_PLL, - .div_reg = BPDIV, -}; - -static struct clk pll1_aux_clk = { - .name = "pll1_aux_clk", - .parent = &pll1_clk, - .flags = CLK_PLL | PRE_PLL, -}; - -static struct clk pll2_clk = { - .name = "pll2_clk", - .parent = &ref_clk, - .pll_data = &pll2_data, - .flags = CLK_PLL, -}; - -static struct clk pll2_sysclk1 = { - .name = "pll2_sysclk1", - .parent = &pll2_clk, - .flags = CLK_PLL, - .div_reg = PLLDIV1, -}; - -static struct clk dsp_clk = { - .name = "dsp", - .parent = &pll1_sysclk1, - .lpsc = DM646X_LPSC_C64X_CPU, - .usecount = 1, /* REVISIT how to disable? */ -}; - -static struct clk arm_clk = { - .name = "arm", - .parent = &pll1_sysclk2, - .lpsc = DM646X_LPSC_ARM, - .flags = ALWAYS_ENABLED, -}; - -static struct clk edma_cc_clk = { - .name = "edma_cc", - .parent = &pll1_sysclk2, - .lpsc = DM646X_LPSC_TPCC, - .flags = ALWAYS_ENABLED, -}; - -static struct clk edma_tc0_clk = { - .name = "edma_tc0", - .parent = &pll1_sysclk2, - .lpsc = DM646X_LPSC_TPTC0, - .flags = ALWAYS_ENABLED, -}; - -static struct clk edma_tc1_clk = { - .name = "edma_tc1", - .parent = &pll1_sysclk2, - .lpsc = DM646X_LPSC_TPTC1, - .flags = ALWAYS_ENABLED, -}; - -static struct clk edma_tc2_clk = { - .name = "edma_tc2", - .parent = &pll1_sysclk2, - .lpsc = DM646X_LPSC_TPTC2, - .flags = ALWAYS_ENABLED, -}; - -static struct clk edma_tc3_clk = { - .name = "edma_tc3", - .parent = &pll1_sysclk2, - .lpsc = DM646X_LPSC_TPTC3, - .flags = ALWAYS_ENABLED, -}; - -static struct clk uart0_clk = { - .name = "uart0", - .parent = &aux_clkin, - .lpsc = DM646X_LPSC_UART0, -}; - -static struct clk uart1_clk = { - .name = "uart1", - .parent = &aux_clkin, - .lpsc = DM646X_LPSC_UART1, -}; - -static struct clk uart2_clk = { - .name = "uart2", - .parent = &aux_clkin, - .lpsc = DM646X_LPSC_UART2, -}; - -static struct clk i2c_clk = { - .name = "I2CCLK", - .parent = &pll1_sysclk3, - .lpsc = DM646X_LPSC_I2C, -}; - -static struct clk gpio_clk = { - .name = "gpio", - .parent = &pll1_sysclk3, - .lpsc = DM646X_LPSC_GPIO, -}; - -static struct clk mcasp0_clk = { - .name = "mcasp0", - .parent = &pll1_sysclk3, - .lpsc = DM646X_LPSC_McASP0, -}; - -static struct clk mcasp1_clk = { - .name = "mcasp1", - .parent = &pll1_sysclk3, - .lpsc = DM646X_LPSC_McASP1, -}; - -static struct clk aemif_clk = { - .name = "aemif", - .parent = &pll1_sysclk3, - .lpsc = DM646X_LPSC_AEMIF, - .flags = ALWAYS_ENABLED, -}; - -static struct clk emac_clk = { - .name = "emac", - .parent = &pll1_sysclk3, - .lpsc = DM646X_LPSC_EMAC, -}; - -static struct clk pwm0_clk = { - .name = "pwm0", - .parent = &pll1_sysclk3, - .lpsc = DM646X_LPSC_PWM0, - .usecount = 1, /* REVIST: disabling hangs system */ -}; - -static struct clk pwm1_clk = { - .name = "pwm1", - .parent = &pll1_sysclk3, - .lpsc = DM646X_LPSC_PWM1, - .usecount = 1, /* REVIST: disabling hangs system */ -}; - -static struct clk timer0_clk = { - .name = "timer0", - .parent = &pll1_sysclk3, - .lpsc = DM646X_LPSC_TIMER0, -}; - -static struct clk timer1_clk = { - .name = "timer1", - .parent = &pll1_sysclk3, - .lpsc = DM646X_LPSC_TIMER1, -}; - -static struct clk timer2_clk = { - .name = "timer2", - .parent = &pll1_sysclk3, - .flags = ALWAYS_ENABLED, /* no LPSC, always enabled; c.f. spruep9a */ -}; - - -static struct clk ide_clk = { - .name = "ide", - .parent = &pll1_sysclk4, - .lpsc = DAVINCI_LPSC_ATA, -}; - -static struct clk vpif0_clk = { - .name = "vpif0", - .parent = &ref_clk, - .lpsc = DM646X_LPSC_VPSSMSTR, - .flags = ALWAYS_ENABLED, -}; - -static struct clk vpif1_clk = { - .name = "vpif1", - .parent = &ref_clk, - .lpsc = DM646X_LPSC_VPSSSLV, - .flags = ALWAYS_ENABLED, -}; - -static struct clk_lookup dm646x_clks[] = { - CLK(NULL, "ref", &ref_clk), - CLK(NULL, "aux", &aux_clkin), - CLK(NULL, "pll1", &pll1_clk), - CLK(NULL, "pll1_sysclk", &pll1_sysclk1), - CLK(NULL, "pll1_sysclk", &pll1_sysclk2), - CLK(NULL, "pll1_sysclk", &pll1_sysclk3), - CLK(NULL, "pll1_sysclk", &pll1_sysclk4), - CLK(NULL, "pll1_sysclk", &pll1_sysclk5), - CLK(NULL, "pll1_sysclk", &pll1_sysclk6), - CLK(NULL, "pll1_sysclk", &pll1_sysclk8), - CLK(NULL, "pll1_sysclk", &pll1_sysclk9), - CLK(NULL, "pll1_sysclk", &pll1_sysclkbp), - CLK(NULL, "pll1_aux", &pll1_aux_clk), - CLK(NULL, "pll2", &pll2_clk), - CLK(NULL, "pll2_sysclk1", &pll2_sysclk1), - CLK(NULL, "dsp", &dsp_clk), - CLK(NULL, "arm", &arm_clk), - CLK(NULL, "edma_cc", &edma_cc_clk), - CLK(NULL, "edma_tc0", &edma_tc0_clk), - CLK(NULL, "edma_tc1", &edma_tc1_clk), - CLK(NULL, "edma_tc2", &edma_tc2_clk), - CLK(NULL, "edma_tc3", &edma_tc3_clk), - CLK("serial8250.0", NULL, &uart0_clk), - CLK("serial8250.1", NULL, &uart1_clk), - CLK("serial8250.2", NULL, &uart2_clk), - CLK("i2c_davinci.1", NULL, &i2c_clk), - CLK(NULL, "gpio", &gpio_clk), - CLK("davinci-mcasp.0", NULL, &mcasp0_clk), - CLK("davinci-mcasp.1", NULL, &mcasp1_clk), - CLK(NULL, "aemif", &aemif_clk), - CLK("davinci_emac.1", NULL, &emac_clk), - CLK("davinci_mdio.0", "fck", &emac_clk), - CLK(NULL, "pwm0", &pwm0_clk), - CLK(NULL, "pwm1", &pwm1_clk), - CLK(NULL, "timer0", &timer0_clk), - CLK(NULL, "timer1", &timer1_clk), - CLK("davinci-wdt", NULL, &timer2_clk), - CLK("palm_bk3710", NULL, &ide_clk), - CLK(NULL, "vpif0", &vpif0_clk), - CLK(NULL, "vpif1", &vpif1_clk), - CLK(NULL, NULL, NULL), -}; -#endif - static struct emac_platform_data dm646x_emac_pdata = { .ctrl_reg_offset = DM646X_EMAC_CNTRL_OFFSET, .ctrl_mod_reg_offset = DM646X_EMAC_CNTRL_MOD_OFFSET, @@ -804,8 +486,6 @@ static struct davinci_id dm646x_ids[] = { }, }; -static u32 dm646x_psc_bases[] = { DAVINCI_PWR_SLEEP_CNTRL_BASE }; - /* * T0_BOT: Timer 0, bottom: clockevent source for hrtimers * T0_TOP: Timer 0, top : clocksource for generic timekeeping @@ -890,8 +570,6 @@ static const struct davinci_soc_info davinci_soc_info_dm646x = { .jtag_id_reg = 0x01c40028, .ids = dm646x_ids, .ids_num = ARRAY_SIZE(dm646x_ids), - .psc_bases = dm646x_psc_bases, - .psc_bases_num = ARRAY_SIZE(dm646x_psc_bases), .pinmux_base = DAVINCI_SYSTEM_MODULE_BASE, .pinmux_pins = dm646x_pins, .pinmux_pins_num = ARRAY_SIZE(dm646x_pins), @@ -962,7 +640,6 @@ void __init dm646x_init(void) void __init dm646x_init_time(unsigned long ref_clk_rate, unsigned long aux_clkin_rate) { -#ifdef CONFIG_COMMON_CLK void __iomem *pll1, *psc; struct clk *clk; @@ -978,12 +655,6 @@ void __init dm646x_init_time(unsigned long ref_clk_rate, clk = clk_get(NULL, "timer0"); davinci_timer_init(clk); -#else - ref_clk.rate = ref_clk_rate; - aux_clkin.rate = aux_clkin_rate; - davinci_clk_init(dm646x_clks); - davinci_timer_init(&timer0_clk); -#endif } static struct resource dm646x_pll2_resources[] = { From c0c3fb1a1520f1c416b45b0da92f2f7abd6ac54d Mon Sep 17 00:00:00 2001 From: David Lechner Date: Fri, 18 May 2018 11:48:24 -0500 Subject: [PATCH 049/112] ARM: davinci: da8xx: Remove legacy USB and SATA clock init This removes the unused legacy USB and SATA clock init code from arch/arm/mach-davinci/{devices,usb}-da8xx}.c. Signed-off-by: David Lechner Reviewed-by: Sekhar Nori Signed-off-by: Sekhar Nori --- arch/arm/mach-davinci/devices-da8xx.c | 29 --- arch/arm/mach-davinci/include/mach/da8xx.h | 3 - arch/arm/mach-davinci/usb-da8xx.c | 238 --------------------- 3 files changed, 270 deletions(-) diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c index 73de449bbc68..1fd3619f6a09 100644 --- a/arch/arm/mach-davinci/devices-da8xx.c +++ b/arch/arm/mach-davinci/devices-da8xx.c @@ -30,11 +30,6 @@ #include "cpuidle.h" #include "sram.h" -#ifndef CONFIG_COMMON_CLK -#include -#include "clock.h" -#endif - #define DA8XX_TPCC_BASE 0x01c00000 #define DA8XX_TPTC0_BASE 0x01c08000 #define DA8XX_TPTC1_BASE 0x01c08400 @@ -1045,29 +1040,6 @@ int __init da8xx_register_spi_bus(int instance, unsigned num_chipselect) } #ifdef CONFIG_ARCH_DAVINCI_DA850 -#ifndef CONFIG_COMMON_CLK -static struct clk sata_refclk = { - .name = "sata_refclk", - .set_rate = davinci_simple_set_rate, -}; - -static struct clk_lookup sata_refclk_lookup = - CLK("ahci_da850", "refclk", &sata_refclk); - -int __init da850_register_sata_refclk(int rate) -{ - int ret; - - sata_refclk.rate = rate; - ret = clk_register(&sata_refclk); - if (ret) - return ret; - - clkdev_add(&sata_refclk_lookup); - - return 0; -} -#else int __init da850_register_sata_refclk(int rate) { struct clk *clk; @@ -1078,7 +1050,6 @@ int __init da850_register_sata_refclk(int rate) return clk_register_clkdev(clk, "refclk", "ahci_da850"); } -#endif static struct resource da850_sata_resources[] = { { diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h index 5d7b1de9aa7e..ab4a57f433f4 100644 --- a/arch/arm/mach-davinci/include/mach/da8xx.h +++ b/arch/arm/mach-davinci/include/mach/da8xx.h @@ -103,9 +103,6 @@ int da8xx_register_watchdog(void); int da8xx_register_usb_phy(void); int da8xx_register_usb20(unsigned mA, unsigned potpgt); int da8xx_register_usb11(struct da8xx_ohci_root_hub *pdata); -int da8xx_register_usb_refclkin(int rate); -int da8xx_register_usb20_phy_clk(bool use_usb_refclkin); -int da8xx_register_usb11_phy_clk(bool use_usb_refclkin); int da8xx_register_usb_phy_clocks(void); int da850_register_sata_refclk(int rate); int da8xx_register_emac(void); diff --git a/arch/arm/mach-davinci/usb-da8xx.c b/arch/arm/mach-davinci/usb-da8xx.c index c8d2f3075e69..c17ce66a3d95 100644 --- a/arch/arm/mach-davinci/usb-da8xx.c +++ b/arch/arm/mach-davinci/usb-da8xx.c @@ -20,11 +20,6 @@ #include #include -#ifndef CONFIG_COMMON_CLK -#include -#include "clock.h" -#endif - #define DA8XX_USB0_BASE 0x01e00000 #define DA8XX_USB1_BASE 0x01e25000 @@ -87,11 +82,6 @@ static struct platform_device da8xx_usb20_dev = { .name = "musb-da8xx", .id = -1, .dev = { - /* - * Setting init_name so that clock lookup will work in - * usb20_phy_clk_enable() even if this device is not registered. - */ - .init_name = "musb-da8xx", .platform_data = &usb_data, .dma_mask = &usb_dmamask, .coherent_dma_mask = DMA_BIT_MASK(32), @@ -140,234 +130,6 @@ int __init da8xx_register_usb11(struct da8xx_ohci_root_hub *pdata) return platform_device_register(&da8xx_usb11_device); } -#ifndef CONFIG_COMMON_CLK -static struct clk usb_refclkin = { - .name = "usb_refclkin", - .set_rate = davinci_simple_set_rate, -}; - -static struct clk_lookup usb_refclkin_lookup = - CLK(NULL, "usb_refclkin", &usb_refclkin); - -/** - * da8xx_register_usb_refclkin - register USB_REFCLKIN clock - * - * @rate: The clock rate in Hz - * - * This clock is only needed if the board provides an external USB_REFCLKIN - * signal, in which case it will be used as the parent of usb20_phy_clk and/or - * usb11_phy_clk. - */ -int __init da8xx_register_usb_refclkin(int rate) -{ - int ret; - - usb_refclkin.rate = rate; - ret = clk_register(&usb_refclkin); - if (ret) - return ret; - - clkdev_add(&usb_refclkin_lookup); - - return 0; -} - -static void usb20_phy_clk_enable(struct clk *clk) -{ - u32 val; - u32 timeout = 500000; /* 500 msec */ - - val = readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG)); - - /* The USB 2.O PLL requires that the USB 2.O PSC is enabled as well. */ - davinci_clk_enable(usb20_clk); - - /* - * Turn on the USB 2.0 PHY, but just the PLL, and not OTG. The USB 1.1 - * host may use the PLL clock without USB 2.0 OTG being used. - */ - val &= ~(CFGCHIP2_RESET | CFGCHIP2_PHYPWRDN); - val |= CFGCHIP2_PHY_PLLON; - - writel(val, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG)); - - while (--timeout) { - val = readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG)); - if (val & CFGCHIP2_PHYCLKGD) - goto done; - udelay(1); - } - - pr_err("Timeout waiting for USB 2.0 PHY clock good\n"); -done: - davinci_clk_disable(usb20_clk); -} - -static void usb20_phy_clk_disable(struct clk *clk) -{ - u32 val; - - val = readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG)); - val |= CFGCHIP2_PHYPWRDN; - writel(val, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG)); -} - -static int usb20_phy_clk_set_parent(struct clk *clk, struct clk *parent) -{ - u32 val; - - val = readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG)); - - /* Set the mux depending on the parent clock. */ - if (parent == &usb_refclkin) { - val &= ~CFGCHIP2_USB2PHYCLKMUX; - } else if (strcmp(parent->name, "pll0_aux_clk") == 0) { - val |= CFGCHIP2_USB2PHYCLKMUX; - } else { - pr_err("Bad parent on USB 2.0 PHY clock\n"); - return -EINVAL; - } - - /* reference frequency also comes from parent clock */ - val &= ~CFGCHIP2_REFFREQ_MASK; - switch (clk_get_rate(parent)) { - case 12000000: - val |= CFGCHIP2_REFFREQ_12MHZ; - break; - case 13000000: - val |= CFGCHIP2_REFFREQ_13MHZ; - break; - case 19200000: - val |= CFGCHIP2_REFFREQ_19_2MHZ; - break; - case 20000000: - val |= CFGCHIP2_REFFREQ_20MHZ; - break; - case 24000000: - val |= CFGCHIP2_REFFREQ_24MHZ; - break; - case 26000000: - val |= CFGCHIP2_REFFREQ_26MHZ; - break; - case 38400000: - val |= CFGCHIP2_REFFREQ_38_4MHZ; - break; - case 40000000: - val |= CFGCHIP2_REFFREQ_40MHZ; - break; - case 48000000: - val |= CFGCHIP2_REFFREQ_48MHZ; - break; - default: - pr_err("Bad parent clock rate on USB 2.0 PHY clock\n"); - return -EINVAL; - } - - writel(val, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG)); - - return 0; -} - -static struct clk usb20_phy_clk = { - .name = "usb0_clk48", - .clk_enable = usb20_phy_clk_enable, - .clk_disable = usb20_phy_clk_disable, - .set_parent = usb20_phy_clk_set_parent, -}; - -static struct clk_lookup usb20_phy_clk_lookup = - CLK("da8xx-usb-phy", "usb0_clk48", &usb20_phy_clk); - -/** - * da8xx_register_usb20_phy_clk - register USB0PHYCLKMUX clock - * - * @use_usb_refclkin: Selects the parent clock - either "usb_refclkin" if true - * or "pll0_aux" if false. - */ -int __init da8xx_register_usb20_phy_clk(bool use_usb_refclkin) -{ - struct clk *parent; - int ret; - - usb20_clk = clk_get(&da8xx_usb20_dev.dev, "usb20"); - ret = PTR_ERR_OR_ZERO(usb20_clk); - if (ret) - return ret; - - parent = clk_get(NULL, use_usb_refclkin ? "usb_refclkin" : "pll0_aux"); - ret = PTR_ERR_OR_ZERO(parent); - if (ret) { - clk_put(usb20_clk); - return ret; - } - - usb20_phy_clk.parent = parent; - ret = clk_register(&usb20_phy_clk); - if (!ret) - clkdev_add(&usb20_phy_clk_lookup); - - clk_put(parent); - - return ret; -} - -static int usb11_phy_clk_set_parent(struct clk *clk, struct clk *parent) -{ - u32 val; - - val = readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG)); - - /* Set the USB 1.1 PHY clock mux based on the parent clock. */ - if (parent == &usb20_phy_clk) { - val &= ~CFGCHIP2_USB1PHYCLKMUX; - } else if (parent == &usb_refclkin) { - val |= CFGCHIP2_USB1PHYCLKMUX; - } else { - pr_err("Bad parent on USB 1.1 PHY clock\n"); - return -EINVAL; - } - - writel(val, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG)); - - return 0; -} - -static struct clk usb11_phy_clk = { - .name = "usb1_clk48", - .set_parent = usb11_phy_clk_set_parent, -}; - -static struct clk_lookup usb11_phy_clk_lookup = - CLK("da8xx-usb-phy", "usb1_clk48", &usb11_phy_clk); - -/** - * da8xx_register_usb11_phy_clk - register USB1PHYCLKMUX clock - * - * @use_usb_refclkin: Selects the parent clock - either "usb_refclkin" if true - * or "usb0_clk48" if false. - */ -int __init da8xx_register_usb11_phy_clk(bool use_usb_refclkin) -{ - struct clk *parent; - int ret = 0; - - if (use_usb_refclkin) - parent = clk_get(NULL, "usb_refclkin"); - else - parent = clk_get(&da8xx_usb_phy.dev, "usb0_clk48"); - if (IS_ERR(parent)) - return PTR_ERR(parent); - - usb11_phy_clk.parent = parent; - ret = clk_register(&usb11_phy_clk); - if (!ret) - clkdev_add(&usb11_phy_clk_lookup); - - clk_put(parent); - - return ret; -} -#endif static struct platform_device da8xx_usb_phy_clks_device = { .name = "da830-usb-phy-clks", .id = -1, From 88ff663d50e09fdb36dae41fdf803d01529e6883 Mon Sep 17 00:00:00 2001 From: David Lechner Date: Fri, 18 May 2018 11:48:25 -0500 Subject: [PATCH 050/112] ARM: davinci: remove legacy clocks This removes the unused legacy clock code from arch/arm/mach-davinci/. Signed-off-by: David Lechner Reviewed-by: Sekhar Nori Signed-off-by: Sekhar Nori --- arch/arm/mach-davinci/clock.c | 745 -------------------- arch/arm/mach-davinci/clock.h | 72 -- arch/arm/mach-davinci/common.c | 2 - arch/arm/mach-davinci/devices.c | 1 - arch/arm/mach-davinci/include/mach/clock.h | 3 - arch/arm/mach-davinci/include/mach/common.h | 2 - arch/arm/mach-davinci/psc.c | 137 ---- arch/arm/mach-davinci/psc.h | 10 - arch/arm/mach-davinci/time.c | 2 - 9 files changed, 974 deletions(-) delete mode 100644 arch/arm/mach-davinci/clock.c delete mode 100644 arch/arm/mach-davinci/psc.c diff --git a/arch/arm/mach-davinci/clock.c b/arch/arm/mach-davinci/clock.c deleted file mode 100644 index f77a4f766050..000000000000 --- a/arch/arm/mach-davinci/clock.c +++ /dev/null @@ -1,745 +0,0 @@ -/* - * Clock and PLL control for DaVinci devices - * - * Copyright (C) 2006-2007 Texas Instruments. - * Copyright (C) 2008-2009 Deep Root Systems, LLC - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include "psc.h" -#include -#include "clock.h" - -static LIST_HEAD(clocks); -static DEFINE_MUTEX(clocks_mutex); -static DEFINE_SPINLOCK(clockfw_lock); - -void davinci_clk_enable(struct clk *clk) -{ - if (clk->parent) - davinci_clk_enable(clk->parent); - if (clk->usecount++ == 0) { - if (clk->flags & CLK_PSC) - davinci_psc_config(clk->domain, clk->gpsc, clk->lpsc, - true, clk->flags); - else if (clk->clk_enable) - clk->clk_enable(clk); - } -} - -void davinci_clk_disable(struct clk *clk) -{ - if (WARN_ON(clk->usecount == 0)) - return; - if (--clk->usecount == 0) { - if (!(clk->flags & CLK_PLL) && (clk->flags & CLK_PSC)) - davinci_psc_config(clk->domain, clk->gpsc, clk->lpsc, - false, clk->flags); - else if (clk->clk_disable) - clk->clk_disable(clk); - } - if (clk->parent) - davinci_clk_disable(clk->parent); -} - -int davinci_clk_reset(struct clk *clk, bool reset) -{ - unsigned long flags; - - if (clk == NULL || IS_ERR(clk)) - return -EINVAL; - - spin_lock_irqsave(&clockfw_lock, flags); - if (clk->flags & CLK_PSC) - davinci_psc_reset(clk->gpsc, clk->lpsc, reset); - spin_unlock_irqrestore(&clockfw_lock, flags); - - return 0; -} -EXPORT_SYMBOL(davinci_clk_reset); - -int davinci_clk_reset_assert(struct clk *clk) -{ - if (clk == NULL || IS_ERR(clk) || !clk->reset) - return -EINVAL; - - return clk->reset(clk, true); -} -EXPORT_SYMBOL(davinci_clk_reset_assert); - -int davinci_clk_reset_deassert(struct clk *clk) -{ - if (clk == NULL || IS_ERR(clk) || !clk->reset) - return -EINVAL; - - return clk->reset(clk, false); -} -EXPORT_SYMBOL(davinci_clk_reset_deassert); - -int clk_enable(struct clk *clk) -{ - unsigned long flags; - - if (!clk) - return 0; - else if (IS_ERR(clk)) - return -EINVAL; - - spin_lock_irqsave(&clockfw_lock, flags); - davinci_clk_enable(clk); - spin_unlock_irqrestore(&clockfw_lock, flags); - - return 0; -} -EXPORT_SYMBOL(clk_enable); - -void clk_disable(struct clk *clk) -{ - unsigned long flags; - - if (clk == NULL || IS_ERR(clk)) - return; - - spin_lock_irqsave(&clockfw_lock, flags); - davinci_clk_disable(clk); - spin_unlock_irqrestore(&clockfw_lock, flags); -} -EXPORT_SYMBOL(clk_disable); - -unsigned long clk_get_rate(struct clk *clk) -{ - if (clk == NULL || IS_ERR(clk)) - return 0; - - return clk->rate; -} -EXPORT_SYMBOL(clk_get_rate); - -long clk_round_rate(struct clk *clk, unsigned long rate) -{ - if (clk == NULL || IS_ERR(clk)) - return 0; - - if (clk->round_rate) - return clk->round_rate(clk, rate); - - return clk->rate; -} -EXPORT_SYMBOL(clk_round_rate); - -/* Propagate rate to children */ -static void propagate_rate(struct clk *root) -{ - struct clk *clk; - - list_for_each_entry(clk, &root->children, childnode) { - if (clk->recalc) - clk->rate = clk->recalc(clk); - propagate_rate(clk); - } -} - -int clk_set_rate(struct clk *clk, unsigned long rate) -{ - unsigned long flags; - int ret = -EINVAL; - - if (!clk) - return 0; - else if (IS_ERR(clk)) - return -EINVAL; - - if (clk->set_rate) - ret = clk->set_rate(clk, rate); - - spin_lock_irqsave(&clockfw_lock, flags); - if (ret == 0) { - if (clk->recalc) - clk->rate = clk->recalc(clk); - propagate_rate(clk); - } - spin_unlock_irqrestore(&clockfw_lock, flags); - - return ret; -} -EXPORT_SYMBOL(clk_set_rate); - -int clk_set_parent(struct clk *clk, struct clk *parent) -{ - unsigned long flags; - - if (!clk) - return 0; - else if (IS_ERR(clk)) - return -EINVAL; - - /* Cannot change parent on enabled clock */ - if (WARN_ON(clk->usecount)) - return -EINVAL; - - mutex_lock(&clocks_mutex); - if (clk->set_parent) { - int ret = clk->set_parent(clk, parent); - - if (ret) { - mutex_unlock(&clocks_mutex); - return ret; - } - } - clk->parent = parent; - list_del_init(&clk->childnode); - list_add(&clk->childnode, &clk->parent->children); - mutex_unlock(&clocks_mutex); - - spin_lock_irqsave(&clockfw_lock, flags); - if (clk->recalc) - clk->rate = clk->recalc(clk); - propagate_rate(clk); - spin_unlock_irqrestore(&clockfw_lock, flags); - - return 0; -} -EXPORT_SYMBOL(clk_set_parent); - -struct clk *clk_get_parent(struct clk *clk) -{ - if (!clk) - return NULL; - - return clk->parent; -} -EXPORT_SYMBOL(clk_get_parent); - -int clk_register(struct clk *clk) -{ - if (clk == NULL || IS_ERR(clk)) - return -EINVAL; - - if (WARN(clk->parent && !clk->parent->rate, - "CLK: %s parent %s has no rate!\n", - clk->name, clk->parent->name)) - return -EINVAL; - - INIT_LIST_HEAD(&clk->children); - - mutex_lock(&clocks_mutex); - list_add_tail(&clk->node, &clocks); - if (clk->parent) { - if (clk->set_parent) { - int ret = clk->set_parent(clk, clk->parent); - - if (ret) { - mutex_unlock(&clocks_mutex); - return ret; - } - } - list_add_tail(&clk->childnode, &clk->parent->children); - } - mutex_unlock(&clocks_mutex); - - /* If rate is already set, use it */ - if (clk->rate) - return 0; - - /* Else, see if there is a way to calculate it */ - if (clk->recalc) - clk->rate = clk->recalc(clk); - - /* Otherwise, default to parent rate */ - else if (clk->parent) - clk->rate = clk->parent->rate; - - return 0; -} -EXPORT_SYMBOL(clk_register); - -void clk_unregister(struct clk *clk) -{ - if (clk == NULL || IS_ERR(clk)) - return; - - mutex_lock(&clocks_mutex); - list_del(&clk->node); - list_del(&clk->childnode); - mutex_unlock(&clocks_mutex); -} -EXPORT_SYMBOL(clk_unregister); - -#ifdef CONFIG_DAVINCI_RESET_CLOCKS -/* - * Disable any unused clocks left on by the bootloader - */ -int __init davinci_clk_disable_unused(void) -{ - struct clk *ck; - - spin_lock_irq(&clockfw_lock); - list_for_each_entry(ck, &clocks, node) { - if (ck->usecount > 0) - continue; - if (!(ck->flags & CLK_PSC)) - continue; - - /* ignore if in Disabled or SwRstDisable states */ - if (!davinci_psc_is_clk_active(ck->gpsc, ck->lpsc)) - continue; - - pr_debug("Clocks: disable unused %s\n", ck->name); - - davinci_psc_config(ck->domain, ck->gpsc, ck->lpsc, - false, ck->flags); - } - spin_unlock_irq(&clockfw_lock); - - return 0; -} -#endif - -static unsigned long clk_sysclk_recalc(struct clk *clk) -{ - u32 v, plldiv; - struct pll_data *pll; - unsigned long rate = clk->rate; - - /* If this is the PLL base clock, no more calculations needed */ - if (clk->pll_data) - return rate; - - if (WARN_ON(!clk->parent)) - return rate; - - rate = clk->parent->rate; - - /* Otherwise, the parent must be a PLL */ - if (WARN_ON(!clk->parent->pll_data)) - return rate; - - pll = clk->parent->pll_data; - - /* If pre-PLL, source clock is before the multiplier and divider(s) */ - if (clk->flags & PRE_PLL) - rate = pll->input_rate; - - if (!clk->div_reg) - return rate; - - v = __raw_readl(pll->base + clk->div_reg); - if (v & PLLDIV_EN) { - plldiv = (v & pll->div_ratio_mask) + 1; - if (plldiv) - rate /= plldiv; - } - - return rate; -} - -int davinci_set_sysclk_rate(struct clk *clk, unsigned long rate) -{ - unsigned v; - struct pll_data *pll; - unsigned long input; - unsigned ratio = 0; - - /* If this is the PLL base clock, wrong function to call */ - if (clk->pll_data) - return -EINVAL; - - /* There must be a parent... */ - if (WARN_ON(!clk->parent)) - return -EINVAL; - - /* ... the parent must be a PLL... */ - if (WARN_ON(!clk->parent->pll_data)) - return -EINVAL; - - /* ... and this clock must have a divider. */ - if (WARN_ON(!clk->div_reg)) - return -EINVAL; - - pll = clk->parent->pll_data; - - input = clk->parent->rate; - - /* If pre-PLL, source clock is before the multiplier and divider(s) */ - if (clk->flags & PRE_PLL) - input = pll->input_rate; - - if (input > rate) { - /* - * Can afford to provide an output little higher than requested - * only if maximum rate supported by hardware on this sysclk - * is known. - */ - if (clk->maxrate) { - ratio = DIV_ROUND_CLOSEST(input, rate); - if (input / ratio > clk->maxrate) - ratio = 0; - } - - if (ratio == 0) - ratio = DIV_ROUND_UP(input, rate); - - ratio--; - } - - if (ratio > pll->div_ratio_mask) - return -EINVAL; - - do { - v = __raw_readl(pll->base + PLLSTAT); - } while (v & PLLSTAT_GOSTAT); - - v = __raw_readl(pll->base + clk->div_reg); - v &= ~pll->div_ratio_mask; - v |= ratio | PLLDIV_EN; - __raw_writel(v, pll->base + clk->div_reg); - - v = __raw_readl(pll->base + PLLCMD); - v |= PLLCMD_GOSET; - __raw_writel(v, pll->base + PLLCMD); - - do { - v = __raw_readl(pll->base + PLLSTAT); - } while (v & PLLSTAT_GOSTAT); - - return 0; -} -EXPORT_SYMBOL(davinci_set_sysclk_rate); - -static unsigned long clk_leafclk_recalc(struct clk *clk) -{ - if (WARN_ON(!clk->parent)) - return clk->rate; - - return clk->parent->rate; -} - -int davinci_simple_set_rate(struct clk *clk, unsigned long rate) -{ - clk->rate = rate; - return 0; -} - -static unsigned long clk_pllclk_recalc(struct clk *clk) -{ - u32 ctrl, mult = 1, prediv = 1, postdiv = 1; - u8 bypass; - struct pll_data *pll = clk->pll_data; - unsigned long rate = clk->rate; - - ctrl = __raw_readl(pll->base + PLLCTL); - rate = pll->input_rate = clk->parent->rate; - - if (ctrl & PLLCTL_PLLEN) { - bypass = 0; - mult = __raw_readl(pll->base + PLLM); - if (cpu_is_davinci_dm365()) - mult = 2 * (mult & PLLM_PLLM_MASK); - else - mult = (mult & PLLM_PLLM_MASK) + 1; - } else - bypass = 1; - - if (pll->flags & PLL_HAS_PREDIV) { - prediv = __raw_readl(pll->base + PREDIV); - if (prediv & PLLDIV_EN) - prediv = (prediv & pll->div_ratio_mask) + 1; - else - prediv = 1; - } - - /* pre-divider is fixed, but (some?) chips won't report that */ - if (cpu_is_davinci_dm355() && pll->num == 1) - prediv = 8; - - if (pll->flags & PLL_HAS_POSTDIV) { - postdiv = __raw_readl(pll->base + POSTDIV); - if (postdiv & PLLDIV_EN) - postdiv = (postdiv & pll->div_ratio_mask) + 1; - else - postdiv = 1; - } - - if (!bypass) { - rate /= prediv; - rate *= mult; - rate /= postdiv; - } - - pr_debug("PLL%d: input = %lu MHz [ ", - pll->num, clk->parent->rate / 1000000); - if (bypass) - pr_debug("bypass "); - if (prediv > 1) - pr_debug("/ %d ", prediv); - if (mult > 1) - pr_debug("* %d ", mult); - if (postdiv > 1) - pr_debug("/ %d ", postdiv); - pr_debug("] --> %lu MHz output.\n", rate / 1000000); - - return rate; -} - -/** - * davinci_set_pllrate - set the output rate of a given PLL. - * - * Note: Currently tested to work with OMAP-L138 only. - * - * @pll: pll whose rate needs to be changed. - * @prediv: The pre divider value. Passing 0 disables the pre-divider. - * @pllm: The multiplier value. Passing 0 leads to multiply-by-one. - * @postdiv: The post divider value. Passing 0 disables the post-divider. - */ -int davinci_set_pllrate(struct pll_data *pll, unsigned int prediv, - unsigned int mult, unsigned int postdiv) -{ - u32 ctrl; - unsigned int locktime; - unsigned long flags; - - if (pll->base == NULL) - return -EINVAL; - - /* - * PLL lock time required per OMAP-L138 datasheet is - * (2000 * prediv)/sqrt(pllm) OSCIN cycles. We approximate sqrt(pllm) - * as 4 and OSCIN cycle as 25 MHz. - */ - if (prediv) { - locktime = ((2000 * prediv) / 100); - prediv = (prediv - 1) | PLLDIV_EN; - } else { - locktime = PLL_LOCK_TIME; - } - if (postdiv) - postdiv = (postdiv - 1) | PLLDIV_EN; - if (mult) - mult = mult - 1; - - /* Protect against simultaneous calls to PLL setting seqeunce */ - spin_lock_irqsave(&clockfw_lock, flags); - - ctrl = __raw_readl(pll->base + PLLCTL); - - /* Switch the PLL to bypass mode */ - ctrl &= ~(PLLCTL_PLLENSRC | PLLCTL_PLLEN); - __raw_writel(ctrl, pll->base + PLLCTL); - - udelay(PLL_BYPASS_TIME); - - /* Reset and enable PLL */ - ctrl &= ~(PLLCTL_PLLRST | PLLCTL_PLLDIS); - __raw_writel(ctrl, pll->base + PLLCTL); - - if (pll->flags & PLL_HAS_PREDIV) - __raw_writel(prediv, pll->base + PREDIV); - - __raw_writel(mult, pll->base + PLLM); - - if (pll->flags & PLL_HAS_POSTDIV) - __raw_writel(postdiv, pll->base + POSTDIV); - - udelay(PLL_RESET_TIME); - - /* Bring PLL out of reset */ - ctrl |= PLLCTL_PLLRST; - __raw_writel(ctrl, pll->base + PLLCTL); - - udelay(locktime); - - /* Remove PLL from bypass mode */ - ctrl |= PLLCTL_PLLEN; - __raw_writel(ctrl, pll->base + PLLCTL); - - spin_unlock_irqrestore(&clockfw_lock, flags); - - return 0; -} -EXPORT_SYMBOL(davinci_set_pllrate); - -/** - * davinci_set_refclk_rate() - Set the reference clock rate - * @rate: The new rate. - * - * Sets the reference clock rate to a given value. This will most likely - * result in the entire clock tree getting updated. - * - * This is used to support boards which use a reference clock different - * than that used by default in .c file. The reference clock rate - * should be updated early in the boot process; ideally soon after the - * clock tree has been initialized once with the default reference clock - * rate (davinci_clk_init()). - * - * Returns 0 on success, error otherwise. - */ -int davinci_set_refclk_rate(unsigned long rate) -{ - struct clk *refclk; - - refclk = clk_get(NULL, "ref"); - if (IS_ERR(refclk)) { - pr_err("%s: failed to get reference clock\n", __func__); - return PTR_ERR(refclk); - } - - clk_set_rate(refclk, rate); - - clk_put(refclk); - - return 0; -} - -int __init davinci_clk_init(struct clk_lookup *clocks) -{ - struct clk_lookup *c; - struct clk *clk; - size_t num_clocks = 0; - - for (c = clocks; c->clk; c++) { - clk = c->clk; - - if (!clk->recalc) { - - /* Check if clock is a PLL */ - if (clk->pll_data) - clk->recalc = clk_pllclk_recalc; - - /* Else, if it is a PLL-derived clock */ - else if (clk->flags & CLK_PLL) - clk->recalc = clk_sysclk_recalc; - - /* Otherwise, it is a leaf clock (PSC clock) */ - else if (clk->parent) - clk->recalc = clk_leafclk_recalc; - } - - if (clk->pll_data) { - struct pll_data *pll = clk->pll_data; - - if (!pll->div_ratio_mask) - pll->div_ratio_mask = PLLDIV_RATIO_MASK; - - if (pll->phys_base && !pll->base) { - pll->base = ioremap(pll->phys_base, SZ_4K); - WARN_ON(!pll->base); - } - } - - if (clk->recalc) - clk->rate = clk->recalc(clk); - - if (clk->lpsc) - clk->flags |= CLK_PSC; - - if (clk->flags & PSC_LRST) - clk->reset = davinci_clk_reset; - - clk_register(clk); - num_clocks++; - - /* Turn on clocks that Linux doesn't otherwise manage */ - if (clk->flags & ALWAYS_ENABLED) - clk_enable(clk); - } - - clkdev_add_table(clocks, num_clocks); - - return 0; -} - -#ifdef CONFIG_DEBUG_FS - -#include -#include - -#define CLKNAME_MAX 10 /* longest clock name */ -#define NEST_DELTA 2 -#define NEST_MAX 4 - -static void -dump_clock(struct seq_file *s, unsigned nest, struct clk *parent) -{ - char *state; - char buf[CLKNAME_MAX + NEST_DELTA * NEST_MAX]; - struct clk *clk; - unsigned i; - - if (parent->flags & CLK_PLL) - state = "pll"; - else if (parent->flags & CLK_PSC) - state = "psc"; - else - state = ""; - - /* name */ - memset(buf, ' ', sizeof(buf) - 1); - buf[sizeof(buf) - 1] = 0; - i = strlen(parent->name); - memcpy(buf + nest, parent->name, - min(i, (unsigned)(sizeof(buf) - 1 - nest))); - - seq_printf(s, "%s users=%2d %-3s %9ld Hz\n", - buf, parent->usecount, state, clk_get_rate(parent)); - /* REVISIT show device associations too */ - - /* cost is now small, but not linear... */ - list_for_each_entry(clk, &parent->children, childnode) { - dump_clock(s, nest + NEST_DELTA, clk); - } -} - -static int davinci_ck_show(struct seq_file *m, void *v) -{ - struct clk *clk; - - /* - * Show clock tree; We trust nonzero usecounts equate to PSC enables... - */ - mutex_lock(&clocks_mutex); - list_for_each_entry(clk, &clocks, node) - if (!clk->parent) - dump_clock(m, 0, clk); - mutex_unlock(&clocks_mutex); - - return 0; -} - -static int davinci_ck_open(struct inode *inode, struct file *file) -{ - return single_open(file, davinci_ck_show, NULL); -} - -static const struct file_operations davinci_ck_operations = { - .open = davinci_ck_open, - .read = seq_read, - .llseek = seq_lseek, - .release = single_release, -}; - -static int __init davinci_clk_debugfs_init(void) -{ - debugfs_create_file("davinci_clocks", S_IFREG | S_IRUGO, NULL, NULL, - &davinci_ck_operations); - return 0; - -} -device_initcall(davinci_clk_debugfs_init); -#endif /* CONFIG_DEBUG_FS */ diff --git a/arch/arm/mach-davinci/clock.h b/arch/arm/mach-davinci/clock.h index 2d058568e004..307383472400 100644 --- a/arch/arm/mach-davinci/clock.h +++ b/arch/arm/mach-davinci/clock.h @@ -61,76 +61,4 @@ */ #define PLL_LOCK_TIME 20 -#ifndef __ASSEMBLER__ - -#include -#include - -#define PLLSTAT_GOSTAT BIT(0) -#define PLLCMD_GOSET BIT(0) - -struct pll_data { - u32 phys_base; - void __iomem *base; - u32 num; - u32 flags; - u32 input_rate; - u32 div_ratio_mask; -}; -#define PLL_HAS_PREDIV 0x01 -#define PLL_HAS_POSTDIV 0x02 - -struct clk { - struct list_head node; - struct module *owner; - const char *name; - unsigned long rate; - unsigned long maxrate; /* H/W supported max rate */ - u8 usecount; - u8 lpsc; - u8 gpsc; - u8 domain; - u32 flags; - struct clk *parent; - struct list_head children; /* list of children */ - struct list_head childnode; /* parent's child list node */ - struct pll_data *pll_data; - u32 div_reg; - unsigned long (*recalc) (struct clk *); - int (*set_rate) (struct clk *clk, unsigned long rate); - int (*round_rate) (struct clk *clk, unsigned long rate); - int (*reset) (struct clk *clk, bool reset); - void (*clk_enable) (struct clk *clk); - void (*clk_disable) (struct clk *clk); - int (*set_parent) (struct clk *clk, struct clk *parent); -}; - -/* Clock flags: SoC-specific flags start at BIT(16) */ -#define ALWAYS_ENABLED BIT(1) -#define CLK_PSC BIT(2) -#define CLK_PLL BIT(3) /* PLL-derived clock */ -#define PRE_PLL BIT(4) /* source is before PLL mult/div */ -#define PSC_SWRSTDISABLE BIT(5) /* Disable state is SwRstDisable */ -#define PSC_FORCE BIT(6) /* Force module state transtition */ -#define PSC_LRST BIT(8) /* Use local reset on enable/disable */ - -#define CLK(dev, con, ck) \ - { \ - .dev_id = dev, \ - .con_id = con, \ - .clk = ck, \ - } \ - -int davinci_clk_init(struct clk_lookup *clocks); -int davinci_set_pllrate(struct pll_data *pll, unsigned int prediv, - unsigned int mult, unsigned int postdiv); -int davinci_set_sysclk_rate(struct clk *clk, unsigned long rate); -int davinci_set_refclk_rate(unsigned long rate); -int davinci_simple_set_rate(struct clk *clk, unsigned long rate); -int davinci_clk_reset(struct clk *clk, bool reset); -void davinci_clk_enable(struct clk *clk); -void davinci_clk_disable(struct clk *clk); - -#endif - #endif diff --git a/arch/arm/mach-davinci/common.c b/arch/arm/mach-davinci/common.c index e03f95ccd95c..e1d0f0d841ff 100644 --- a/arch/arm/mach-davinci/common.c +++ b/arch/arm/mach-davinci/common.c @@ -20,8 +20,6 @@ #include #include -#include "clock.h" - struct davinci_soc_info davinci_soc_info; EXPORT_SYMBOL(davinci_soc_info); diff --git a/arch/arm/mach-davinci/devices.c b/arch/arm/mach-davinci/devices.c index 0edda4093e47..e8dbbb7479ab 100644 --- a/arch/arm/mach-davinci/devices.c +++ b/arch/arm/mach-davinci/devices.c @@ -26,7 +26,6 @@ #include "davinci.h" -#include "clock.h" #define DAVINCI_I2C_BASE 0x01C21000 #define DAVINCI_ATA_BASE 0x01C66000 diff --git a/arch/arm/mach-davinci/include/mach/clock.h b/arch/arm/mach-davinci/include/mach/clock.h index 3e8af6a0b64c..42ed4f2f5ce4 100644 --- a/arch/arm/mach-davinci/include/mach/clock.h +++ b/arch/arm/mach-davinci/include/mach/clock.h @@ -15,9 +15,6 @@ struct clk; -extern int clk_register(struct clk *clk); -extern void clk_unregister(struct clk *clk); - int davinci_clk_reset_assert(struct clk *c); int davinci_clk_reset_deassert(struct clk *c); diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h index ded8f5f42725..b577e13a9c23 100644 --- a/arch/arm/mach-davinci/include/mach/common.h +++ b/arch/arm/mach-davinci/include/mach/common.h @@ -54,8 +54,6 @@ struct davinci_soc_info { u32 jtag_id_reg; struct davinci_id *ids; unsigned long ids_num; - u32 *psc_bases; - unsigned long psc_bases_num; u32 pinmux_base; const struct mux_config *pinmux_pins; unsigned long pinmux_pins_num; diff --git a/arch/arm/mach-davinci/psc.c b/arch/arm/mach-davinci/psc.c deleted file mode 100644 index e5dc6bfde5f3..000000000000 --- a/arch/arm/mach-davinci/psc.c +++ /dev/null @@ -1,137 +0,0 @@ -/* - * TI DaVinci Power and Sleep Controller (PSC) - * - * Copyright (C) 2006 Texas Instruments. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - * - */ -#include -#include -#include - -#include -#include "psc.h" - -#include "clock.h" - -/* Return nonzero iff the domain's clock is active */ -int __init davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id) -{ - void __iomem *psc_base; - u32 mdstat; - struct davinci_soc_info *soc_info = &davinci_soc_info; - - if (!soc_info->psc_bases || (ctlr >= soc_info->psc_bases_num)) { - pr_warn("PSC: Bad psc data: 0x%x[%d]\n", - (int)soc_info->psc_bases, ctlr); - return 0; - } - - psc_base = ioremap(soc_info->psc_bases[ctlr], SZ_4K); - mdstat = __raw_readl(psc_base + MDSTAT + 4 * id); - iounmap(psc_base); - - /* if clocked, state can be "Enable" or "SyncReset" */ - return mdstat & BIT(12); -} - -/* Control "reset" line associated with PSC domain */ -void davinci_psc_reset(unsigned int ctlr, unsigned int id, bool reset) -{ - u32 mdctl; - void __iomem *psc_base; - struct davinci_soc_info *soc_info = &davinci_soc_info; - - if (!soc_info->psc_bases || (ctlr >= soc_info->psc_bases_num)) { - pr_warn("PSC: Bad psc data: 0x%x[%d]\n", - (int)soc_info->psc_bases, ctlr); - return; - } - - psc_base = ioremap(soc_info->psc_bases[ctlr], SZ_4K); - - mdctl = readl(psc_base + MDCTL + 4 * id); - if (reset) - mdctl &= ~MDCTL_LRST; - else - mdctl |= MDCTL_LRST; - writel(mdctl, psc_base + MDCTL + 4 * id); - - iounmap(psc_base); -} - -/* Enable or disable a PSC domain */ -void davinci_psc_config(unsigned int domain, unsigned int ctlr, - unsigned int id, bool enable, u32 flags) -{ - u32 epcpr, ptcmd, ptstat, pdstat, pdctl, mdstat, mdctl; - void __iomem *psc_base; - struct davinci_soc_info *soc_info = &davinci_soc_info; - u32 next_state = PSC_STATE_ENABLE; - - if (!soc_info->psc_bases || (ctlr >= soc_info->psc_bases_num)) { - pr_warn("PSC: Bad psc data: 0x%x[%d]\n", - (int)soc_info->psc_bases, ctlr); - return; - } - - psc_base = ioremap(soc_info->psc_bases[ctlr], SZ_4K); - - if (!enable) { - if (flags & PSC_SWRSTDISABLE) - next_state = PSC_STATE_SWRSTDISABLE; - else - next_state = PSC_STATE_DISABLE; - } - - mdctl = __raw_readl(psc_base + MDCTL + 4 * id); - mdctl &= ~MDSTAT_STATE_MASK; - mdctl |= next_state; - if (flags & PSC_FORCE) - mdctl |= MDCTL_FORCE; - __raw_writel(mdctl, psc_base + MDCTL + 4 * id); - - pdstat = __raw_readl(psc_base + PDSTAT + 4 * domain); - if ((pdstat & PDSTAT_STATE_MASK) == 0) { - pdctl = __raw_readl(psc_base + PDCTL + 4 * domain); - pdctl |= PDCTL_NEXT; - __raw_writel(pdctl, psc_base + PDCTL + 4 * domain); - - ptcmd = 1 << domain; - __raw_writel(ptcmd, psc_base + PTCMD); - - do { - epcpr = __raw_readl(psc_base + EPCPR); - } while ((((epcpr >> domain) & 1) == 0)); - - pdctl = __raw_readl(psc_base + PDCTL + 4 * domain); - pdctl |= PDCTL_EPCGOOD; - __raw_writel(pdctl, psc_base + PDCTL + 4 * domain); - } else { - ptcmd = 1 << domain; - __raw_writel(ptcmd, psc_base + PTCMD); - } - - do { - ptstat = __raw_readl(psc_base + PTSTAT); - } while (!(((ptstat >> domain) & 1) == 0)); - - do { - mdstat = __raw_readl(psc_base + MDSTAT + 4 * id); - } while (!((mdstat & MDSTAT_STATE_MASK) == next_state)); - - iounmap(psc_base); -} diff --git a/arch/arm/mach-davinci/psc.h b/arch/arm/mach-davinci/psc.h index b58707cf7033..68cd9d3fc82b 100644 --- a/arch/arm/mach-davinci/psc.h +++ b/arch/arm/mach-davinci/psc.h @@ -204,14 +204,4 @@ #define PDCTL_NEXT BIT(0) #define PDCTL_EPCGOOD BIT(8) -#ifndef __ASSEMBLER__ - -extern int davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id); -extern void davinci_psc_reset(unsigned int ctlr, unsigned int id, - bool reset); -extern void davinci_psc_config(unsigned int domain, unsigned int ctlr, - unsigned int id, bool enable, u32 flags); - -#endif - #endif /* __ASM_ARCH_PSC_H */ diff --git a/arch/arm/mach-davinci/time.c b/arch/arm/mach-davinci/time.c index 486896f309c5..7ea3db0ff062 100644 --- a/arch/arm/mach-davinci/time.c +++ b/arch/arm/mach-davinci/time.c @@ -27,8 +27,6 @@ #include #include -#include "clock.h" - static struct clock_event_device clockevent_davinci; static unsigned int davinci_clock_tick_rate; From 62604824d234ddf456dd4a97f52bcd0f4e534446 Mon Sep 17 00:00:00 2001 From: David Lechner Date: Fri, 18 May 2018 11:48:27 -0500 Subject: [PATCH 051/112] ARM: davinci: add device tree support to timer This adds device tree support to the davinci timer so that when clocks are moved to device tree, the timer will still work. Signed-off-by: David Lechner Signed-off-by: Sekhar Nori --- arch/arm/mach-davinci/Kconfig | 1 + arch/arm/mach-davinci/time.c | 15 +++++++++++++++ 2 files changed, 16 insertions(+) diff --git a/arch/arm/mach-davinci/Kconfig b/arch/arm/mach-davinci/Kconfig index ba9912b4dfab..da8a039d65f9 100644 --- a/arch/arm/mach-davinci/Kconfig +++ b/arch/arm/mach-davinci/Kconfig @@ -59,6 +59,7 @@ config MACH_DA8XX_DT default y depends on ARCH_DAVINCI_DA850 select PINCTRL + select TIMER_OF help Say y here to include support for TI DaVinci DA850 based using Flattened Device Tree. More information at Documentation/devicetree diff --git a/arch/arm/mach-davinci/time.c b/arch/arm/mach-davinci/time.c index 7ea3db0ff062..5a6de5368ab0 100644 --- a/arch/arm/mach-davinci/time.c +++ b/arch/arm/mach-davinci/time.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include @@ -397,3 +398,17 @@ void __init davinci_timer_init(struct clk *timer_clk) for (i=0; i< ARRAY_SIZE(timers); i++) timer32_config(&timers[i]); } + +static int __init of_davinci_timer_init(struct device_node *np) +{ + struct clk *clk; + + clk = of_clk_get(np, 0); + if (IS_ERR(clk)) + return PTR_ERR(clk); + + davinci_timer_init(clk); + + return 0; +} +TIMER_OF_DECLARE(davinci_timer, "ti,da830-timer", of_davinci_timer_init); From bfd107bd3b8ba4ce5f5536fe1d69d0ba06d0e741 Mon Sep 17 00:00:00 2001 From: David Lechner Date: Fri, 18 May 2018 11:48:28 -0500 Subject: [PATCH 052/112] ARM: davinci: da8xx-dt: switch to device tree clocks This removes all of the clock init code from da8xx-dt.c. This includes all of the OF_DEV_AUXDATA that was just used for looking up clocks. Signed-off-by: David Lechner Signed-off-by: Sekhar Nori --- arch/arm/mach-davinci/da8xx-dt.c | 64 ------------------------------- arch/arm/mach-davinci/pm_domain.c | 5 +++ 2 files changed, 5 insertions(+), 64 deletions(-) diff --git a/arch/arm/mach-davinci/da8xx-dt.c b/arch/arm/mach-davinci/da8xx-dt.c index 088bc5c0318b..beac80ec4037 100644 --- a/arch/arm/mach-davinci/da8xx-dt.c +++ b/arch/arm/mach-davinci/da8xx-dt.c @@ -7,79 +7,16 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ -#include -#include -#include -#include -#include #include #include -#include "cp_intc.h" #include -static struct of_dev_auxdata da850_aemif_auxdata_lookup[] = { - OF_DEV_AUXDATA("ti,davinci-nand", 0x62000000, "davinci-nand.0", NULL), - {} -}; - -static struct aemif_platform_data aemif_data = { - .dev_lookup = da850_aemif_auxdata_lookup, -}; - -static struct of_dev_auxdata da850_auxdata_lookup[] __initdata = { - OF_DEV_AUXDATA("ti,davinci-i2c", 0x01c22000, "i2c_davinci.1", NULL), - OF_DEV_AUXDATA("ti,davinci-i2c", 0x01e28000, "i2c_davinci.2", NULL), - OF_DEV_AUXDATA("ti,davinci-wdt", 0x01c21000, "davinci-wdt", NULL), - OF_DEV_AUXDATA("ti,da830-mmc", 0x01c40000, "da830-mmc.0", NULL), - OF_DEV_AUXDATA("ti,da850-ehrpwm", 0x01f00000, "ehrpwm.0", NULL), - OF_DEV_AUXDATA("ti,da850-ehrpwm", 0x01f02000, "ehrpwm.1", NULL), - OF_DEV_AUXDATA("ti,da850-ecap", 0x01f06000, "ecap.0", NULL), - OF_DEV_AUXDATA("ti,da850-ecap", 0x01f07000, "ecap.1", NULL), - OF_DEV_AUXDATA("ti,da850-ecap", 0x01f08000, "ecap.2", NULL), - OF_DEV_AUXDATA("ti,da830-spi", 0x01c41000, "spi_davinci.0", NULL), - OF_DEV_AUXDATA("ti,da830-spi", 0x01f0e000, "spi_davinci.1", NULL), - OF_DEV_AUXDATA("ns16550a", 0x01c42000, "serial8250.0", NULL), - OF_DEV_AUXDATA("ns16550a", 0x01d0c000, "serial8250.1", NULL), - OF_DEV_AUXDATA("ns16550a", 0x01d0d000, "serial8250.2", NULL), - OF_DEV_AUXDATA("ti,davinci_mdio", 0x01e24000, "davinci_mdio.0", NULL), - OF_DEV_AUXDATA("ti,davinci-dm6467-emac", 0x01e20000, "davinci_emac.1", - NULL), - OF_DEV_AUXDATA("ti,da830-mcasp-audio", 0x01d00000, "davinci-mcasp.0", NULL), - OF_DEV_AUXDATA("ti,da850-aemif", 0x68000000, "ti-aemif", &aemif_data), - OF_DEV_AUXDATA("ti,da850-tilcdc", 0x01e13000, "da8xx_lcdc.0", NULL), - OF_DEV_AUXDATA("ti,da830-ohci", 0x01e25000, "ohci-da8xx", NULL), - OF_DEV_AUXDATA("ti,da830-musb", 0x01e00000, "musb-da8xx", NULL), - OF_DEV_AUXDATA("ti,da830-usb-phy", 0x01c1417c, "da8xx-usb-phy", NULL), - OF_DEV_AUXDATA("ti,da850-ahci", 0x01e18000, "ahci_da850", NULL), - OF_DEV_AUXDATA("ti,da850-vpif", 0x01e17000, "vpif", NULL), - OF_DEV_AUXDATA("ti,da850-dsp", 0x11800000, "davinci-rproc.0", NULL), - {} -}; - #ifdef CONFIG_ARCH_DAVINCI_DA850 static void __init da850_init_machine(void) { - /* All existing boards use 100MHz SATA refclkpn */ - static const unsigned long sata_refclkpn = 100 * 1000 * 1000; - - int ret; - - da850_register_clocks(); - - ret = da8xx_register_usb_phy_clocks(); - if (ret) - pr_warn("%s: USB PHY CLK registration failed: %d\n", - __func__, ret); - - ret = da850_register_sata_refclk(sata_refclkpn); - if (ret) - pr_warn("%s: registering SATA REFCLK failed: %d", - __func__, ret); - - of_platform_default_populate(NULL, da850_auxdata_lookup, NULL); davinci_pm_init(); pdata_quirks_init(); } @@ -94,7 +31,6 @@ static const char *const da850_boards_compat[] __initconst = { DT_MACHINE_START(DA850_DT, "Generic DA850/OMAP-L138/AM18x") .map_io = da850_init, - .init_time = da850_init_time, .init_machine = da850_init_machine, .dt_compat = da850_boards_compat, .init_late = davinci_init_late, diff --git a/arch/arm/mach-davinci/pm_domain.c b/arch/arm/mach-davinci/pm_domain.c index 78eac2c0c146..e251fd593bfd 100644 --- a/arch/arm/mach-davinci/pm_domain.c +++ b/arch/arm/mach-davinci/pm_domain.c @@ -13,6 +13,7 @@ #include #include #include +#include static struct dev_pm_domain davinci_pm_domain = { .ops = { @@ -28,6 +29,10 @@ static struct pm_clk_notifier_block platform_bus_notifier = { static int __init davinci_pm_runtime_init(void) { + if (of_have_populated_dt()) + return 0; + + /* Use pm_clk as fallback if we're not using genpd. */ pm_clk_add_notifier(&platform_bus_type, &platform_bus_notifier); return 0; From d0d378ff451a66e486488eec842e507d28145813 Mon Sep 17 00:00:00 2001 From: Ethan Tuttle Date: Tue, 19 Jun 2018 21:31:08 -0700 Subject: [PATCH 053/112] ARM: mvebu: declare asm symbols as character arrays in pmsu.c With CONFIG_FORTIFY_SOURCE, memcpy uses the declared size of operands to detect buffer overflows. If src or dest is declared as a char, attempts to copy more than byte will result in a fortify_panic(). Address this problem in mvebu_setup_boot_addr_wa() by declaring mvebu_boot_wa_start and mvebu_boot_wa_end as character arrays. Also remove a couple addressof operators to avoid "arithmetic on pointer to an incomplete type" compiler error. See commit 54a7d50b9205 ("x86: mark kprobe templates as character arrays, not single characters") for a similar fix. Fixes "detected buffer overflow in memcpy" error during init on some mvebu systems (armada-370-xp, armada-375): (fortify_panic) from (mvebu_setup_boot_addr_wa+0xb0/0xb4) (mvebu_setup_boot_addr_wa) from (mvebu_v7_cpu_pm_init+0x154/0x204) (mvebu_v7_cpu_pm_init) from (do_one_initcall+0x7c/0x1a8) (do_one_initcall) from (kernel_init_freeable+0x1bc/0x254) (kernel_init_freeable) from (kernel_init+0x8/0x114) (kernel_init) from (ret_from_fork+0x14/0x2c) Signed-off-by: Ethan Tuttle Tested-by: Ethan Tuttle Signed-off-by: Gregory CLEMENT --- arch/arm/mach-mvebu/pmsu.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-mvebu/pmsu.c b/arch/arm/mach-mvebu/pmsu.c index 27a78c80e5b1..73d5d72dfc3e 100644 --- a/arch/arm/mach-mvebu/pmsu.c +++ b/arch/arm/mach-mvebu/pmsu.c @@ -116,8 +116,8 @@ void mvebu_pmsu_set_cpu_boot_addr(int hw_cpu, void *boot_addr) PMSU_BOOT_ADDR_REDIRECT_OFFSET(hw_cpu)); } -extern unsigned char mvebu_boot_wa_start; -extern unsigned char mvebu_boot_wa_end; +extern unsigned char mvebu_boot_wa_start[]; +extern unsigned char mvebu_boot_wa_end[]; /* * This function sets up the boot address workaround needed for SMP @@ -130,7 +130,7 @@ int mvebu_setup_boot_addr_wa(unsigned int crypto_eng_target, phys_addr_t resume_addr_reg) { void __iomem *sram_virt_base; - u32 code_len = &mvebu_boot_wa_end - &mvebu_boot_wa_start; + u32 code_len = mvebu_boot_wa_end - mvebu_boot_wa_start; mvebu_mbus_del_window(BOOTROM_BASE, BOOTROM_SIZE); mvebu_mbus_add_window_by_id(crypto_eng_target, crypto_eng_attribute, From 77bc8c28ddac90287bc42c129002eb703288d550 Mon Sep 17 00:00:00 2001 From: Lucas Stach Date: Mon, 18 Jun 2018 17:32:30 +0200 Subject: [PATCH 054/112] ARM: mvebu: convert secondary CPU clock sync to hotplug state The current call site in boot_secondary is causing sleep in invalid context warnings, as this part of the code is running with interrrupts disabled and some of the calls into the clock framework might sleep on a mutex. Convert the secondary CPU clock sync to a hotplug state, which allows to call it from a sleepable context. Signed-off-by: Lucas Stach Signed-off-by: Gregory CLEMENT --- arch/arm/mach-mvebu/platsmp.c | 49 ++++++++++++++++------------------- include/linux/cpuhotplug.h | 1 + 2 files changed, 24 insertions(+), 26 deletions(-) diff --git a/arch/arm/mach-mvebu/platsmp.c b/arch/arm/mach-mvebu/platsmp.c index 4ffbbd217e82..c130497dc6cc 100644 --- a/arch/arm/mach-mvebu/platsmp.c +++ b/arch/arm/mach-mvebu/platsmp.c @@ -35,6 +35,8 @@ #define AXP_BOOTROM_BASE 0xfff00000 #define AXP_BOOTROM_SIZE 0x100000 +static struct clk *boot_cpu_clk; + static struct clk *get_cpu_clk(int cpu) { struct clk *cpu_clk; @@ -48,30 +50,6 @@ static struct clk *get_cpu_clk(int cpu) return cpu_clk; } -static void set_secondary_cpu_clock(unsigned int cpu) -{ - int thiscpu; - unsigned long rate; - struct clk *cpu_clk; - - thiscpu = get_cpu(); - - cpu_clk = get_cpu_clk(thiscpu); - if (!cpu_clk) - goto out; - clk_prepare_enable(cpu_clk); - rate = clk_get_rate(cpu_clk); - - cpu_clk = get_cpu_clk(cpu); - if (!cpu_clk) - goto out; - clk_set_rate(cpu_clk, rate); - clk_prepare_enable(cpu_clk); - -out: - put_cpu(); -} - static int armada_xp_boot_secondary(unsigned int cpu, struct task_struct *idle) { int ret, hw_cpu; @@ -79,7 +57,6 @@ static int armada_xp_boot_secondary(unsigned int cpu, struct task_struct *idle) pr_info("Booting CPU %d\n", cpu); hw_cpu = cpu_logical_map(cpu); - set_secondary_cpu_clock(hw_cpu); mvebu_pmsu_set_cpu_boot_addr(hw_cpu, armada_xp_secondary_startup); /* @@ -122,6 +99,19 @@ static void __init armada_xp_smp_init_cpus(void) panic("Invalid number of CPUs in DT\n"); } +static int armada_xp_sync_secondary_clk(unsigned int cpu) +{ + struct clk *cpu_clk = get_cpu_clk(cpu); + + if (!cpu_clk || !boot_cpu_clk) + return 0; + + clk_prepare_enable(cpu_clk); + clk_set_rate(cpu_clk, clk_get_rate(boot_cpu_clk)); + + return 0; +} + static void __init armada_xp_smp_prepare_cpus(unsigned int max_cpus) { struct device_node *node; @@ -131,6 +121,14 @@ static void __init armada_xp_smp_prepare_cpus(unsigned int max_cpus) flush_cache_all(); set_cpu_coherent(); + boot_cpu_clk = get_cpu_clk(smp_processor_id()); + if (boot_cpu_clk) { + clk_prepare_enable(boot_cpu_clk); + cpuhp_setup_state_nocalls(CPUHP_AP_ARM_MVEBU_SYNC_CLOCKS, + "arm/mvebu/sync_clocks:online", + armada_xp_sync_secondary_clk, NULL); + } + /* * In order to boot the secondary CPUs we need to ensure * the bootROM is mapped at the correct address. @@ -223,7 +221,6 @@ static int mv98dx3236_boot_secondary(unsigned int cpu, struct task_struct *idle) int ret, hw_cpu; hw_cpu = cpu_logical_map(cpu); - set_secondary_cpu_clock(hw_cpu); mv98dx3236_resume_set_cpu_boot_addr(hw_cpu, armada_xp_secondary_startup); diff --git a/include/linux/cpuhotplug.h b/include/linux/cpuhotplug.h index 8796ba387152..fa54e5fbea38 100644 --- a/include/linux/cpuhotplug.h +++ b/include/linux/cpuhotplug.h @@ -143,6 +143,7 @@ enum cpuhp_state { CPUHP_AP_SMPBOOT_THREADS, CPUHP_AP_X86_VDSO_VMA_ONLINE, CPUHP_AP_IRQ_AFFINITY_ONLINE, + CPUHP_AP_ARM_MVEBU_SYNC_CLOCKS, CPUHP_AP_PERF_ONLINE, CPUHP_AP_PERF_X86_ONLINE, CPUHP_AP_PERF_X86_UNCORE_ONLINE, From 23295aeebf0706c717adf55487779b19a3605e21 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 19 Jun 2018 19:20:49 +0200 Subject: [PATCH 055/112] ARM: shmobile: rcar-gen2: Stop compiling headsmp-apmu on !SMP As of commit cad160ed0a94927e ("ARM: shmobile: Convert file to use cntvoff"), there's no non-SMP code left in headsmp-apmu.S. Hence build the file for SMP only, and drop the no longer needed check for CONFIG_SMP inside the file. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/Makefile | 2 +- arch/arm/mach-shmobile/headsmp-apmu.S | 2 -- 2 files changed, 1 insertion(+), 3 deletions(-) diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile index 05ba728ed4f6..b33dc59d8698 100644 --- a/arch/arm/mach-shmobile/Makefile +++ b/arch/arm/mach-shmobile/Makefile @@ -21,13 +21,13 @@ cpu-y := platsmp.o headsmp.o # Shared SoC family objects obj-$(CONFIG_ARCH_RCAR_GEN2) += setup-rcar-gen2.o platsmp-apmu.o $(cpu-y) CFLAGS_setup-rcar-gen2.o += -march=armv7-a -obj-$(CONFIG_ARCH_RCAR_GEN2) += headsmp-apmu.o obj-$(CONFIG_ARCH_R8A7790) += regulator-quirk-rcar-gen2.o obj-$(CONFIG_ARCH_R8A7791) += regulator-quirk-rcar-gen2.o obj-$(CONFIG_ARCH_R8A7793) += regulator-quirk-rcar-gen2.o # SMP objects smp-y := $(cpu-y) +smp-$(CONFIG_ARCH_RCAR_GEN2) += headsmp-apmu.o smp-$(CONFIG_ARCH_SH73A0) += smp-sh73a0.o headsmp-scu.o platsmp-scu.o smp-$(CONFIG_ARCH_R8A7779) += smp-r8a7779.o headsmp-scu.o platsmp-scu.o smp-$(CONFIG_ARCH_EMEV2) += smp-emev2.o headsmp-scu.o platsmp-scu.o diff --git a/arch/arm/mach-shmobile/headsmp-apmu.S b/arch/arm/mach-shmobile/headsmp-apmu.S index a7b4bc7a087b..fabe9cadd12e 100644 --- a/arch/arm/mach-shmobile/headsmp-apmu.S +++ b/arch/arm/mach-shmobile/headsmp-apmu.S @@ -8,9 +8,7 @@ #include #include -#ifdef CONFIG_SMP ENTRY(shmobile_boot_apmu) bl secure_cntvoff_init b secondary_startup ENDPROC(shmobile_boot_apmu) -#endif From 40dda8720b8d8f972336f5b9910677e953f8232a Mon Sep 17 00:00:00 2001 From: Arvind Yadav Date: Tue, 26 Dec 2017 12:07:11 +0530 Subject: [PATCH 056/112] ARM: OMAP1: constify gpio_led gpio_led are not supposed to change at runtime. struct gpio_led_platform_data working with const gpio_led provided by . So mark the non-const structs as const. Signed-off-by: Arvind Yadav Signed-off-by: Tony Lindgren --- arch/arm/mach-omap1/board-h2.c | 2 +- arch/arm/mach-omap1/board-h3.c | 2 +- arch/arm/mach-omap1/board-htcherald.c | 2 +- arch/arm/mach-omap1/board-osk.c | 4 ++-- 4 files changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c index ab51f8554697..9aeb8ad8c327 100644 --- a/arch/arm/mach-omap1/board-h2.c +++ b/arch/arm/mach-omap1/board-h2.c @@ -274,7 +274,7 @@ static struct platform_device h2_kp_device = { .resource = h2_kp_resources, }; -static struct gpio_led h2_gpio_led_pins[] = { +static const struct gpio_led h2_gpio_led_pins[] = { { .name = "h2:red", .default_trigger = "heartbeat", diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c index ad339f51cc78..2edcd6356f2d 100644 --- a/arch/arm/mach-omap1/board-h3.c +++ b/arch/arm/mach-omap1/board-h3.c @@ -326,7 +326,7 @@ static struct spi_board_info h3_spi_board_info[] __initdata = { }, }; -static struct gpio_led h3_gpio_led_pins[] = { +static const struct gpio_led h3_gpio_led_pins[] = { { .name = "h3:red", .default_trigger = "heartbeat", diff --git a/arch/arm/mach-omap1/board-htcherald.c b/arch/arm/mach-omap1/board-htcherald.c index da8f3fc3180f..5733212759d3 100644 --- a/arch/arm/mach-omap1/board-htcherald.c +++ b/arch/arm/mach-omap1/board-htcherald.c @@ -292,7 +292,7 @@ static struct platform_device herald_gpiokeys_device = { }; /* LEDs for the Herald. These connect to the HTCPLD GPIO device. */ -static struct gpio_led gpio_leds[] = { +static const struct gpio_led gpio_leds[] = { {"dpad", NULL, HTCPLD_GPIO_LED_DPAD, 0, 0, LEDS_GPIO_DEFSTATE_OFF}, {"kbd", NULL, HTCPLD_GPIO_LED_KBD, 0, 0, LEDS_GPIO_DEFSTATE_OFF}, {"vibrate", NULL, HTCPLD_GPIO_LED_VIBRATE, 0, 0, LEDS_GPIO_DEFSTATE_OFF}, diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c index 9ffa8d755a59..4df15e693b6e 100644 --- a/arch/arm/mach-omap1/board-osk.c +++ b/arch/arm/mach-omap1/board-osk.c @@ -167,7 +167,7 @@ static struct platform_device *osk5912_devices[] __initdata = { &osk5912_cf_device, }; -static struct gpio_led tps_leds[] = { +static const struct gpio_led tps_leds[] = { /* NOTE: D9 and D2 have hardware blink support. * Also, D9 requires non-battery power. */ @@ -385,7 +385,7 @@ static struct platform_device osk5912_lcd_device = { .id = -1, }; -static struct gpio_led mistral_gpio_led_pins[] = { +static const struct gpio_led mistral_gpio_led_pins[] = { { .name = "mistral:red", .default_trigger = "heartbeat", From 3e14de3bfb3afc296a33f1ccbab6d781e5bbb482 Mon Sep 17 00:00:00 2001 From: Janusz Krzysztofik Date: Sun, 27 May 2018 15:55:47 +0200 Subject: [PATCH 057/112] ARM: OMAP1: ams-delta: refactor late_init() Before the board level GPIO handling is converted from GPIO numbers to GPIO descriptors, split late_init() into functional blocks and move them to separate functions. While being at it, drop machine type check from late_init() - the function is now called from the board init_late callback so there is no need for yet another applicability check. Signed-off-by: Janusz Krzysztofik Signed-off-by: Tony Lindgren --- arch/arm/mach-omap1/board-ams-delta.c | 55 +++++++++++++++++++++------ 1 file changed, 43 insertions(+), 12 deletions(-) diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c index 80f54cb54276..cdba8decc532 100644 --- a/arch/arm/mach-omap1/board-ams-delta.c +++ b/arch/arm/mach-omap1/board-ams-delta.c @@ -643,19 +643,19 @@ static struct platform_device ams_delta_modem_device = { }, }; -static int __init late_init(void) +static int __init ams_delta_gpio_init(void) { int err; - if (!machine_is_ams_delta()) - return -ENODEV; - err = gpio_request_array(latch_gpios, ARRAY_SIZE(latch_gpios)); - if (err) { + if (err) pr_err("Couldn't take over latch1/latch2 GPIO pins\n"); - return err; - } + return err; +} + +static void __init ams_delta_late_devices(void) +{ platform_add_devices(late_devices, ARRAY_SIZE(late_devices)); /* @@ -666,12 +666,23 @@ static int __init late_init(void) ams_delta_nand_gpio_table.dev_id = dev_name(&ams_delta_nand_device.dev); gpiod_add_lookup_tables(late_gpio_tables, ARRAY_SIZE(late_gpio_tables)); +} + +static int __init modem_nreset_init(void) +{ + int err; err = platform_device_register(&modem_nreset_device); - if (err) { + if (err) pr_err("Couldn't register the modem regulator device\n"); - return err; - } + + return err; +} + + +static int __init ams_delta_modem_init(void) +{ + int err; omap_cfg_reg(M14_1510_GPIO2); ams_delta_modem_ports[0].irq = @@ -692,7 +703,28 @@ static int __init late_init(void) err = platform_device_register(&ams_delta_modem_device); if (err) - goto gpio_free; + gpio_free(AMS_DELTA_GPIO_PIN_MODEM_IRQ); + + return err; +} + +static int __init late_init(void) +{ + int err; + + err = ams_delta_gpio_init(); + if (err) + return err; + + ams_delta_late_devices(); + + err = modem_nreset_init(); + if (err) + return err; + + err = ams_delta_modem_init(); + if (err) + return err; /* * Once the modem device is registered, the modem_nreset @@ -708,7 +740,6 @@ static int __init late_init(void) unregister: platform_device_unregister(&ams_delta_modem_device); -gpio_free: gpio_free(AMS_DELTA_GPIO_PIN_MODEM_IRQ); return err; } From 8c14b0846f5c6e5e043c9250cbe34b44a0e216b7 Mon Sep 17 00:00:00 2001 From: Janusz Krzysztofik Date: Sun, 27 May 2018 15:55:48 +0200 Subject: [PATCH 058/112] ARM: OMAP1: ams-delta: assign LED GPIO numbers from descriptors Assign a label to latch1 GPIO device the LEDs hang off, enumerate its pins for the purpose of indexing gpio_led table, remove hardcoded GPIO numbers from that table replacing them with invalid GPIO numbers and remove initialization of incompletely described LED device from machine_init. As soon as the latch1 GPIO device is registered, use its label to find respective GPIO chip, identify each LED's GPIO descriptor by its pin number and assign its gobal GPIO number to the gpio_led table. Once completed, register the LED device. Created and tested against linux-v4.17-rc3. Signed-off-by: Janusz Krzysztofik Signed-off-by: Tony Lindgren --- arch/arm/mach-omap1/board-ams-delta.c | 116 ++++++++++++++++++++++---- 1 file changed, 98 insertions(+), 18 deletions(-) diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c index cdba8decc532..d4b26352ddde 100644 --- a/arch/arm/mach-omap1/board-ams-delta.c +++ b/arch/arm/mach-omap1/board-ams-delta.c @@ -179,7 +179,10 @@ static struct resource latch1_resources[] = { }, }; +#define LATCH1_LABEL "latch1" + static struct bgpio_pdata latch1_pdata = { + .label = LATCH1_LABEL, .base = LATCH1_GPIO_BASE, .ngpio = LATCH1_NGPIO, }; @@ -194,6 +197,15 @@ static struct platform_device latch1_gpio_device = { }, }; +#define LATCH1_PIN_LED_CAMERA 0 +#define LATCH1_PIN_LED_ADVERT 1 +#define LATCH1_PIN_LED_MAIL 2 +#define LATCH1_PIN_LED_HANDSFREE 3 +#define LATCH1_PIN_LED_VOICEMAIL 4 +#define LATCH1_PIN_LED_VOICE 5 +#define LATCH1_PIN_DOCKIT1 6 +#define LATCH1_PIN_DOCKIT2 7 + static struct resource latch2_resources[] = { [0] = { .name = "dat", @@ -398,38 +410,43 @@ static struct gpiod_lookup_table ams_delta_lcd_gpio_table = { }, }; -static const struct gpio_led gpio_leds[] __initconst = { - { +/* + * Dynamically allocated GPIO numbers must be obtained fromm GPIO device + * before they can be put in the gpio_led table. Before that happens, + * initialize the table with invalid GPIO numbers, not 0. + */ +static struct gpio_led gpio_leds[] __initdata = { + [LATCH1_PIN_LED_CAMERA] = { .name = "camera", - .gpio = LATCH1_GPIO_BASE + 0, + .gpio = -EINVAL, .default_state = LEDS_GPIO_DEFSTATE_OFF, #ifdef CONFIG_LEDS_TRIGGERS .default_trigger = "ams_delta_camera", #endif }, - { + [LATCH1_PIN_LED_ADVERT] = { .name = "advert", - .gpio = LATCH1_GPIO_BASE + 1, + .gpio = -EINVAL, .default_state = LEDS_GPIO_DEFSTATE_OFF, }, - { + [LATCH1_PIN_LED_MAIL] = { .name = "email", - .gpio = LATCH1_GPIO_BASE + 2, + .gpio = -EINVAL, .default_state = LEDS_GPIO_DEFSTATE_OFF, }, - { + [LATCH1_PIN_LED_HANDSFREE] = { .name = "handsfree", - .gpio = LATCH1_GPIO_BASE + 3, + .gpio = -EINVAL, .default_state = LEDS_GPIO_DEFSTATE_OFF, }, - { + [LATCH1_PIN_LED_VOICEMAIL] = { .name = "voicemail", - .gpio = LATCH1_GPIO_BASE + 4, + .gpio = -EINVAL, .default_state = LEDS_GPIO_DEFSTATE_OFF, }, - { + [LATCH1_PIN_LED_VOICE] = { .name = "voice", - .gpio = LATCH1_GPIO_BASE + 5, + .gpio = -EINVAL, .default_state = LEDS_GPIO_DEFSTATE_OFF, }, }; @@ -542,6 +559,22 @@ static struct gpiod_lookup_table *late_gpio_tables[] __initdata = { &ams_delta_nand_gpio_table, }; +/* + * Some drivers may not use GPIO lookup tables but need to be provided + * with GPIO numbers. The same applies to GPIO based IRQ lines - some + * drivers may even not use GPIO layer but expect just IRQ numbers. + * We could either define GPIO lookup tables then use them on behalf + * of those devices, or we can use GPIO driver level methods for + * identification of GPIO and IRQ numbers. For the purpose of the latter, + * defina a helper function which identifies GPIO chips by their labels. + */ +static int gpiochip_match_by_label(struct gpio_chip *chip, void *data) +{ + char *label = data; + + return !strcmp(label, chip->label); +} + static void __init ams_delta_init(void) { /* mux pins for uarts */ @@ -571,7 +604,6 @@ static void __init ams_delta_init(void) led_trigger_register_simple("ams_delta_camera", &ams_delta_camera_led_trigger); #endif - gpio_led_register_device(-1, &leds_pdata); platform_add_devices(ams_delta_devices, ARRAY_SIZE(ams_delta_devices)); /* @@ -643,16 +675,68 @@ static struct platform_device ams_delta_modem_device = { }, }; +/* + * leds-gpio driver doesn't make use of GPIO lookup tables, + * it has to be provided with GPIO numbers over platform data + * if GPIO descriptor info can't be obtained from device tree. + * We could either define GPIO lookup tables and use them on behalf + * of the leds-gpio device, or we can use GPIO driver level methods + * for identification of GPIO numbers as long as we don't support + * device tree. Let's do the latter. + */ +static void __init ams_delta_led_init(struct gpio_chip *chip) +{ + struct gpio_desc *gpiod; + int i; + + for (i = LATCH1_PIN_LED_CAMERA; i < LATCH1_PIN_DOCKIT1; i++) { + gpiod = gpiochip_request_own_desc(chip, i, NULL); + if (IS_ERR(gpiod)) { + pr_warn("%s: %s GPIO %d request failed (%ld)\n", + __func__, LATCH1_LABEL, i, PTR_ERR(gpiod)); + continue; + } + + /* Assign GPIO numbers to LED device. */ + gpio_leds[i].gpio = desc_to_gpio(gpiod); + + gpiochip_free_own_desc(gpiod); + } + + gpio_led_register_device(PLATFORM_DEVID_NONE, &leds_pdata); +} + +/* + * The purpose of this function is to take care of assignment of GPIO numbers + * to platform devices which depend on GPIO lines provided by Amstrad Delta + * latch1 and/or latch2 GPIO devices but don't use GPIO lookup tables. + * The function may be called as soon as latch1/latch2 GPIO devices are + * initilized. Since basic-mmio-gpio driver is not registered before + * device_initcall, this may happen at erliest during device_initcall_sync. + * Dependent devices shouldn't be registered before that, their + * registration may be performed from within this function or later. + */ static int __init ams_delta_gpio_init(void) { + struct gpio_chip *chip; int err; + if (!machine_is_ams_delta()) + return -ENODEV; + + chip = gpiochip_find(LATCH1_LABEL, gpiochip_match_by_label); + if (!chip) + pr_err("%s: latch1 GPIO chip not found\n", __func__); + else + ams_delta_led_init(chip); + err = gpio_request_array(latch_gpios, ARRAY_SIZE(latch_gpios)); if (err) pr_err("Couldn't take over latch1/latch2 GPIO pins\n"); return err; } +device_initcall_sync(ams_delta_gpio_init); static void __init ams_delta_late_devices(void) { @@ -712,10 +796,6 @@ static int __init late_init(void) { int err; - err = ams_delta_gpio_init(); - if (err) - return err; - ams_delta_late_devices(); err = modem_nreset_init(); From 68e62a15a9146dead4a221ad1a31e3b186f12734 Mon Sep 17 00:00:00 2001 From: Janusz Krzysztofik Date: Fri, 22 Jun 2018 00:41:19 +0200 Subject: [PATCH 059/112] ARM: OMAP1: ams-delta: drop GPIO lookup table for serio device GPIO lookup table for ams-delta-serio device was introduced by commit 0486738928bf ("ARM: OMAP1: ams-delta: add GPIO lookup tables"). Unfortunately, a follow up patch "Input: ams_delta_serio: use GPIO lookup table" was not accepted by subystem maintainer who requested conversion of the driver to a platform driver, replacepemnt of IRQ GPIO pin with IRQ resource, replacement of GPIO pin providing keyboard power with a regulator and removal of remaining GPIO pins from the driver as not handled by it. Let's start with removal of the no longer needed GPIO lookup table from the board init file. Signed-off-by: Janusz Krzysztofik Signed-off-by: Tony Lindgren --- arch/arm/mach-omap1/board-ams-delta.c | 19 ------------------- 1 file changed, 19 deletions(-) diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c index d4b26352ddde..61ab4c188358 100644 --- a/arch/arm/mach-omap1/board-ams-delta.c +++ b/arch/arm/mach-omap1/board-ams-delta.c @@ -521,20 +521,6 @@ static struct platform_device cx20442_codec_device = { .id = -1, }; -static struct gpiod_lookup_table ams_delta_serio_gpio_table = { - .table = { - GPIO_LOOKUP(OMAP_GPIO_LABEL, AMS_DELTA_GPIO_PIN_KEYBRD_DATA, - "data", 0), - GPIO_LOOKUP(OMAP_GPIO_LABEL, AMS_DELTA_GPIO_PIN_KEYBRD_CLK, - "clock", 0), - GPIO_LOOKUP(LATCH2_LABEL, LATCH2_PIN_KEYBRD_PWR, - "power", 0), - GPIO_LOOKUP(LATCH2_LABEL, LATCH2_PIN_KEYBRD_DATAOUT, - "dataout", 0), - { }, - }, -}; - static struct platform_device *ams_delta_devices[] __initdata = { &latch1_gpio_device, &latch2_gpio_device, @@ -551,7 +537,6 @@ static struct platform_device *late_devices[] __initdata = { static struct gpiod_lookup_table *ams_delta_gpio_tables[] __initdata = { &ams_delta_audio_gpio_table, - &ams_delta_serio_gpio_table, }; static struct gpiod_lookup_table *late_gpio_tables[] __initdata = { @@ -612,10 +597,6 @@ static void __init ams_delta_init(void) */ ams_delta_audio_gpio_table.dev_id = dev_name(&ams_delta_audio_device.dev); - /* - * No device name is assigned to GPIO lookup table for serio device - * as long as serio driver is not converted to platform device driver. - */ gpiod_add_lookup_tables(ams_delta_gpio_tables, ARRAY_SIZE(ams_delta_gpio_tables)); From df88c5768927855e54b8f0bd7dd478150b30beda Mon Sep 17 00:00:00 2001 From: Janusz Krzysztofik Date: Fri, 22 Jun 2018 00:41:20 +0200 Subject: [PATCH 060/112] Input: ams_delta_serio: convert to platform driver Convert the driver to an "ams-delta-serio" platform driver. For it to be used with Amstrad Delta, register an "ams-delta-serio" platform device from the board init file. Signed-off-by: Janusz Krzysztofik Acked-by: Dmitry Torokhov Signed-off-by: Tony Lindgren --- arch/arm/mach-omap1/board-ams-delta.c | 6 +++++ drivers/input/serio/ams_delta_serio.c | 34 +++++++++++++++++---------- 2 files changed, 27 insertions(+), 13 deletions(-) diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c index 61ab4c188358..02b8e217bcbc 100644 --- a/arch/arm/mach-omap1/board-ams-delta.c +++ b/arch/arm/mach-omap1/board-ams-delta.c @@ -521,12 +521,18 @@ static struct platform_device cx20442_codec_device = { .id = -1, }; +static struct platform_device ams_delta_serio_device = { + .name = "ams-delta-serio", + .id = PLATFORM_DEVID_NONE, +}; + static struct platform_device *ams_delta_devices[] __initdata = { &latch1_gpio_device, &latch2_gpio_device, &ams_delta_kp_device, &ams_delta_camera_device, &ams_delta_audio_device, + &ams_delta_serio_device, }; static struct platform_device *late_devices[] __initdata = { diff --git a/drivers/input/serio/ams_delta_serio.c b/drivers/input/serio/ams_delta_serio.c index 3df501c3421b..a2a7fa19bf49 100644 --- a/drivers/input/serio/ams_delta_serio.c +++ b/drivers/input/serio/ams_delta_serio.c @@ -22,15 +22,17 @@ */ #include #include +#include #include #include #include -#include #include #include +#define DRIVER_NAME "ams-delta-serio" + MODULE_AUTHOR("Matt Callow"); MODULE_DESCRIPTION("AMS Delta (E3) keyboard port driver"); MODULE_LICENSE("GPL"); @@ -126,13 +128,10 @@ static const struct gpio ams_delta_gpios[] __initconst_or_module = { }, }; -static int __init ams_delta_serio_init(void) +static int ams_delta_serio_init(struct platform_device *pdev) { int err; - if (!machine_is_ams_delta()) - return -ENODEV; - ams_delta_serio = kzalloc(sizeof(struct serio), GFP_KERNEL); if (!ams_delta_serio) return -ENOMEM; @@ -142,22 +141,22 @@ static int __init ams_delta_serio_init(void) ams_delta_serio->close = ams_delta_serio_close; strlcpy(ams_delta_serio->name, "AMS DELTA keyboard adapter", sizeof(ams_delta_serio->name)); - strlcpy(ams_delta_serio->phys, "GPIO/serio0", + strlcpy(ams_delta_serio->phys, dev_name(&pdev->dev), sizeof(ams_delta_serio->phys)); + ams_delta_serio->dev.parent = &pdev->dev; err = gpio_request_array(ams_delta_gpios, ARRAY_SIZE(ams_delta_gpios)); if (err) { - pr_err("ams_delta_serio: Couldn't request gpio pins\n"); + dev_err(&pdev->dev, "Couldn't request gpio pins\n"); goto serio; } err = request_irq(gpio_to_irq(AMS_DELTA_GPIO_PIN_KEYBRD_CLK), ams_delta_serio_interrupt, IRQ_TYPE_EDGE_RISING, - "ams-delta-serio", 0); + DRIVER_NAME, 0); if (err < 0) { - pr_err("ams_delta_serio: couldn't request gpio interrupt %d\n", - gpio_to_irq(AMS_DELTA_GPIO_PIN_KEYBRD_CLK)); + dev_err(&pdev->dev, "IRQ request failed (%d)\n", err); goto gpio; } /* @@ -179,13 +178,22 @@ serio: kfree(ams_delta_serio); return err; } -module_init(ams_delta_serio_init); -static void __exit ams_delta_serio_exit(void) +static int ams_delta_serio_exit(struct platform_device *pdev) { serio_unregister_port(ams_delta_serio); free_irq(gpio_to_irq(AMS_DELTA_GPIO_PIN_KEYBRD_CLK), 0); gpio_free_array(ams_delta_gpios, ARRAY_SIZE(ams_delta_gpios)); + + return 0; } -module_exit(ams_delta_serio_exit); + +static struct platform_driver ams_delta_serio_driver = { + .probe = ams_delta_serio_init, + .remove = ams_delta_serio_exit, + .driver = { + .name = DRIVER_NAME + }, +}; +module_platform_driver(ams_delta_serio_driver); From 56de7570b3264fdd920f74bda5cf334b82f4c1f9 Mon Sep 17 00:00:00 2001 From: Janusz Krzysztofik Date: Fri, 22 Jun 2018 00:41:21 +0200 Subject: [PATCH 061/112] Input: ams_delta_serio: use private structure Introduce a driver private structure and allocate it on device probe. For now, use it instead of a static variable for storing a pointer to serio structure. Subsequent patches will populate it with more members as needed. Signed-off-by: Janusz Krzysztofik Acked-by: Dmitry Torokhov Signed-off-by: Tony Lindgren --- drivers/input/serio/ams_delta_serio.c | 69 +++++++++++++++++---------- 1 file changed, 43 insertions(+), 26 deletions(-) diff --git a/drivers/input/serio/ams_delta_serio.c b/drivers/input/serio/ams_delta_serio.c index a2a7fa19bf49..551a4fa73fe4 100644 --- a/drivers/input/serio/ams_delta_serio.c +++ b/drivers/input/serio/ams_delta_serio.c @@ -37,17 +37,17 @@ MODULE_AUTHOR("Matt Callow"); MODULE_DESCRIPTION("AMS Delta (E3) keyboard port driver"); MODULE_LICENSE("GPL"); -static struct serio *ams_delta_serio; +struct ams_delta_serio { + struct serio *serio; +}; -static int check_data(int data) +static int check_data(struct serio *serio, int data) { int i, parity = 0; /* check valid stop bit */ if (!(data & 0x400)) { - dev_warn(&ams_delta_serio->dev, - "invalid stop bit, data=0x%X\n", - data); + dev_warn(&serio->dev, "invalid stop bit, data=0x%X\n", data); return SERIO_FRAME; } /* calculate the parity */ @@ -57,9 +57,9 @@ static int check_data(int data) } /* it should be odd */ if (!(parity & 0x01)) { - dev_warn(&ams_delta_serio->dev, - "parity check failed, data=0x%X parity=0x%X\n", - data, parity); + dev_warn(&serio->dev, + "parity check failed, data=0x%X parity=0x%X\n", data, + parity); return SERIO_PARITY; } return 0; @@ -67,6 +67,7 @@ static int check_data(int data) static irqreturn_t ams_delta_serio_interrupt(int irq, void *dev_id) { + struct ams_delta_serio *priv = dev_id; int *circ_buff = &fiq_buffer[FIQ_CIRC_BUFF]; int data, dfl; u8 scancode; @@ -84,9 +85,9 @@ static irqreturn_t ams_delta_serio_interrupt(int irq, void *dev_id) if (fiq_buffer[FIQ_HEAD_OFFSET] == fiq_buffer[FIQ_BUF_LEN]) fiq_buffer[FIQ_HEAD_OFFSET] = 0; - dfl = check_data(data); + dfl = check_data(priv->serio, data); scancode = (u8) (data >> 1) & 0xFF; - serio_interrupt(ams_delta_serio, scancode, dfl); + serio_interrupt(priv->serio, scancode, dfl); } return IRQ_HANDLED; } @@ -130,21 +131,14 @@ static const struct gpio ams_delta_gpios[] __initconst_or_module = { static int ams_delta_serio_init(struct platform_device *pdev) { + struct ams_delta_serio *priv; + struct serio *serio; int err; - ams_delta_serio = kzalloc(sizeof(struct serio), GFP_KERNEL); - if (!ams_delta_serio) + priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); + if (!priv) return -ENOMEM; - ams_delta_serio->id.type = SERIO_8042; - ams_delta_serio->open = ams_delta_serio_open; - ams_delta_serio->close = ams_delta_serio_close; - strlcpy(ams_delta_serio->name, "AMS DELTA keyboard adapter", - sizeof(ams_delta_serio->name)); - strlcpy(ams_delta_serio->phys, dev_name(&pdev->dev), - sizeof(ams_delta_serio->phys)); - ams_delta_serio->dev.parent = &pdev->dev; - err = gpio_request_array(ams_delta_gpios, ARRAY_SIZE(ams_delta_gpios)); if (err) { @@ -154,7 +148,7 @@ static int ams_delta_serio_init(struct platform_device *pdev) err = request_irq(gpio_to_irq(AMS_DELTA_GPIO_PIN_KEYBRD_CLK), ams_delta_serio_interrupt, IRQ_TYPE_EDGE_RISING, - DRIVER_NAME, 0); + DRIVER_NAME, priv); if (err < 0) { dev_err(&pdev->dev, "IRQ request failed (%d)\n", err); goto gpio; @@ -167,21 +161,44 @@ static int ams_delta_serio_init(struct platform_device *pdev) irq_set_handler(gpio_to_irq(AMS_DELTA_GPIO_PIN_KEYBRD_CLK), handle_simple_irq); - serio_register_port(ams_delta_serio); - dev_info(&ams_delta_serio->dev, "%s\n", ams_delta_serio->name); + serio = kzalloc(sizeof(*serio), GFP_KERNEL); + if (!serio) { + err = -ENOMEM; + goto irq; + } + + priv->serio = serio; + + serio->id.type = SERIO_8042; + serio->open = ams_delta_serio_open; + serio->close = ams_delta_serio_close; + strlcpy(serio->name, "AMS DELTA keyboard adapter", sizeof(serio->name)); + strlcpy(serio->phys, dev_name(&pdev->dev), sizeof(serio->phys)); + serio->dev.parent = &pdev->dev; + serio->port_data = priv; + + serio_register_port(serio); + + platform_set_drvdata(pdev, priv); + + dev_info(&serio->dev, "%s\n", serio->name); return 0; + +irq: + free_irq(gpio_to_irq(AMS_DELTA_GPIO_PIN_KEYBRD_CLK), priv); gpio: gpio_free_array(ams_delta_gpios, ARRAY_SIZE(ams_delta_gpios)); serio: - kfree(ams_delta_serio); return err; } static int ams_delta_serio_exit(struct platform_device *pdev) { - serio_unregister_port(ams_delta_serio); + struct ams_delta_serio *priv = platform_get_drvdata(pdev); + + serio_unregister_port(priv->serio); free_irq(gpio_to_irq(AMS_DELTA_GPIO_PIN_KEYBRD_CLK), 0); gpio_free_array(ams_delta_gpios, ARRAY_SIZE(ams_delta_gpios)); From 2bcb1be0923700deee554120304777cad465b5bc Mon Sep 17 00:00:00 2001 From: Janusz Krzysztofik Date: Fri, 22 Jun 2018 00:41:22 +0200 Subject: [PATCH 062/112] Input: ams_delta_serio: Replace power GPIO with regulator Modify the driver so it no longer requests and manipulates the "keybrd_pwr" GPIO pin but a "vcc" regulator supply instead. For this to work with Amstrad Delta, define a regulator over the "keybrd_pwr" GPIO pin with the "vcc" supply for ams-delta-serio device and register it from the board file. Both assign an absulute GPIO number to the soon depreciated .gpio member of the regulator config structure, and also build and register a GPIO lookup table so it is ready for use by the regulator driver as soon as its upcoming update is applied. Signed-off-by: Janusz Krzysztofik Acked-by: Dmitry Torokhov Signed-off-by: Tony Lindgren --- arch/arm/mach-omap1/board-ams-delta.c | 63 ++++++++++++++++++++++++++- drivers/input/serio/ams_delta_serio.c | 37 ++++++++++++---- 2 files changed, 89 insertions(+), 11 deletions(-) diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c index 02b8e217bcbc..6573e1014908 100644 --- a/arch/arm/mach-omap1/board-ams-delta.c +++ b/arch/arm/mach-omap1/board-ams-delta.c @@ -526,6 +526,46 @@ static struct platform_device ams_delta_serio_device = { .id = PLATFORM_DEVID_NONE, }; +static struct regulator_consumer_supply keybrd_pwr_consumers[] = { + /* + * Initialize supply .dev_name with NULL. It will be replaced + * with serio dev_name() as soon as the serio device is registered. + */ + REGULATOR_SUPPLY("vcc", NULL), +}; + +static struct regulator_init_data keybrd_pwr_initdata = { + .constraints = { + .valid_ops_mask = REGULATOR_CHANGE_STATUS, + }, + .num_consumer_supplies = ARRAY_SIZE(keybrd_pwr_consumers), + .consumer_supplies = keybrd_pwr_consumers, +}; + +static struct fixed_voltage_config keybrd_pwr_config = { + .supply_name = "keybrd_pwr", + .microvolts = 5000000, + .gpio = AMS_DELTA_GPIO_PIN_KEYBRD_PWR, + .enable_high = 1, + .init_data = &keybrd_pwr_initdata, +}; + +static struct platform_device keybrd_pwr_device = { + .name = "reg-fixed-voltage", + .id = PLATFORM_DEVID_AUTO, + .dev = { + .platform_data = &keybrd_pwr_config, + }, +}; + +static struct gpiod_lookup_table keybrd_pwr_gpio_table = { + .table = { + GPIO_LOOKUP(LATCH2_LABEL, LATCH2_PIN_KEYBRD_PWR, NULL, + GPIO_ACTIVE_HIGH), + { }, + }, +}; + static struct platform_device *ams_delta_devices[] __initdata = { &latch1_gpio_device, &latch2_gpio_device, @@ -543,6 +583,7 @@ static struct platform_device *late_devices[] __initdata = { static struct gpiod_lookup_table *ams_delta_gpio_tables[] __initdata = { &ams_delta_audio_gpio_table, + &keybrd_pwr_gpio_table, }; static struct gpiod_lookup_table *late_gpio_tables[] __initdata = { @@ -598,12 +639,30 @@ static void __init ams_delta_init(void) platform_add_devices(ams_delta_devices, ARRAY_SIZE(ams_delta_devices)); /* - * As soon as devices have been registered, assign their dev_names - * to respective GPIO lookup tables before they are added. + * As soon as regulator consumers have been registered, assign their + * dev_names to consumer supply entries of respective regulators. + */ + keybrd_pwr_consumers[0].dev_name = + dev_name(&ams_delta_serio_device.dev); + + /* + * Once consumer supply entries are populated with dev_names, + * register regulator devices. At this stage only the keyboard + * power regulator has its consumer supply table fully populated. + */ + platform_device_register(&keybrd_pwr_device); + + /* + * As soon as GPIO consumers have been registered, assign + * their dev_names to respective GPIO lookup tables. */ ams_delta_audio_gpio_table.dev_id = dev_name(&ams_delta_audio_device.dev); + keybrd_pwr_gpio_table.dev_id = dev_name(&keybrd_pwr_device.dev); + /* + * Once GPIO lookup tables are populated with dev_names, register them. + */ gpiod_add_lookup_tables(ams_delta_gpio_tables, ARRAY_SIZE(ams_delta_gpio_tables)); diff --git a/drivers/input/serio/ams_delta_serio.c b/drivers/input/serio/ams_delta_serio.c index 551a4fa73fe4..854d0d3ada52 100644 --- a/drivers/input/serio/ams_delta_serio.c +++ b/drivers/input/serio/ams_delta_serio.c @@ -23,6 +23,7 @@ #include #include #include +#include #include #include #include @@ -39,6 +40,7 @@ MODULE_LICENSE("GPL"); struct ams_delta_serio { struct serio *serio; + struct regulator *vcc; }; static int check_data(struct serio *serio, int data) @@ -94,16 +96,18 @@ static irqreturn_t ams_delta_serio_interrupt(int irq, void *dev_id) static int ams_delta_serio_open(struct serio *serio) { - /* enable keyboard */ - gpio_set_value(AMS_DELTA_GPIO_PIN_KEYBRD_PWR, 1); + struct ams_delta_serio *priv = serio->port_data; - return 0; + /* enable keyboard */ + return regulator_enable(priv->vcc); } static void ams_delta_serio_close(struct serio *serio) { + struct ams_delta_serio *priv = serio->port_data; + /* disable keyboard */ - gpio_set_value(AMS_DELTA_GPIO_PIN_KEYBRD_PWR, 0); + regulator_disable(priv->vcc); } static const struct gpio ams_delta_gpios[] __initconst_or_module = { @@ -117,11 +121,6 @@ static const struct gpio ams_delta_gpios[] __initconst_or_module = { .flags = GPIOF_DIR_IN, .label = "serio-clock", }, - { - .gpio = AMS_DELTA_GPIO_PIN_KEYBRD_PWR, - .flags = GPIOF_OUT_INIT_LOW, - .label = "serio-power", - }, { .gpio = AMS_DELTA_GPIO_PIN_KEYBRD_DATAOUT, .flags = GPIOF_OUT_INIT_LOW, @@ -146,6 +145,26 @@ static int ams_delta_serio_init(struct platform_device *pdev) goto serio; } + priv->vcc = devm_regulator_get(&pdev->dev, "vcc"); + if (IS_ERR(priv->vcc)) { + err = PTR_ERR(priv->vcc); + dev_err(&pdev->dev, "regulator request failed (%d)\n", err); + /* + * When running on a non-dt platform and requested regulator + * is not available, devm_regulator_get() never returns + * -EPROBE_DEFER as it is not able to justify if the regulator + * may still appear later. On the other hand, the board can + * still set full constriants flag at late_initcall in order + * to instruct devm_regulator_get() to returnn a dummy one + * if sufficient. Hence, if we get -ENODEV here, let's convert + * it to -EPROBE_DEFER and wait for the board to decide or + * let Deferred Probe infrastructure handle this error. + */ + if (err == -ENODEV) + err = -EPROBE_DEFER; + goto gpio; + } + err = request_irq(gpio_to_irq(AMS_DELTA_GPIO_PIN_KEYBRD_CLK), ams_delta_serio_interrupt, IRQ_TYPE_EDGE_RISING, DRIVER_NAME, priv); From 41f8fee385a00dcbc6107e7d356490391505a59a Mon Sep 17 00:00:00 2001 From: Janusz Krzysztofik Date: Fri, 22 Jun 2018 00:41:23 +0200 Subject: [PATCH 063/112] ARM: OMAP1: ams-delta: Hog "keybrd_dataout" GPIO pin "keybrd_dataout" GPIO pin used to be initialized by ams-delta-serio driver to a state safe for ams-delta-serio device function and not changed thereafter. As such, it may be assumed not under the driver control and responsibility for its initialization handed over to board init file. Introduce a GPIO hog table and take over control of the "keybrd_dataout" GPIO pin from the ams-delta-serio driver. Signed-off-by: Janusz Krzysztofik Signed-off-by: Tony Lindgren --- arch/arm/mach-omap1/board-ams-delta.c | 8 ++++++++ drivers/input/serio/ams_delta_serio.c | 5 ----- 2 files changed, 8 insertions(+), 5 deletions(-) diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c index 6573e1014908..9b3073e698eb 100644 --- a/arch/arm/mach-omap1/board-ams-delta.c +++ b/arch/arm/mach-omap1/board-ams-delta.c @@ -607,6 +607,12 @@ static int gpiochip_match_by_label(struct gpio_chip *chip, void *data) return !strcmp(label, chip->label); } +static struct gpiod_hog ams_delta_gpio_hogs[] = { + GPIO_HOG(LATCH2_LABEL, LATCH2_PIN_KEYBRD_DATAOUT, "keybrd_dataout", + GPIO_ACTIVE_HIGH, GPIOD_OUT_LOW), + {}, +}; + static void __init ams_delta_init(void) { /* mux pins for uarts */ @@ -627,6 +633,8 @@ static void __init ams_delta_init(void) omap_cfg_reg(J19_1610_CAM_D6); omap_cfg_reg(J18_1610_CAM_D7); + gpiod_add_hogs(ams_delta_gpio_hogs); + omap_serial_init(); omap_register_i2c_bus(1, 100, NULL, 0); diff --git a/drivers/input/serio/ams_delta_serio.c b/drivers/input/serio/ams_delta_serio.c index 854d0d3ada52..b955c6a72e99 100644 --- a/drivers/input/serio/ams_delta_serio.c +++ b/drivers/input/serio/ams_delta_serio.c @@ -121,11 +121,6 @@ static const struct gpio ams_delta_gpios[] __initconst_or_module = { .flags = GPIOF_DIR_IN, .label = "serio-clock", }, - { - .gpio = AMS_DELTA_GPIO_PIN_KEYBRD_DATAOUT, - .flags = GPIOF_OUT_INIT_LOW, - .label = "serio-dataout", - }, }; static int ams_delta_serio_init(struct platform_device *pdev) From 97abda99a56949059955ac0d82c0f6c8277416c4 Mon Sep 17 00:00:00 2001 From: Janusz Krzysztofik Date: Fri, 22 Jun 2018 00:41:24 +0200 Subject: [PATCH 064/112] ARM: OMAP1: ams-delta FIQ: don't use static GPIO numbers With introduction of GPIO lookup tables to Amstrad Delta board init file, semantics of symbols representing OMAP GPIO pins defined in changed from statically assigned global GPIO numbers to hardware pin numbers local to OMAP "gpio-0-15" chip. This patch modifies deferred FIQ interrupt handler so it no longer uses static GPIO numbers in favour of IRQ data descriptors obtained at FIQ initialization time from descriptor of the GPIO chip with use of its hardware pin numbers. The chip descriptor is passed from the board init file. As a benefit, the deferred FIQ handler should work faster. Signed-off-by: Janusz Krzysztofik Acked-by: Linus Walleij [tony@atomide.com: removed duplicate gpiochip_match_by_label] Signed-off-by: Tony Lindgren --- arch/arm/mach-omap1/ams-delta-fiq.c | 48 +++++++++++++------ arch/arm/mach-omap1/board-ams-delta.c | 25 +++++++++- .../mach-omap1/include/mach/ams-delta-fiq.h | 2 +- 3 files changed, 58 insertions(+), 17 deletions(-) diff --git a/arch/arm/mach-omap1/ams-delta-fiq.c b/arch/arm/mach-omap1/ams-delta-fiq.c index d7ca9e2b40d2..1d54a6177f14 100644 --- a/arch/arm/mach-omap1/ams-delta-fiq.c +++ b/arch/arm/mach-omap1/ams-delta-fiq.c @@ -13,7 +13,8 @@ * under the terms of the GNU General Public License version 2 as published by * the Free Software Foundation. */ -#include +#include +#include #include #include #include @@ -40,14 +41,14 @@ static struct fiq_handler fh = { unsigned int fiq_buffer[1024]; EXPORT_SYMBOL(fiq_buffer); +static struct irq_chip *irq_chip; +static struct irq_data *irq_data[16]; static unsigned int irq_counter[16]; static irqreturn_t deferred_fiq(int irq, void *dev_id) { + struct irq_data *d; int gpio, irq_num, fiq_count; - struct irq_chip *irq_chip; - - irq_chip = irq_get_chip(gpio_to_irq(AMS_DELTA_GPIO_PIN_KEYBRD_CLK)); /* * For each handled GPIO interrupt, keep calling its interrupt handler @@ -55,24 +56,21 @@ static irqreturn_t deferred_fiq(int irq, void *dev_id) */ for (gpio = AMS_DELTA_GPIO_PIN_KEYBRD_CLK; gpio <= AMS_DELTA_GPIO_PIN_HOOK_SWITCH; gpio++) { - irq_num = gpio_to_irq(gpio); + d = irq_data[gpio]; + irq_num = d->irq; fiq_count = fiq_buffer[FIQ_CNT_INT_00 + gpio]; if (irq_counter[gpio] < fiq_count && gpio != AMS_DELTA_GPIO_PIN_KEYBRD_CLK) { - struct irq_data *d = irq_get_irq_data(irq_num); - /* * handle_simple_irq() that OMAP GPIO edge * interrupts default to since commit 80ac93c27441 * requires interrupt already acked and unmasked. */ - if (irq_chip) { - if (irq_chip->irq_ack) - irq_chip->irq_ack(d); - if (irq_chip->irq_unmask) - irq_chip->irq_unmask(d); - } + if (irq_chip->irq_ack) + irq_chip->irq_ack(d); + if (irq_chip->irq_unmask) + irq_chip->irq_unmask(d); } for (; irq_counter[gpio] < fiq_count; irq_counter[gpio]++) generic_handle_irq(irq_num); @@ -80,14 +78,36 @@ static irqreturn_t deferred_fiq(int irq, void *dev_id) return IRQ_HANDLED; } -void __init ams_delta_init_fiq(void) +void __init ams_delta_init_fiq(struct gpio_chip *chip) { + struct gpio_desc *gpiod; void *fiqhandler_start; unsigned int fiqhandler_length; struct pt_regs FIQ_regs; unsigned long val, offset; int i, retval; + /* Store irq_chip location for IRQ handler use */ + irq_chip = chip->irq.chip; + if (!irq_chip) { + pr_err("%s: GPIO chip %s is missing IRQ function\n", __func__, + chip->label); + return; + } + + for (i = 0; i < ARRAY_SIZE(irq_data); i++) { + gpiod = gpiochip_request_own_desc(chip, i, NULL); + if (IS_ERR(gpiod)) { + pr_err("%s: failed to get GPIO pin %d (%ld)\n", + __func__, i, PTR_ERR(gpiod)); + return; + } + /* Store irq_data location for IRQ handler use */ + irq_data[i] = irq_get_irq_data(gpiod_to_irq(gpiod)); + + gpiochip_free_own_desc(gpiod); + } + fiqhandler_start = &qwerty_fiqin_start; fiqhandler_length = &qwerty_fiqin_end - &qwerty_fiqin_start; pr_info("Installing fiq handler from %p, length 0x%x\n", diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c index 9b3073e698eb..e937372e704a 100644 --- a/arch/arm/mach-omap1/board-ams-delta.c +++ b/arch/arm/mach-omap1/board-ams-delta.c @@ -613,6 +613,28 @@ static struct gpiod_hog ams_delta_gpio_hogs[] = { {}, }; +/* + * The purpose of this function is to take care of proper initialization of + * devices and data structures which depend on GPIO lines provided by OMAP GPIO + * banks but their drivers don't use GPIO lookup tables or GPIO layer at all. + * The function may be called as soon as OMAP GPIO devices are probed. + * Since that happens at postcore_initcall, it can be called successfully + * from init_machine or later. + * Dependent devices may be registered from within this function or later. + */ +static void __init omap_gpio_deps_init(void) +{ + struct gpio_chip *chip; + + chip = gpiochip_find(OMAP_GPIO_LABEL, gpiochip_match_by_label); + if (!chip) { + pr_err("%s: OMAP GPIO chip not found\n", __func__); + return; + } + + ams_delta_init_fiq(chip); +} + static void __init ams_delta_init(void) { /* mux pins for uarts */ @@ -633,6 +655,7 @@ static void __init ams_delta_init(void) omap_cfg_reg(J19_1610_CAM_D6); omap_cfg_reg(J18_1610_CAM_D7); + omap_gpio_deps_init(); gpiod_add_hogs(ams_delta_gpio_hogs); omap_serial_init(); @@ -674,8 +697,6 @@ static void __init ams_delta_init(void) gpiod_add_lookup_tables(ams_delta_gpio_tables, ARRAY_SIZE(ams_delta_gpio_tables)); - ams_delta_init_fiq(); - omap_writew(omap_readw(ARM_RSTCT1) | 0x0004, ARM_RSTCT1); omapfb_set_lcd_config(&ams_delta_lcd_config); diff --git a/arch/arm/mach-omap1/include/mach/ams-delta-fiq.h b/arch/arm/mach-omap1/include/mach/ams-delta-fiq.h index 6dfc3e1210a3..a9769ff396bc 100644 --- a/arch/arm/mach-omap1/include/mach/ams-delta-fiq.h +++ b/arch/arm/mach-omap1/include/mach/ams-delta-fiq.h @@ -73,7 +73,7 @@ extern unsigned int fiq_buffer[]; extern unsigned char qwerty_fiqin_start, qwerty_fiqin_end; -extern void __init ams_delta_init_fiq(void); +extern void __init ams_delta_init_fiq(struct gpio_chip *chip); #endif #endif From a32d5ce1dbf9389ad28d438dbcdaa520a913cde8 Mon Sep 17 00:00:00 2001 From: Janusz Krzysztofik Date: Fri, 22 Jun 2018 00:41:25 +0200 Subject: [PATCH 065/112] ARM: OMAP1: ams-delta FIQ: Keep serio input GPIOs requested From the very beginning, input GPIO pins of ams-delta serio port have been used by FIQ handler, not serio driver. Don't request those pins from the ams-delta-serio driver any longer, instead keep them requested and initialized by the FIQ initialization routine which already requests them and releases while identifying GPIO IRQs. Signed-off-by: Janusz Krzysztofik Acked-by: Dmitry Torokhov Signed-off-by: Tony Lindgren --- arch/arm/mach-omap1/ams-delta-fiq.c | 42 +++++++++++++++++++++++---- drivers/input/serio/ams_delta_serio.c | 30 ++----------------- 2 files changed, 39 insertions(+), 33 deletions(-) diff --git a/arch/arm/mach-omap1/ams-delta-fiq.c b/arch/arm/mach-omap1/ams-delta-fiq.c index 1d54a6177f14..5a6c59ac9b5f 100644 --- a/arch/arm/mach-omap1/ams-delta-fiq.c +++ b/arch/arm/mach-omap1/ams-delta-fiq.c @@ -45,6 +45,11 @@ static struct irq_chip *irq_chip; static struct irq_data *irq_data[16]; static unsigned int irq_counter[16]; +static const char *pin_name[16] __initconst = { + [AMS_DELTA_GPIO_PIN_KEYBRD_DATA] = "keybrd_data", + [AMS_DELTA_GPIO_PIN_KEYBRD_CLK] = "keybrd_clk", +}; + static irqreturn_t deferred_fiq(int irq, void *dev_id) { struct irq_data *d; @@ -80,7 +85,7 @@ static irqreturn_t deferred_fiq(int irq, void *dev_id) void __init ams_delta_init_fiq(struct gpio_chip *chip) { - struct gpio_desc *gpiod; + struct gpio_desc *gpiod, *data = NULL, *clk = NULL; void *fiqhandler_start; unsigned int fiqhandler_length; struct pt_regs FIQ_regs; @@ -96,7 +101,7 @@ void __init ams_delta_init_fiq(struct gpio_chip *chip) } for (i = 0; i < ARRAY_SIZE(irq_data); i++) { - gpiod = gpiochip_request_own_desc(chip, i, NULL); + gpiod = gpiochip_request_own_desc(chip, i, pin_name[i]); if (IS_ERR(gpiod)) { pr_err("%s: failed to get GPIO pin %d (%ld)\n", __func__, i, PTR_ERR(gpiod)); @@ -105,8 +110,27 @@ void __init ams_delta_init_fiq(struct gpio_chip *chip) /* Store irq_data location for IRQ handler use */ irq_data[i] = irq_get_irq_data(gpiod_to_irq(gpiod)); - gpiochip_free_own_desc(gpiod); + /* + * FIQ handler takes full control over serio data and clk GPIO + * pins. Initiaize them and keep requested so nobody can + * interfere. Fail if any of those two couldn't be requested. + */ + switch (i) { + case AMS_DELTA_GPIO_PIN_KEYBRD_DATA: + data = gpiod; + gpiod_direction_input(data); + break; + case AMS_DELTA_GPIO_PIN_KEYBRD_CLK: + clk = gpiod; + gpiod_direction_input(clk); + break; + default: + gpiochip_free_own_desc(gpiod); + break; + } } + if (!data || !clk) + goto out_gpio; fiqhandler_start = &qwerty_fiqin_start; fiqhandler_length = &qwerty_fiqin_end - &qwerty_fiqin_start; @@ -117,7 +141,7 @@ void __init ams_delta_init_fiq(struct gpio_chip *chip) if (retval) { pr_err("ams_delta_init_fiq(): couldn't claim FIQ, ret=%d\n", retval); - return; + goto out_gpio; } retval = request_irq(INT_DEFERRED_FIQ, deferred_fiq, @@ -125,7 +149,7 @@ void __init ams_delta_init_fiq(struct gpio_chip *chip) if (retval < 0) { pr_err("Failed to get deferred_fiq IRQ, ret=%d\n", retval); release_fiq(&fh); - return; + goto out_gpio; } /* * Since no set_type() method is provided by OMAP irq chip, @@ -175,4 +199,12 @@ void __init ams_delta_init_fiq(struct gpio_chip *chip) offset = IRQ_ILR0_REG_OFFSET + (INT_GPIO_BANK1 - NR_IRQS_LEGACY) * 0x4; val = omap_readl(OMAP_IH1_BASE + offset) | 1; omap_writel(val, OMAP_IH1_BASE + offset); + + return; + +out_gpio: + if (data) + gpiochip_free_own_desc(data); + if (clk) + gpiochip_free_own_desc(clk); } diff --git a/drivers/input/serio/ams_delta_serio.c b/drivers/input/serio/ams_delta_serio.c index b955c6a72e99..7952a29f9540 100644 --- a/drivers/input/serio/ams_delta_serio.c +++ b/drivers/input/serio/ams_delta_serio.c @@ -110,19 +110,6 @@ static void ams_delta_serio_close(struct serio *serio) regulator_disable(priv->vcc); } -static const struct gpio ams_delta_gpios[] __initconst_or_module = { - { - .gpio = AMS_DELTA_GPIO_PIN_KEYBRD_DATA, - .flags = GPIOF_DIR_IN, - .label = "serio-data", - }, - { - .gpio = AMS_DELTA_GPIO_PIN_KEYBRD_CLK, - .flags = GPIOF_DIR_IN, - .label = "serio-clock", - }, -}; - static int ams_delta_serio_init(struct platform_device *pdev) { struct ams_delta_serio *priv; @@ -133,13 +120,6 @@ static int ams_delta_serio_init(struct platform_device *pdev) if (!priv) return -ENOMEM; - err = gpio_request_array(ams_delta_gpios, - ARRAY_SIZE(ams_delta_gpios)); - if (err) { - dev_err(&pdev->dev, "Couldn't request gpio pins\n"); - goto serio; - } - priv->vcc = devm_regulator_get(&pdev->dev, "vcc"); if (IS_ERR(priv->vcc)) { err = PTR_ERR(priv->vcc); @@ -157,7 +137,7 @@ static int ams_delta_serio_init(struct platform_device *pdev) */ if (err == -ENODEV) err = -EPROBE_DEFER; - goto gpio; + return err; } err = request_irq(gpio_to_irq(AMS_DELTA_GPIO_PIN_KEYBRD_CLK), @@ -165,7 +145,7 @@ static int ams_delta_serio_init(struct platform_device *pdev) DRIVER_NAME, priv); if (err < 0) { dev_err(&pdev->dev, "IRQ request failed (%d)\n", err); - goto gpio; + return err; } /* * Since GPIO register handling for keyboard clock pin is performed @@ -201,10 +181,6 @@ static int ams_delta_serio_init(struct platform_device *pdev) irq: free_irq(gpio_to_irq(AMS_DELTA_GPIO_PIN_KEYBRD_CLK), priv); -gpio: - gpio_free_array(ams_delta_gpios, - ARRAY_SIZE(ams_delta_gpios)); -serio: return err; } @@ -214,8 +190,6 @@ static int ams_delta_serio_exit(struct platform_device *pdev) serio_unregister_port(priv->serio); free_irq(gpio_to_irq(AMS_DELTA_GPIO_PIN_KEYBRD_CLK), 0); - gpio_free_array(ams_delta_gpios, - ARRAY_SIZE(ams_delta_gpios)); return 0; } From dc8fbeb0ffde1f2395449006019e2c89c177df50 Mon Sep 17 00:00:00 2001 From: Janusz Krzysztofik Date: Fri, 22 Jun 2018 00:41:26 +0200 Subject: [PATCH 066/112] ARM: OMAP1: Get rid of Split the header file into two parts and move them to directories where they belong. Information on internal structure of FIQ buffer is moved to for ams-delta-serio driver use. Other information used by ams-delta board init file and FIQ code is made local to mach-omap1 root directory. Signed-off-by: Janusz Krzysztofik Acked-by: Dmitry Torokhov Signed-off-by: Tony Lindgren --- MAINTAINERS | 1 + arch/arm/mach-omap1/ams-delta-fiq-handler.S | 5 ++- arch/arm/mach-omap1/ams-delta-fiq.c | 7 ++-- arch/arm/mach-omap1/ams-delta-fiq.h | 41 +++++++++++++++++++ arch/arm/mach-omap1/board-ams-delta.c | 2 +- drivers/input/serio/ams_delta_serio.c | 3 +- .../linux/platform_data}/ams-delta-fiq.h | 27 +++--------- 7 files changed, 56 insertions(+), 30 deletions(-) create mode 100644 arch/arm/mach-omap1/ams-delta-fiq.h rename {arch/arm/mach-omap1/include/mach => include/linux/platform_data}/ams-delta-fiq.h (71%) diff --git a/MAINTAINERS b/MAINTAINERS index 9d5eeff51b5f..c78b7dc42a81 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -10391,6 +10391,7 @@ F: arch/arm/plat-omap/ F: arch/arm/configs/omap1_defconfig F: drivers/i2c/busses/i2c-omap.c F: include/linux/platform_data/i2c-omap.h +F: include/linux/platform_data/ams-delta-fiq.h OMAP2+ SUPPORT M: Tony Lindgren diff --git a/arch/arm/mach-omap1/ams-delta-fiq-handler.S b/arch/arm/mach-omap1/ams-delta-fiq-handler.S index bf608441b357..ddc27638ba2a 100644 --- a/arch/arm/mach-omap1/ams-delta-fiq-handler.S +++ b/arch/arm/mach-omap1/ams-delta-fiq-handler.S @@ -14,11 +14,12 @@ */ #include +#include + #include - #include -#include +#include "ams-delta-fiq.h" #include "iomap.h" #include "soc.h" diff --git a/arch/arm/mach-omap1/ams-delta-fiq.c b/arch/arm/mach-omap1/ams-delta-fiq.c index 5a6c59ac9b5f..e72935034d42 100644 --- a/arch/arm/mach-omap1/ams-delta-fiq.c +++ b/arch/arm/mach-omap1/ams-delta-fiq.c @@ -19,12 +19,13 @@ #include #include #include +#include #include #include -#include +#include "ams-delta-fiq.h" static struct fiq_handler fh = { .name = "ams-delta-fiq" @@ -35,8 +36,8 @@ static struct fiq_handler fh = { * The FIQ and IRQ isrs can both read and write it. * It is structured as a header section several 32bit slots, * followed by the circular buffer where the FIQ isr stores - * keystrokes received from the qwerty keyboard. - * See ams-delta-fiq.h for details of offsets. + * keystrokes received from the qwerty keyboard. See + * for details of offsets. */ unsigned int fiq_buffer[1024]; EXPORT_SYMBOL(fiq_buffer); diff --git a/arch/arm/mach-omap1/ams-delta-fiq.h b/arch/arm/mach-omap1/ams-delta-fiq.h new file mode 100644 index 000000000000..3f691d68aa62 --- /dev/null +++ b/arch/arm/mach-omap1/ams-delta-fiq.h @@ -0,0 +1,41 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +/* + * arch/arm/mach-omap1/ams-delta-fiq.h + * + * Taken from the original Amstrad modifications to fiq.h + * + * Copyright (c) 2004 Amstrad Plc + * Copyright (c) 2006 Matt Callow + * Copyright (c) 2010 Janusz Krzysztofik + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#ifndef __AMS_DELTA_FIQ_H +#define __AMS_DELTA_FIQ_H + +#include + +/* + * Interrupt number used for passing control from FIQ to IRQ. + * IRQ12, described as reserved, has been selected. + */ +#define INT_DEFERRED_FIQ INT_1510_RES12 +/* + * Base address of an interrupt handler that the INT_DEFERRED_FIQ belongs to. + */ +#if (INT_DEFERRED_FIQ < IH2_BASE) +#define DEFERRED_FIQ_IH_BASE OMAP_IH1_BASE +#else +#define DEFERRED_FIQ_IH_BASE OMAP_IH2_BASE +#endif + +#ifndef __ASSEMBLER__ +extern unsigned char qwerty_fiqin_start, qwerty_fiqin_end; + +extern void __init ams_delta_init_fiq(struct gpio_chip *chip); +#endif + +#endif diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c index e937372e704a..902c24cc8508 100644 --- a/arch/arm/mach-omap1/board-ams-delta.c +++ b/arch/arm/mach-omap1/board-ams-delta.c @@ -41,10 +41,10 @@ #include #include -#include #include "camera.h" #include +#include "ams-delta-fiq.h" #include "iomap.h" #include "common.h" diff --git a/drivers/input/serio/ams_delta_serio.c b/drivers/input/serio/ams_delta_serio.c index 7952a29f9540..2602f7cff5ae 100644 --- a/drivers/input/serio/ams_delta_serio.c +++ b/drivers/input/serio/ams_delta_serio.c @@ -22,6 +22,7 @@ */ #include #include +#include #include #include #include @@ -30,8 +31,6 @@ #include -#include - #define DRIVER_NAME "ams-delta-serio" MODULE_AUTHOR("Matt Callow"); diff --git a/arch/arm/mach-omap1/include/mach/ams-delta-fiq.h b/include/linux/platform_data/ams-delta-fiq.h similarity index 71% rename from arch/arm/mach-omap1/include/mach/ams-delta-fiq.h rename to include/linux/platform_data/ams-delta-fiq.h index a9769ff396bc..dc0f835ea918 100644 --- a/arch/arm/mach-omap1/include/mach/ams-delta-fiq.h +++ b/include/linux/platform_data/ams-delta-fiq.h @@ -1,5 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + /* - * arch/arm/mach-omap1/include/ams-delta-fiq.h + * include/linux/platform_data/ams-delta-fiq.h * * Taken from the original Amstrad modifications to fiq.h * @@ -11,24 +13,8 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ -#ifndef __AMS_DELTA_FIQ_H -#define __AMS_DELTA_FIQ_H - -#include - -/* - * Interrupt number used for passing control from FIQ to IRQ. - * IRQ12, described as reserved, has been selected. - */ -#define INT_DEFERRED_FIQ INT_1510_RES12 -/* - * Base address of an interrupt handler that the INT_DEFERRED_FIQ belongs to. - */ -#if (INT_DEFERRED_FIQ < IH2_BASE) -#define DEFERRED_FIQ_IH_BASE OMAP_IH1_BASE -#else -#define DEFERRED_FIQ_IH_BASE OMAP_IH2_BASE -#endif +#ifndef __LINUX_PLATFORM_DATA_AMS_DELTA_FIQ_H +#define __LINUX_PLATFORM_DATA_AMS_DELTA_FIQ_H /* * These are the offsets from the beginning of the fiq_buffer. They are put here @@ -71,9 +57,6 @@ #ifndef __ASSEMBLER__ extern unsigned int fiq_buffer[]; -extern unsigned char qwerty_fiqin_start, qwerty_fiqin_end; - -extern void __init ams_delta_init_fiq(struct gpio_chip *chip); #endif #endif From a617b36bbc0a1d175bbe98e009e903c1ea0e2be5 Mon Sep 17 00:00:00 2001 From: Janusz Krzysztofik Date: Fri, 22 Jun 2018 00:41:27 +0200 Subject: [PATCH 067/112] Input: ams_delta_serio: use IRQ resource The driver still obtains IRQ number from a hardcoded GPIO. Use IRQ resource instead. For this to work on Amstrad Delta, add the IRQ resource to ams-delta-serio platform device structure. Obtain the IRQ number assigned to "keybrd_clk" GPIO pin from FIQ initialization routine. As a benefit, the driver no longer needs to include . Signed-off-by: Janusz Krzysztofik Acked-by: Dmitry Torokhov Signed-off-by: Tony Lindgren --- arch/arm/mach-omap1/ams-delta-fiq.c | 20 ++++++++++++++++- arch/arm/mach-omap1/ams-delta-fiq.h | 3 ++- arch/arm/mach-omap1/board-ams-delta.c | 17 +++++++++++++- drivers/input/serio/ams_delta_serio.c | 32 ++++++++------------------- 4 files changed, 46 insertions(+), 26 deletions(-) diff --git a/arch/arm/mach-omap1/ams-delta-fiq.c b/arch/arm/mach-omap1/ams-delta-fiq.c index e72935034d42..82ca4246a5e4 100644 --- a/arch/arm/mach-omap1/ams-delta-fiq.c +++ b/arch/arm/mach-omap1/ams-delta-fiq.c @@ -20,6 +20,7 @@ #include #include #include +#include #include @@ -84,7 +85,8 @@ static irqreturn_t deferred_fiq(int irq, void *dev_id) return IRQ_HANDLED; } -void __init ams_delta_init_fiq(struct gpio_chip *chip) +void __init ams_delta_init_fiq(struct gpio_chip *chip, + struct platform_device *serio) { struct gpio_desc *gpiod, *data = NULL, *clk = NULL; void *fiqhandler_start; @@ -201,6 +203,22 @@ void __init ams_delta_init_fiq(struct gpio_chip *chip) val = omap_readl(OMAP_IH1_BASE + offset) | 1; omap_writel(val, OMAP_IH1_BASE + offset); + /* Initialize serio device IRQ resource */ + serio->resource[0].start = gpiod_to_irq(clk); + serio->resource[0].end = serio->resource[0].start; + + /* + * Since FIQ handler performs handling of GPIO registers for + * "keybrd_clk" IRQ pin, ams_delta_serio driver used to set + * handle_simple_irq() as active IRQ handler for that pin to avoid + * bad interaction with gpio-omap driver. This is no longer needed + * as handle_simple_irq() is now the default handler for OMAP GPIO + * edge interrupts. + * This comment replaces the obsolete code which has been removed + * from the ams_delta_serio driver and stands here only as a reminder + * of that dependency on gpio-omap driver behavior. + */ + return; out_gpio: diff --git a/arch/arm/mach-omap1/ams-delta-fiq.h b/arch/arm/mach-omap1/ams-delta-fiq.h index 3f691d68aa62..fd76df3cce37 100644 --- a/arch/arm/mach-omap1/ams-delta-fiq.h +++ b/arch/arm/mach-omap1/ams-delta-fiq.h @@ -35,7 +35,8 @@ #ifndef __ASSEMBLER__ extern unsigned char qwerty_fiqin_start, qwerty_fiqin_end; -extern void __init ams_delta_init_fiq(struct gpio_chip *chip); +extern void __init ams_delta_init_fiq(struct gpio_chip *chip, + struct platform_device *pdev); #endif #endif diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c index 902c24cc8508..f453b08ed7ef 100644 --- a/arch/arm/mach-omap1/board-ams-delta.c +++ b/arch/arm/mach-omap1/board-ams-delta.c @@ -521,9 +521,24 @@ static struct platform_device cx20442_codec_device = { .id = -1, }; +static struct resource ams_delta_serio_resources[] = { + { + .flags = IORESOURCE_IRQ, + /* + * Initialize IRQ resource with invalid IRQ number. + * It will be replaced with dynamically allocated GPIO IRQ + * obtained from GPIO chip as soon as the chip is available. + */ + .start = -EINVAL, + .end = -EINVAL, + }, +}; + static struct platform_device ams_delta_serio_device = { .name = "ams-delta-serio", .id = PLATFORM_DEVID_NONE, + .num_resources = ARRAY_SIZE(ams_delta_serio_resources), + .resource = ams_delta_serio_resources, }; static struct regulator_consumer_supply keybrd_pwr_consumers[] = { @@ -632,7 +647,7 @@ static void __init omap_gpio_deps_init(void) return; } - ams_delta_init_fiq(chip); + ams_delta_init_fiq(chip, &ams_delta_serio_device); } static void __init ams_delta_init(void) diff --git a/drivers/input/serio/ams_delta_serio.c b/drivers/input/serio/ams_delta_serio.c index 2602f7cff5ae..c1f8226f172e 100644 --- a/drivers/input/serio/ams_delta_serio.c +++ b/drivers/input/serio/ams_delta_serio.c @@ -20,7 +20,6 @@ * However, when used with the E3 mailboard that producecs non-standard * scancodes, a custom key table must be prepared and loaded from userspace. */ -#include #include #include #include @@ -29,8 +28,6 @@ #include #include -#include - #define DRIVER_NAME "ams-delta-serio" MODULE_AUTHOR("Matt Callow"); @@ -113,7 +110,7 @@ static int ams_delta_serio_init(struct platform_device *pdev) { struct ams_delta_serio *priv; struct serio *serio; - int err; + int irq, err; priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); if (!priv) @@ -139,26 +136,20 @@ static int ams_delta_serio_init(struct platform_device *pdev) return err; } - err = request_irq(gpio_to_irq(AMS_DELTA_GPIO_PIN_KEYBRD_CLK), - ams_delta_serio_interrupt, IRQ_TYPE_EDGE_RISING, - DRIVER_NAME, priv); + irq = platform_get_irq(pdev, 0); + if (irq < 0) + return -ENXIO; + + err = devm_request_irq(&pdev->dev, irq, ams_delta_serio_interrupt, + IRQ_TYPE_EDGE_RISING, DRIVER_NAME, priv); if (err < 0) { dev_err(&pdev->dev, "IRQ request failed (%d)\n", err); return err; } - /* - * Since GPIO register handling for keyboard clock pin is performed - * at FIQ level, switch back from edge to simple interrupt handler - * to avoid bad interaction. - */ - irq_set_handler(gpio_to_irq(AMS_DELTA_GPIO_PIN_KEYBRD_CLK), - handle_simple_irq); serio = kzalloc(sizeof(*serio), GFP_KERNEL); - if (!serio) { - err = -ENOMEM; - goto irq; - } + if (!serio) + return -ENOMEM; priv->serio = serio; @@ -177,10 +168,6 @@ static int ams_delta_serio_init(struct platform_device *pdev) dev_info(&serio->dev, "%s\n", serio->name); return 0; - -irq: - free_irq(gpio_to_irq(AMS_DELTA_GPIO_PIN_KEYBRD_CLK), priv); - return err; } static int ams_delta_serio_exit(struct platform_device *pdev) @@ -188,7 +175,6 @@ static int ams_delta_serio_exit(struct platform_device *pdev) struct ams_delta_serio *priv = platform_get_drvdata(pdev); serio_unregister_port(priv->serio); - free_irq(gpio_to_irq(AMS_DELTA_GPIO_PIN_KEYBRD_CLK), 0); return 0; } From 5f73861fae087df19f7337620da65c99e4260c72 Mon Sep 17 00:00:00 2001 From: Janusz Krzysztofik Date: Fri, 22 Jun 2018 00:41:28 +0200 Subject: [PATCH 068/112] Input: ams_delta_serio: Get FIQ buffer from platform_data Instead of exporting the FIQ buffer symbol to be used in ams-delta-serio driver, pass it to the driver as platform_data. Signed-off-by: Janusz Krzysztofik Acked-by: Dmitry Torokhov Signed-off-by: Tony Lindgren --- arch/arm/mach-omap1/ams-delta-fiq.c | 6 +++--- arch/arm/mach-omap1/board-ams-delta.c | 8 ++++++++ drivers/input/serio/ams_delta_serio.c | 20 +++++++++++++------- include/linux/platform_data/ams-delta-fiq.h | 4 ---- 4 files changed, 24 insertions(+), 14 deletions(-) diff --git a/arch/arm/mach-omap1/ams-delta-fiq.c b/arch/arm/mach-omap1/ams-delta-fiq.c index 82ca4246a5e4..b0dc7ddf5877 100644 --- a/arch/arm/mach-omap1/ams-delta-fiq.c +++ b/arch/arm/mach-omap1/ams-delta-fiq.c @@ -40,8 +40,7 @@ static struct fiq_handler fh = { * keystrokes received from the qwerty keyboard. See * for details of offsets. */ -unsigned int fiq_buffer[1024]; -EXPORT_SYMBOL(fiq_buffer); +static unsigned int fiq_buffer[1024]; static struct irq_chip *irq_chip; static struct irq_data *irq_data[16]; @@ -203,9 +202,10 @@ void __init ams_delta_init_fiq(struct gpio_chip *chip, val = omap_readl(OMAP_IH1_BASE + offset) | 1; omap_writel(val, OMAP_IH1_BASE + offset); - /* Initialize serio device IRQ resource */ + /* Initialize serio device IRQ resource and platform_data */ serio->resource[0].start = gpiod_to_irq(clk); serio->resource[0].end = serio->resource[0].start; + serio->dev.platform_data = fiq_buffer; /* * Since FIQ handler performs handling of GPIO registers for diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c index f453b08ed7ef..22f9be297c2a 100644 --- a/arch/arm/mach-omap1/board-ams-delta.c +++ b/arch/arm/mach-omap1/board-ams-delta.c @@ -537,6 +537,14 @@ static struct resource ams_delta_serio_resources[] = { static struct platform_device ams_delta_serio_device = { .name = "ams-delta-serio", .id = PLATFORM_DEVID_NONE, + .dev = { + /* + * Initialize .platform_data explicitly with NULL to + * indicate it is going to be used. It will be replaced + * with FIQ buffer address as soon as FIQ is initialized. + */ + .platform_data = NULL, + }, .num_resources = ARRAY_SIZE(ams_delta_serio_resources), .resource = ams_delta_serio_resources, }; diff --git a/drivers/input/serio/ams_delta_serio.c b/drivers/input/serio/ams_delta_serio.c index c1f8226f172e..f8663d7891f2 100644 --- a/drivers/input/serio/ams_delta_serio.c +++ b/drivers/input/serio/ams_delta_serio.c @@ -37,6 +37,7 @@ MODULE_LICENSE("GPL"); struct ams_delta_serio { struct serio *serio; struct regulator *vcc; + unsigned int *fiq_buffer; }; static int check_data(struct serio *serio, int data) @@ -66,22 +67,23 @@ static int check_data(struct serio *serio, int data) static irqreturn_t ams_delta_serio_interrupt(int irq, void *dev_id) { struct ams_delta_serio *priv = dev_id; - int *circ_buff = &fiq_buffer[FIQ_CIRC_BUFF]; + int *circ_buff = &priv->fiq_buffer[FIQ_CIRC_BUFF]; int data, dfl; u8 scancode; - fiq_buffer[FIQ_IRQ_PEND] = 0; + priv->fiq_buffer[FIQ_IRQ_PEND] = 0; /* * Read data from the circular buffer, check it * and then pass it on the serio */ - while (fiq_buffer[FIQ_KEYS_CNT] > 0) { + while (priv->fiq_buffer[FIQ_KEYS_CNT] > 0) { - data = circ_buff[fiq_buffer[FIQ_HEAD_OFFSET]++]; - fiq_buffer[FIQ_KEYS_CNT]--; - if (fiq_buffer[FIQ_HEAD_OFFSET] == fiq_buffer[FIQ_BUF_LEN]) - fiq_buffer[FIQ_HEAD_OFFSET] = 0; + data = circ_buff[priv->fiq_buffer[FIQ_HEAD_OFFSET]++]; + priv->fiq_buffer[FIQ_KEYS_CNT]--; + if (priv->fiq_buffer[FIQ_HEAD_OFFSET] == + priv->fiq_buffer[FIQ_BUF_LEN]) + priv->fiq_buffer[FIQ_HEAD_OFFSET] = 0; dfl = check_data(priv->serio, data); scancode = (u8) (data >> 1) & 0xFF; @@ -116,6 +118,10 @@ static int ams_delta_serio_init(struct platform_device *pdev) if (!priv) return -ENOMEM; + priv->fiq_buffer = pdev->dev.platform_data; + if (!priv->fiq_buffer) + return -EINVAL; + priv->vcc = devm_regulator_get(&pdev->dev, "vcc"); if (IS_ERR(priv->vcc)) { err = PTR_ERR(priv->vcc); diff --git a/include/linux/platform_data/ams-delta-fiq.h b/include/linux/platform_data/ams-delta-fiq.h index dc0f835ea918..cf4589ccb720 100644 --- a/include/linux/platform_data/ams-delta-fiq.h +++ b/include/linux/platform_data/ams-delta-fiq.h @@ -55,8 +55,4 @@ #define FIQ_CIRC_BUFF 30 /*Start of circular buffer */ -#ifndef __ASSEMBLER__ -extern unsigned int fiq_buffer[]; -#endif - #endif From d08605a64e67944eaecfb0e6340f633e01376951 Mon Sep 17 00:00:00 2001 From: Janusz Krzysztofik Date: Tue, 3 Jul 2018 00:28:28 +0200 Subject: [PATCH 069/112] ARM: OMAP1: ams-delta: move late devices back to init_machine Initialization of several Amstrad Delta devices was once moved to late_initcall by commit f7519d8c8290 ("ARM: OMAP1: ams-delta: register latch dependent devices later"). The purpose of that move was to allow smooth conversion of Amstrad Delta latches to GPIO. After successful conversion only ams_delta_serio driver was moved back to device_initcall by commit 8d09a1bb3147 ("input: serio: ams-delta: toggle keyboard power over GPIO"). Registration of ams-delta-nand and lcd_ams_delta devices was kept in late_initcall in order to avoid corrupt data reported by the serio driver on boot. Registration of cx20442-codec device was kept there for it to be probed after a regulator on which it depended was ready. The issue of "keybrd_dataout" GPIO pin not initilized to GPIO_OUT_LOW before other latch2 pins causing the corruption have been apparently fixed by commit 5322c19b117a ("ARM: OMAP1: ams-delta: Hog "keybrd_dataout" GPIO pin"). In turn, the issue of missing regulator has been fixed by commit 50c678772a0b ("ASoC: cx20442: Don't ignore regulator_get() errors."). Simplify the board init code by moving registration of those devices back to init_machine. Signed-off-by: Janusz Krzysztofik Signed-off-by: Tony Lindgren --- arch/arm/mach-omap1/board-ams-delta.c | 24 ++---------------------- 1 file changed, 2 insertions(+), 22 deletions(-) diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c index 22f9be297c2a..dd28d2614d7f 100644 --- a/arch/arm/mach-omap1/board-ams-delta.c +++ b/arch/arm/mach-omap1/board-ams-delta.c @@ -596,9 +596,6 @@ static struct platform_device *ams_delta_devices[] __initdata = { &ams_delta_camera_device, &ams_delta_audio_device, &ams_delta_serio_device, -}; - -static struct platform_device *late_devices[] __initdata = { &ams_delta_nand_device, &ams_delta_lcd_device, &cx20442_codec_device, @@ -607,9 +604,6 @@ static struct platform_device *late_devices[] __initdata = { static struct gpiod_lookup_table *ams_delta_gpio_tables[] __initdata = { &ams_delta_audio_gpio_table, &keybrd_pwr_gpio_table, -}; - -static struct gpiod_lookup_table *late_gpio_tables[] __initdata = { &ams_delta_lcd_gpio_table, &ams_delta_nand_gpio_table, }; @@ -713,6 +707,8 @@ static void __init ams_delta_init(void) ams_delta_audio_gpio_table.dev_id = dev_name(&ams_delta_audio_device.dev); keybrd_pwr_gpio_table.dev_id = dev_name(&keybrd_pwr_device.dev); + ams_delta_nand_gpio_table.dev_id = dev_name(&ams_delta_nand_device.dev); + ams_delta_lcd_gpio_table.dev_id = dev_name(&ams_delta_lcd_device.dev); /* * Once GPIO lookup tables are populated with dev_names, register them. @@ -836,20 +832,6 @@ static int __init ams_delta_gpio_init(void) } device_initcall_sync(ams_delta_gpio_init); -static void __init ams_delta_late_devices(void) -{ - platform_add_devices(late_devices, ARRAY_SIZE(late_devices)); - - /* - * As soon as devices have been registered, assign their dev_names - * to respective GPIO lookup tables before they are added. - */ - ams_delta_lcd_gpio_table.dev_id = dev_name(&ams_delta_lcd_device.dev); - ams_delta_nand_gpio_table.dev_id = dev_name(&ams_delta_nand_device.dev); - - gpiod_add_lookup_tables(late_gpio_tables, ARRAY_SIZE(late_gpio_tables)); -} - static int __init modem_nreset_init(void) { int err; @@ -894,8 +876,6 @@ static int __init late_init(void) { int err; - ams_delta_late_devices(); - err = modem_nreset_init(); if (err) return err; From d082852f40de5cf55a7a689bf582fced39f5443e Mon Sep 17 00:00:00 2001 From: Anson Huang Date: Fri, 22 Jun 2018 13:32:48 +0800 Subject: [PATCH 070/112] ARM: imx: enable bus auto clock gating function for i.mx6sll i.MX6SLL has HW bus auto clock gating function, enable it by default to save VDD_SOC_IN power, about 5% ~ 20% saved depends on different use cases. Signed-off-by: Anson Huang Acked-by: Lee Jones Signed-off-by: Shawn Guo --- arch/arm/mach-imx/pm-imx6.c | 11 +++++++++-- include/linux/mfd/syscon/imx6q-iomuxc-gpr.h | 3 +++ 2 files changed, 12 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-imx/pm-imx6.c b/arch/arm/mach-imx/pm-imx6.c index 791e1fda248e..b08e407d8d96 100644 --- a/arch/arm/mach-imx/pm-imx6.c +++ b/arch/arm/mach-imx/pm-imx6.c @@ -648,10 +648,17 @@ void __init imx6dl_pm_init(void) void __init imx6sl_pm_init(void) { - if (cpu_is_imx6sl()) + struct regmap *gpr; + + if (cpu_is_imx6sl()) { imx6_pm_common_init(&imx6sl_pm_data); - else + } else { imx6_pm_common_init(&imx6sll_pm_data); + gpr = syscon_regmap_lookup_by_compatible("fsl,imx6q-iomuxc-gpr"); + if (!IS_ERR(gpr)) + regmap_update_bits(gpr, IOMUXC_GPR5, + IMX6SLL_GPR5_AFCG_X_BYPASS_MASK, 0); + } } void __init imx6sx_pm_init(void) diff --git a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h index e06f5f79eaef..6c1ad160ed87 100644 --- a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h +++ b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h @@ -457,4 +457,7 @@ #define MCLK_DIR(x) (x == 1 ? IMX6UL_GPR1_SAI1_MCLK_DIR : x == 2 ? \ IMX6UL_GPR1_SAI2_MCLK_DIR : IMX6UL_GPR1_SAI3_MCLK_DIR) +/* For imx6sll iomux gpr register field define */ +#define IMX6SLL_GPR5_AFCG_X_BYPASS_MASK (0x1f << 11) + #endif /* __LINUX_IMX6Q_IOMUXC_GPR_H */ From 1a1f919eb52ea1e63e135a478c5762b3d8b0935b Mon Sep 17 00:00:00 2001 From: Oleksij Rempel Date: Tue, 3 Jul 2018 09:12:47 +0200 Subject: [PATCH 071/112] ARM: imx: Provide support for NXP i.MX7D Cortex-M4 Cortex M4 part can be started from a boot loader or over Linux remoteproc framework. Signed-off-by: Oleksij Rempel Signed-off-by: Shawn Guo --- arch/arm/mach-imx/Kconfig | 33 +++++++++++++++++++----------- arch/arm/mach-imx/Makefile | 3 ++- arch/arm/mach-imx/mach-imx7d-cm4.c | 18 ++++++++++++++++ 3 files changed, 41 insertions(+), 13 deletions(-) create mode 100644 arch/arm/mach-imx/mach-imx7d-cm4.c diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index 6f4232384774..abc337111eff 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -523,18 +523,6 @@ config SOC_IMX6UL help This enables support for Freescale i.MX6 UltraLite processor. -config SOC_IMX7D - bool "i.MX7 Dual support" - select PINCTRL_IMX7D - select ARM_GIC - select HAVE_ARM_ARCH_TIMER - select HAVE_IMX_ANATOP - select HAVE_IMX_MMDC - select HAVE_IMX_SRC - select IMX_GPCV2 - help - This enables support for Freescale i.MX7 Dual processor. - config SOC_LS1021A bool "Freescale LS1021A support" select ARM_GIC @@ -549,6 +537,27 @@ comment "Cortex-A/Cortex-M asymmetric multiprocessing platforms" if ARCH_MULTI_V7 || ARM_SINGLE_ARMV7M +config SOC_IMX7D_CA7 + bool + select ARM_GIC + select HAVE_ARM_ARCH_TIMER + select HAVE_IMX_ANATOP + select HAVE_IMX_MMDC + select HAVE_IMX_SRC + select IMX_GPCV2 + +config SOC_IMX7D_CM4 + bool + select ARMV7M_SYSTICK + +config SOC_IMX7D + bool "i.MX7 Dual support" + select PINCTRL_IMX7D + select SOC_IMX7D_CA7 if ARCH_MULTI_V7 + select SOC_IMX7D_CM4 if ARM_SINGLE_ARMV7M + help + This enables support for Freescale i.MX7 Dual processor. + config SOC_VF610 bool "Vybrid Family VF610 support" select ARM_GIC if ARCH_MULTI_V7 diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile index 127fdf3ff600..146ebf97b7eb 100644 --- a/arch/arm/mach-imx/Makefile +++ b/arch/arm/mach-imx/Makefile @@ -81,7 +81,8 @@ obj-$(CONFIG_SOC_IMX6SL) += mach-imx6sl.o obj-$(CONFIG_SOC_IMX6SLL) += mach-imx6sl.o obj-$(CONFIG_SOC_IMX6SX) += mach-imx6sx.o obj-$(CONFIG_SOC_IMX6UL) += mach-imx6ul.o -obj-$(CONFIG_SOC_IMX7D) += mach-imx7d.o +obj-$(CONFIG_SOC_IMX7D_CA7) += mach-imx7d.o +obj-$(CONFIG_SOC_IMX7D_CM4) += mach-imx7d-cm4.o ifeq ($(CONFIG_SUSPEND),y) AFLAGS_suspend-imx6.o :=-Wa,-march=armv7-a diff --git a/arch/arm/mach-imx/mach-imx7d-cm4.c b/arch/arm/mach-imx/mach-imx7d-cm4.c new file mode 100644 index 000000000000..0800b5891d2a --- /dev/null +++ b/arch/arm/mach-imx/mach-imx7d-cm4.c @@ -0,0 +1,18 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2018 Pengutronix, Oleksij Rempel + */ + +#include +#include +#include + +static const char * const imx7d_cm4_dt_compat[] __initconst = { + "fsl,imx7d-cm4", + NULL, +}; + +DT_MACHINE_START(IMX7D, "Freescale i.MX7 Dual Cortex-M4 (Device Tree)") + .dt_compat = imx7d_cm4_dt_compat, + .restart = armv7m_restart, +MACHINE_END From 6d609b35c815ba20132b7b64bcca04516bb17c56 Mon Sep 17 00:00:00 2001 From: Dave Gerlach Date: Thu, 21 Jun 2018 14:43:08 +0530 Subject: [PATCH 072/112] ARM: hwmod: RTC: Don't assume lock/unlock will be called with irq enabled When the RTC lock and unlock functions were introduced it was likely assumed that they would always be called from irq enabled context, hence the use of local_irq_disable/enable. This is no longer true as the RTC+DDR path makes a late call during the suspend path after irqs have been disabled to enable the RTC hwmod which calls both unlock and lock, leading to IRQs being reenabled through the local_irq_enable call in omap_hwmod_rtc_lock call. To avoid this change the local_irq_disable/enable to local_irq_save/restore to ensure that from whatever context this is called the proper IRQ configuration is maintained. Signed-off-by: Dave Gerlach Signed-off-by: Keerthy Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/omap_hwmod_reset.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/arch/arm/mach-omap2/omap_hwmod_reset.c b/arch/arm/mach-omap2/omap_hwmod_reset.c index b68f9c0aff0b..d5ddba00bb73 100644 --- a/arch/arm/mach-omap2/omap_hwmod_reset.c +++ b/arch/arm/mach-omap2/omap_hwmod_reset.c @@ -92,11 +92,13 @@ static void omap_rtc_wait_not_busy(struct omap_hwmod *oh) */ void omap_hwmod_rtc_unlock(struct omap_hwmod *oh) { - local_irq_disable(); + unsigned long flags; + + local_irq_save(flags); omap_rtc_wait_not_busy(oh); omap_hwmod_write(OMAP_RTC_KICK0_VALUE, oh, OMAP_RTC_KICK0_REG); omap_hwmod_write(OMAP_RTC_KICK1_VALUE, oh, OMAP_RTC_KICK1_REG); - local_irq_enable(); + local_irq_restore(flags); } /** @@ -110,9 +112,11 @@ void omap_hwmod_rtc_unlock(struct omap_hwmod *oh) */ void omap_hwmod_rtc_lock(struct omap_hwmod *oh) { - local_irq_disable(); + unsigned long flags; + + local_irq_save(flags); omap_rtc_wait_not_busy(oh); omap_hwmod_write(0x0, oh, OMAP_RTC_KICK0_REG); omap_hwmod_write(0x0, oh, OMAP_RTC_KICK1_REG); - local_irq_enable(); + local_irq_restore(flags); } From a82c02e5b8ec55bfa31218ef26c78b7d88afa97b Mon Sep 17 00:00:00 2001 From: Bartosz Golaszewski Date: Thu, 28 Jun 2018 11:57:36 +0200 Subject: [PATCH 073/112] clk: davinci: psc-da850: remove the 'davinci_nand.0" lookup Since commit a8e3923ab571 ("mtd: rawnand: davinci: don't acquire and enable clock") we no longer acquire the aemif clock from the davinci nand driver - we only do it from the ti-aemif driver. Remove the nand entry from the psc lookup table. Signed-off-by: Bartosz Golaszewski Reviewed-by: David Lechner Signed-off-by: David Lechner --- drivers/clk/davinci/psc-da850.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/clk/davinci/psc-da850.c b/drivers/clk/davinci/psc-da850.c index d196dcbed560..5a18bca464cd 100644 --- a/drivers/clk/davinci/psc-da850.c +++ b/drivers/clk/davinci/psc-da850.c @@ -16,8 +16,7 @@ #include "psc.h" -LPSC_CLKDEV2(emifa_clkdev, NULL, "ti-aemif", - "aemif", "davinci_nand.0"); +LPSC_CLKDEV1(emifa_clkdev, NULL, "ti-aemif"); LPSC_CLKDEV1(spi0_clkdev, NULL, "spi_davinci.0"); LPSC_CLKDEV1(mmcsd0_clkdev, NULL, "da830-mmc.0"); LPSC_CLKDEV1(uart0_clkdev, NULL, "serial8250.0"); From 63521abc150752b26f3e347ed5809541b5a14aed Mon Sep 17 00:00:00 2001 From: Bartosz Golaszewski Date: Thu, 28 Jun 2018 11:57:37 +0200 Subject: [PATCH 074/112] clk: davinci: psc-dm365: use two lookup entries for the aemif clock We want to be able to get the clock both from the board file by its con_id and from the aemif driver by dev_id. Signed-off-by: Bartosz Golaszewski Reviewed-by: David Lechner Signed-off-by: David Lechner --- drivers/clk/davinci/psc-dm365.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/clk/davinci/psc-dm365.c b/drivers/clk/davinci/psc-dm365.c index 8c73086cc676..c75424f4ea3b 100644 --- a/drivers/clk/davinci/psc-dm365.c +++ b/drivers/clk/davinci/psc-dm365.c @@ -21,7 +21,8 @@ LPSC_CLKDEV1(mmcsd1_clkdev, NULL, "da830-mmc.1"); LPSC_CLKDEV1(asp0_clkdev, NULL, "davinci-mcbsp"); LPSC_CLKDEV1(usb_clkdev, "usb", NULL); LPSC_CLKDEV1(spi2_clkdev, NULL, "spi_davinci.2"); -LPSC_CLKDEV1(aemif_clkdev, "aemif", NULL); +LPSC_CLKDEV2(aemif_clkdev, "aemif", NULL, + NULL, "ti-aemif"); LPSC_CLKDEV1(mmcsd0_clkdev, NULL, "da830-mmc.0"); LPSC_CLKDEV1(i2c_clkdev, NULL, "i2c_davinci.1"); LPSC_CLKDEV1(uart0_clkdev, NULL, "serial8250.0"); From 8d1a83faa6d3f9c5ffb2a844bc6da6631e177245 Mon Sep 17 00:00:00 2001 From: Bartosz Golaszewski Date: Thu, 28 Jun 2018 11:57:38 +0200 Subject: [PATCH 075/112] clk: davinci: psc-dm644x: use two lookup entries for the aemif clock We want to be able to get the clock both from the board file by its con_id and from the aemif driver by dev_id. Signed-off-by: Bartosz Golaszewski Reviewed-by: David Lechner Signed-off-by: David Lechner --- drivers/clk/davinci/psc-dm644x.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/clk/davinci/psc-dm644x.c b/drivers/clk/davinci/psc-dm644x.c index fc0230e3a3d6..0cea6e0bd5f0 100644 --- a/drivers/clk/davinci/psc-dm644x.c +++ b/drivers/clk/davinci/psc-dm644x.c @@ -21,7 +21,8 @@ LPSC_CLKDEV2(emac_clkdev, NULL, "davinci_emac.1", "fck", "davinci_mdio.0"); LPSC_CLKDEV1(usb_clkdev, "usb", NULL); LPSC_CLKDEV1(ide_clkdev, NULL, "palm_bk3710"); -LPSC_CLKDEV1(aemif_clkdev, "aemif", NULL); +LPSC_CLKDEV2(aemif_clkdev, "aemif", NULL, + NULL, "ti-aemif"); LPSC_CLKDEV1(mmcsd_clkdev, NULL, "dm6441-mmc.0"); LPSC_CLKDEV1(asp0_clkdev, NULL, "davinci-mcbsp"); LPSC_CLKDEV1(i2c_clkdev, NULL, "i2c_davinci.1"); From b910f74a03fb87b5838216612a1c3da445148ce6 Mon Sep 17 00:00:00 2001 From: Bartosz Golaszewski Date: Thu, 28 Jun 2018 11:57:39 +0200 Subject: [PATCH 076/112] clk: davinci: psc-dm646x: use two lookup entries for the aemif clock We want to be able to get the clock both from the board file by its con_id and from the aemif driver by dev_id. Signed-off-by: Bartosz Golaszewski Reviewed-by: David Lechner Signed-off-by: David Lechner --- drivers/clk/davinci/psc-dm646x.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/clk/davinci/psc-dm646x.c b/drivers/clk/davinci/psc-dm646x.c index c3f82ed70a80..20012dc7471a 100644 --- a/drivers/clk/davinci/psc-dm646x.c +++ b/drivers/clk/davinci/psc-dm646x.c @@ -18,7 +18,8 @@ LPSC_CLKDEV1(ide_clkdev, NULL, "palm_bk3710"); LPSC_CLKDEV2(emac_clkdev, NULL, "davinci_emac.1", "fck", "davinci_mdio.0"); -LPSC_CLKDEV1(aemif_clkdev, "aemif", NULL); +LPSC_CLKDEV2(aemif_clkdev, "aemif", NULL, + NULL, "ti-aemif"); LPSC_CLKDEV1(mcasp0_clkdev, NULL, "davinci-mcasp.0"); LPSC_CLKDEV1(mcasp1_clkdev, NULL, "davinci-mcasp.1"); LPSC_CLKDEV1(uart0_clkdev, NULL, "serial8250.0"); From f917ff75ac55b6d829c9d1142e83913064565d5b Mon Sep 17 00:00:00 2001 From: Bartosz Golaszewski Date: Thu, 28 Jun 2018 11:57:40 +0200 Subject: [PATCH 077/112] clk: davinci: psc-da830: add a lookup entry for aemif clock We want to use the ti-aemif platform driver for da830-evm. To make it work we need a lookup entry for the aemif clock. Signed-off-by: Bartosz Golaszewski Reviewed-by: David Lechner Signed-off-by: David Lechner --- drivers/clk/davinci/psc-da830.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/clk/davinci/psc-da830.c b/drivers/clk/davinci/psc-da830.c index 081b039fcb02..6481337382a6 100644 --- a/drivers/clk/davinci/psc-da830.c +++ b/drivers/clk/davinci/psc-da830.c @@ -14,6 +14,7 @@ #include "psc.h" +LPSC_CLKDEV1(aemif_clkdev, NULL, "ti-aemif"); LPSC_CLKDEV1(spi0_clkdev, NULL, "spi_davinci.0"); LPSC_CLKDEV1(mmcsd_clkdev, NULL, "da830-mmc.0"); LPSC_CLKDEV1(uart0_clkdev, NULL, "serial8250.0"); @@ -22,7 +23,7 @@ static const struct davinci_lpsc_clk_info da830_psc0_info[] = { LPSC(0, 0, tpcc, pll0_sysclk2, NULL, LPSC_ALWAYS_ENABLED), LPSC(1, 0, tptc0, pll0_sysclk2, NULL, LPSC_ALWAYS_ENABLED), LPSC(2, 0, tptc1, pll0_sysclk2, NULL, LPSC_ALWAYS_ENABLED), - LPSC(3, 0, aemif, pll0_sysclk3, NULL, LPSC_ALWAYS_ENABLED), + LPSC(3, 0, aemif, pll0_sysclk3, aemif_clkdev, LPSC_ALWAYS_ENABLED), LPSC(4, 0, spi0, pll0_sysclk2, spi0_clkdev, 0), LPSC(5, 0, mmcsd, pll0_sysclk2, mmcsd_clkdev, 0), LPSC(6, 0, aintc, pll0_sysclk4, NULL, LPSC_ALWAYS_ENABLED), From eb07fe9f9f28d4ce441c5b51653d421725b0c998 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Mon, 9 Jul 2018 10:23:41 +0300 Subject: [PATCH 078/112] ARM: OMAP2+: reuse DEFINE_SHOW_ATTRIBUTE() macro Reuse DEFINE_SHOW_ATTRIBUTE() macro instead of open coding file operations followed by custom ->open() callbacks per each attribute. Signed-off-by: Andy Shevchenko Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/pm-debug.c | 37 ++++++---------------------------- 1 file changed, 6 insertions(+), 31 deletions(-) diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c index acb698d5780f..5a8839203958 100644 --- a/arch/arm/mach-omap2/pm-debug.c +++ b/arch/arm/mach-omap2/pm-debug.c @@ -47,11 +47,6 @@ static int pm_dbg_init_done; static int pm_dbg_init(void); -enum { - DEBUG_FILE_COUNTERS = 0, - DEBUG_FILE_TIMERS, -}; - static const char pwrdm_state_names[][PWRDM_MAX_PWRSTS] = { "OFF", "RET", @@ -141,39 +136,21 @@ static int pwrdm_dbg_show_timer(struct powerdomain *pwrdm, void *user) return 0; } -static int pm_dbg_show_counters(struct seq_file *s, void *unused) +static int pm_dbg_counters_show(struct seq_file *s, void *unused) { pwrdm_for_each(pwrdm_dbg_show_counter, s); clkdm_for_each(clkdm_dbg_show_counter, s); return 0; } +DEFINE_SHOW_ATTRIBUTE(pm_dbg_counters); -static int pm_dbg_show_timers(struct seq_file *s, void *unused) +static int pm_dbg_timers_show(struct seq_file *s, void *unused) { pwrdm_for_each(pwrdm_dbg_show_timer, s); return 0; } - -static int pm_dbg_open(struct inode *inode, struct file *file) -{ - switch ((int)inode->i_private) { - case DEBUG_FILE_COUNTERS: - return single_open(file, pm_dbg_show_counters, - &inode->i_private); - case DEBUG_FILE_TIMERS: - default: - return single_open(file, pm_dbg_show_timers, - &inode->i_private); - } -} - -static const struct file_operations debug_fops = { - .open = pm_dbg_open, - .read = seq_read, - .llseek = seq_lseek, - .release = single_release, -}; +DEFINE_SHOW_ATTRIBUTE(pm_dbg_timers); static int pwrdm_suspend_get(void *data, u64 *val) { @@ -259,10 +236,8 @@ static int __init pm_dbg_init(void) if (!d) return -EINVAL; - (void) debugfs_create_file("count", S_IRUGO, - d, (void *)DEBUG_FILE_COUNTERS, &debug_fops); - (void) debugfs_create_file("time", S_IRUGO, - d, (void *)DEBUG_FILE_TIMERS, &debug_fops); + (void) debugfs_create_file("count", 0444, d, NULL, &pm_dbg_counters_fops); + (void) debugfs_create_file("time", 0444, d, NULL, &pm_dbg_timers_fops); pwrdm_for_each(pwrdms_setup, (void *)d); From 74655749a58405e259eaaba66bfc391fdbe1e34e Mon Sep 17 00:00:00 2001 From: Dave Gerlach Date: Mon, 9 Jul 2018 13:03:16 +0530 Subject: [PATCH 079/112] ARM: OMAP2+: sleep33/43xx: Make sleep actions configurable Add an argument to the sleep33xx and sleep43xx code to allow us to set flags to determine which portions of the code get called in order to use the same code for multiple power saving modes. This patch allows us to decide whether or not we flush and disable caches, save EMIF context, put the memory into self refresh and disable the EMIF, and/or invoke the wkup_m3 when entering into WFI. Signed-off-by: Dave Gerlach Signed-off-by: Tero Kristo Signed-off-by: Keerthy Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/pm33xx-core.c | 10 +++-- arch/arm/mach-omap2/sleep33xx.S | 47 +++++++++++++++++++++++ arch/arm/mach-omap2/sleep43xx.S | 56 ++++++++++++++++++++++++++-- drivers/soc/ti/pm33xx.c | 15 +++++++- include/linux/platform_data/pm33xx.h | 26 ++++++++++++- 5 files changed, 144 insertions(+), 10 deletions(-) diff --git a/arch/arm/mach-omap2/pm33xx-core.c b/arch/arm/mach-omap2/pm33xx-core.c index 9b3755a2e2ec..e363b9717fa5 100644 --- a/arch/arm/mach-omap2/pm33xx-core.c +++ b/arch/arm/mach-omap2/pm33xx-core.c @@ -106,12 +106,13 @@ static void amx3_post_suspend_common(void) pr_err("PM: GFX domain did not transition: %x\n", status); } -static int am33xx_suspend(unsigned int state, int (*fn)(unsigned long)) +static int am33xx_suspend(unsigned int state, int (*fn)(unsigned long), + unsigned long args) { int ret = 0; amx3_pre_suspend_common(); - ret = cpu_suspend(0, fn); + ret = cpu_suspend(args, fn); amx3_post_suspend_common(); /* @@ -128,13 +129,14 @@ static int am33xx_suspend(unsigned int state, int (*fn)(unsigned long)) return ret; } -static int am43xx_suspend(unsigned int state, int (*fn)(unsigned long)) +static int am43xx_suspend(unsigned int state, int (*fn)(unsigned long), + unsigned long args) { int ret = 0; amx3_pre_suspend_common(); scu_power_mode(scu_base, SCU_PM_POWEROFF); - ret = cpu_suspend(0, fn); + ret = cpu_suspend(args, fn); scu_power_mode(scu_base, SCU_PM_NORMAL); amx3_post_suspend_common(); diff --git a/arch/arm/mach-omap2/sleep33xx.S b/arch/arm/mach-omap2/sleep33xx.S index 322b3bb868b4..8d0d53b671f9 100644 --- a/arch/arm/mach-omap2/sleep33xx.S +++ b/arch/arm/mach-omap2/sleep33xx.S @@ -8,6 +8,7 @@ #include #include +#include #include #include #include @@ -19,12 +20,25 @@ #define AM33XX_CM_CLKCTRL_MODULEMODE_DISABLE 0x0003 #define AM33XX_CM_CLKCTRL_MODULEMODE_ENABLE 0x0002 +/* replicated define because linux/bitops.h cannot be included in assembly */ +#define BIT(nr) (1 << (nr)) + .arm .align 3 ENTRY(am33xx_do_wfi) stmfd sp!, {r4 - r11, lr} @ save registers on stack + /* Save wfi_flags arg to data space */ + mov r4, r0 + adr r3, am33xx_pm_ro_sram_data + ldr r2, [r3, #AMX3_PM_RO_SRAM_DATA_VIRT_OFFSET] + str r4, [r2, #AMX3_PM_WFI_FLAGS_OFFSET] + + /* Only flush cache is we know we are losing MPU context */ + tst r4, #WFI_FLAG_FLUSH_CACHE + beq cache_skip_flush + /* * Flush all data from the L1 and L2 data cache before disabling * SCTLR.C bit. @@ -48,14 +62,33 @@ ENTRY(am33xx_do_wfi) ldr r1, kernel_flush blx r1 + adr r3, am33xx_pm_ro_sram_data + ldr r2, [r3, #AMX3_PM_RO_SRAM_DATA_VIRT_OFFSET] + ldr r4, [r2, #AMX3_PM_WFI_FLAGS_OFFSET] + +cache_skip_flush: + /* Check if we want self refresh */ + tst r4, #WFI_FLAG_SELF_REFRESH + beq emif_skip_enter_sr + adr r9, am33xx_emif_sram_table ldr r3, [r9, #EMIF_PM_ENTER_SR_OFFSET] blx r3 +emif_skip_enter_sr: + /* Only necessary if PER is losing context */ + tst r4, #WFI_FLAG_SAVE_EMIF + beq emif_skip_save + ldr r3, [r9, #EMIF_PM_SAVE_CONTEXT_OFFSET] blx r3 +emif_skip_save: + /* Only can disable EMIF if we have entered self refresh */ + tst r4, #WFI_FLAG_SELF_REFRESH + beq emif_skip_disable + /* Disable EMIF */ ldr r1, virt_emif_clkctrl ldr r2, [r1] @@ -69,6 +102,10 @@ wait_emif_disable: cmp r2, r3 bne wait_emif_disable +emif_skip_disable: + tst r4, #WFI_FLAG_WAKE_M3 + beq wkup_m3_skip + /* * For the MPU WFI to be registered as an interrupt * to WKUP_M3, MPU_CLKCTRL.MODULEMODE needs to be set @@ -79,6 +116,7 @@ wait_emif_disable: bic r2, r2, #AM33XX_CM_CLKCTRL_MODULEMODE_DISABLE str r2, [r1] +wkup_m3_skip: /* * Execute an ISB instruction to ensure that all of the * CP15 register changes have been committed. @@ -132,10 +170,18 @@ wait_emif_enable: cmp r2, r3 bne wait_emif_enable + /* Only necessary if PER is losing context */ + tst r4, #WFI_FLAG_SELF_REFRESH + beq emif_skip_exit_sr_abt + adr r9, am33xx_emif_sram_table ldr r1, [r9, #EMIF_PM_ABORT_SR_OFFSET] blx r1 +emif_skip_exit_sr_abt: + tst r4, #WFI_FLAG_FLUSH_CACHE + beq cache_skip_restore + /* * Set SCTLR.C bit to allow data cache allocation */ @@ -144,6 +190,7 @@ wait_emif_enable: mcr p15, 0, r0, c1, c0, 0 isb +cache_skip_restore: /* Let the suspend code know about the abort */ mov r0, #1 ldmfd sp!, {r4 - r11, pc} @ restore regs and return diff --git a/arch/arm/mach-omap2/sleep43xx.S b/arch/arm/mach-omap2/sleep43xx.S index 8903814a6677..cd7e95f48a73 100644 --- a/arch/arm/mach-omap2/sleep43xx.S +++ b/arch/arm/mach-omap2/sleep43xx.S @@ -9,7 +9,7 @@ #include #include #include - +#include #include #include #include @@ -22,6 +22,9 @@ #include "prm33xx.h" #include "prcm43xx.h" +/* replicated define because linux/bitops.h cannot be included in assembly */ +#define BIT(nr) (1 << (nr)) + #define AM33XX_CM_CLKCTRL_MODULESTATE_DISABLED 0x00030000 #define AM33XX_CM_CLKCTRL_MODULEMODE_DISABLE 0x0003 #define AM33XX_CM_CLKCTRL_MODULEMODE_ENABLE 0x0002 @@ -51,6 +54,12 @@ ENTRY(am43xx_do_wfi) stmfd sp!, {r4 - r11, lr} @ save registers on stack + /* Save wfi_flags arg to data space */ + mov r4, r0 + adr r3, am43xx_pm_ro_sram_data + ldr r2, [r3, #AMX3_PM_RO_SRAM_DATA_VIRT_OFFSET] + str r4, [r2, #AMX3_PM_WFI_FLAGS_OFFSET] + #ifdef CONFIG_CACHE_L2X0 /* Retrieve l2 cache virt address BEFORE we shut off EMIF */ ldr r1, get_l2cache_base @@ -58,6 +67,10 @@ ENTRY(am43xx_do_wfi) mov r8, r0 #endif + /* Only flush cache is we know we are losing MPU context */ + tst r4, #WFI_FLAG_FLUSH_CACHE + beq cache_skip_flush + /* * Flush all data from the L1 and L2 data cache before disabling * SCTLR.C bit. @@ -128,13 +141,33 @@ sync: bne sync #endif + /* Restore wfi_flags */ + adr r3, am43xx_pm_ro_sram_data + ldr r2, [r3, #AMX3_PM_RO_SRAM_DATA_VIRT_OFFSET] + ldr r4, [r2, #AMX3_PM_WFI_FLAGS_OFFSET] + +cache_skip_flush: + /* Check if we want self refresh */ + tst r4, #WFI_FLAG_SELF_REFRESH + beq emif_skip_enter_sr + adr r9, am43xx_emif_sram_table ldr r3, [r9, #EMIF_PM_ENTER_SR_OFFSET] blx r3 +emif_skip_enter_sr: + /* Only necessary if PER is losing context */ + tst r4, #WFI_FLAG_SAVE_EMIF + beq emif_skip_save + ldr r3, [r9, #EMIF_PM_SAVE_CONTEXT_OFFSET] - blx r3 + blx r3 + +emif_skip_save: + /* Only can disable EMIF if we have entered self refresh */ + tst r4, #WFI_FLAG_SELF_REFRESH + beq emif_skip_disable /* Disable EMIF */ ldr r1, am43xx_virt_emif_clkctrl @@ -148,6 +181,10 @@ wait_emif_disable: cmp r2, r3 bne wait_emif_disable +emif_skip_disable: + tst r4, #WFI_FLAG_WAKE_M3 + beq wkup_m3_skip + /* * For the MPU WFI to be registered as an interrupt * to WKUP_M3, MPU_CLKCTRL.MODULEMODE needs to be set @@ -165,6 +202,7 @@ wait_emif_disable: mov r2, #AM43XX_CM_CLKSTCTRL_CLKTRCTRL_SW_SLEEP str r2, [r1] +wkup_m3_skip: /* * Execute a barrier instruction to ensure that all cache, * TLB and branch predictor maintenance operations issued @@ -218,6 +256,9 @@ wait_emif_enable: cmp r2, r3 bne wait_emif_enable + tst r4, #WFI_FLAG_FLUSH_CACHE + beq cache_skip_restore + /* * Set SCTLR.C bit to allow data cache allocation */ @@ -226,9 +267,16 @@ wait_emif_enable: mcr p15, 0, r0, c1, c0, 0 isb - ldr r1, [r9, #EMIF_PM_ABORT_SR_OFFSET] - blx r1 +cache_skip_restore: + /* Only necessary if PER is losing context */ + tst r4, #WFI_FLAG_SELF_REFRESH + beq emif_skip_exit_sr_abt + adr r9, am43xx_emif_sram_table + ldr r1, [r9, #EMIF_PM_ABORT_SR_OFFSET] + blx r1 + +emif_skip_exit_sr_abt: /* Let the suspend code know about the abort */ mov r0, #1 ldmfd sp!, {r4 - r11, pc} @ restore regs and return diff --git a/drivers/soc/ti/pm33xx.c b/drivers/soc/ti/pm33xx.c index 652739c7f718..0011c8f5ecd7 100644 --- a/drivers/soc/ti/pm33xx.c +++ b/drivers/soc/ti/pm33xx.c @@ -41,6 +41,8 @@ static struct am33xx_pm_sram_addr *pm_sram; static struct device *pm33xx_dev; static struct wkup_m3_ipc *m3_ipc; +static unsigned long suspend_wfi_flags; + static u32 sram_suspend_address(unsigned long addr) { return ((unsigned long)am33xx_do_wfi_sram + @@ -53,7 +55,7 @@ static int am33xx_pm_suspend(suspend_state_t suspend_state) int i, ret = 0; ret = pm_ops->soc_suspend((unsigned long)suspend_state, - am33xx_do_wfi_sram); + am33xx_do_wfi_sram, suspend_wfi_flags); if (ret) { dev_err(pm33xx_dev, "PM: Kernel suspend failure\n"); @@ -310,6 +312,17 @@ static int am33xx_pm_probe(struct platform_device *pdev) suspend_set_ops(&am33xx_pm_ops); #endif /* CONFIG_SUSPEND */ + /* + * For a system suspend we must flush the caches, we want + * the DDR in self-refresh, we want to save the context + * of the EMIF, and we want the wkup_m3 to handle low-power + * transition. + */ + suspend_wfi_flags |= WFI_FLAG_FLUSH_CACHE; + suspend_wfi_flags |= WFI_FLAG_SELF_REFRESH; + suspend_wfi_flags |= WFI_FLAG_SAVE_EMIF; + suspend_wfi_flags |= WFI_FLAG_WAKE_M3; + ret = pm_ops->init(); if (ret) { dev_err(dev, "Unable to call core pm init!\n"); diff --git a/include/linux/platform_data/pm33xx.h b/include/linux/platform_data/pm33xx.h index f9bed2a0af9d..d231265c135c 100644 --- a/include/linux/platform_data/pm33xx.h +++ b/include/linux/platform_data/pm33xx.h @@ -12,6 +12,29 @@ #include #include +/* + * WFI Flags for sleep code control + * + * These flags allow PM code to exclude certain operations from happening + * in the low level ASM code found in sleep33xx.S and sleep43xx.S + * + * WFI_FLAG_FLUSH_CACHE: Flush the ARM caches and disable caching. Only + * needed when MPU will lose context. + * WFI_FLAG_SELF_REFRESH: Let EMIF place DDR memory into self-refresh and + * disable EMIF. + * WFI_FLAG_SAVE_EMIF: Save context of all EMIF registers and restore in + * resume path. Only needed if PER domain loses context + * and must also have WFI_FLAG_SELF_REFRESH set. + * WFI_FLAG_WAKE_M3: Disable MPU clock or clockdomain to cause wkup_m3 to + * execute when WFI instruction executes. + * WFI_FLAG_RTC_ONLY: Configure the RTC to enter RTC+DDR mode. + */ +#define WFI_FLAG_FLUSH_CACHE BIT(0) +#define WFI_FLAG_SELF_REFRESH BIT(1) +#define WFI_FLAG_SAVE_EMIF BIT(2) +#define WFI_FLAG_WAKE_M3 BIT(3) +#define WFI_FLAG_RTC_ONLY BIT(4) + #ifndef __ASSEMBLER__ struct am33xx_pm_sram_addr { void (*do_wfi)(void); @@ -23,7 +46,8 @@ struct am33xx_pm_sram_addr { struct am33xx_pm_platform_data { int (*init)(void); - int (*soc_suspend)(unsigned int state, int (*fn)(unsigned long)); + int (*soc_suspend)(unsigned int state, int (*fn)(unsigned long), + unsigned long args); struct am33xx_pm_sram_addr *(*get_sram_addrs)(void); }; From 8c5a916f4c8815196cc8a86b9582ca89422aac25 Mon Sep 17 00:00:00 2001 From: Keerthy Date: Mon, 9 Jul 2018 13:03:17 +0530 Subject: [PATCH 080/112] ARM: OMAP2+: sleep33/43xx: Add RTC-Mode support Add support for RTC mode to low level suspend code. This includes providing the rtc base address for the assembly code to configuring the PMIC_PWR_EN line late in suspend to enter RTC+DDR mode. Note: This patch also fold in left out space parameter for am33xx_emif_sram_table and am43xx_emif_sram_table Signed-off-by: Dave Gerlach Signed-off-by: Keerthy Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/pm-asm-offsets.c | 2 ++ arch/arm/mach-omap2/pm33xx-core.c | 10 ++++++ arch/arm/mach-omap2/sleep33xx.S | 5 +-- arch/arm/mach-omap2/sleep43xx.S | 54 ++++++++++++++++++++++++++-- drivers/soc/ti/pm33xx.c | 1 + include/linux/platform_data/pm33xx.h | 3 ++ 6 files changed, 71 insertions(+), 4 deletions(-) diff --git a/arch/arm/mach-omap2/pm-asm-offsets.c b/arch/arm/mach-omap2/pm-asm-offsets.c index b9846b19e5e2..d8ae8a85b14b 100644 --- a/arch/arm/mach-omap2/pm-asm-offsets.c +++ b/arch/arm/mach-omap2/pm-asm-offsets.c @@ -27,6 +27,8 @@ int main(void) offsetof(struct am33xx_pm_ro_sram_data, amx3_pm_sram_data_virt)); DEFINE(AMX3_PM_RO_SRAM_DATA_PHYS_OFFSET, offsetof(struct am33xx_pm_ro_sram_data, amx3_pm_sram_data_phys)); + DEFINE(AMX3_PM_RTC_BASE_VIRT_OFFSET, + offsetof(struct am33xx_pm_ro_sram_data, rtc_base_virt)); DEFINE(AMX3_PM_RO_SRAM_DATA_SIZE, sizeof(struct am33xx_pm_ro_sram_data)); diff --git a/arch/arm/mach-omap2/pm33xx-core.c b/arch/arm/mach-omap2/pm33xx-core.c index e363b9717fa5..f4971e4a86b2 100644 --- a/arch/arm/mach-omap2/pm33xx-core.c +++ b/arch/arm/mach-omap2/pm33xx-core.c @@ -26,6 +26,7 @@ static struct powerdomain *cefuse_pwrdm, *gfx_pwrdm, *per_pwrdm, *mpu_pwrdm; static struct clockdomain *gfx_l4ls_clkdm; static void __iomem *scu_base; +static struct omap_hwmod *rtc_oh; static int __init am43xx_map_scu(void) { @@ -153,16 +154,25 @@ static struct am33xx_pm_sram_addr *amx3_get_sram_addrs(void) return NULL; } +void __iomem *am43xx_get_rtc_base_addr(void) +{ + rtc_oh = omap_hwmod_lookup("rtc"); + + return omap_hwmod_get_mpu_rt_va(rtc_oh); +} + static struct am33xx_pm_platform_data am33xx_ops = { .init = am33xx_suspend_init, .soc_suspend = am33xx_suspend, .get_sram_addrs = amx3_get_sram_addrs, + .get_rtc_base_addr = am43xx_get_rtc_base_addr, }; static struct am33xx_pm_platform_data am43xx_ops = { .init = am43xx_suspend_init, .soc_suspend = am43xx_suspend, .get_sram_addrs = amx3_get_sram_addrs, + .get_rtc_base_addr = am43xx_get_rtc_base_addr, }; static struct am33xx_pm_platform_data *am33xx_pm_get_pdata(void) diff --git a/arch/arm/mach-omap2/sleep33xx.S b/arch/arm/mach-omap2/sleep33xx.S index 8d0d53b671f9..47a816468cdb 100644 --- a/arch/arm/mach-omap2/sleep33xx.S +++ b/arch/arm/mach-omap2/sleep33xx.S @@ -228,8 +228,6 @@ ENDPROC(am33xx_resume_from_deep_sleep) * Local variables */ .align -resume_addr: - .word cpu_resume - PAGE_OFFSET + 0x80000000 kernel_flush: .word v7_flush_dcache_all virt_mpu_clkctrl: @@ -252,6 +250,9 @@ ENTRY(am33xx_pm_sram) .word am33xx_emif_sram_table .word am33xx_pm_ro_sram_data +resume_addr: +.word cpu_resume - PAGE_OFFSET + 0x80000000 + .align 3 ENTRY(am33xx_pm_ro_sram_data) .space AMX3_PM_RO_SRAM_DATA_SIZE diff --git a/arch/arm/mach-omap2/sleep43xx.S b/arch/arm/mach-omap2/sleep43xx.S index cd7e95f48a73..5b9343b58fc7 100644 --- a/arch/arm/mach-omap2/sleep43xx.S +++ b/arch/arm/mach-omap2/sleep43xx.S @@ -48,6 +48,13 @@ AM43XX_CM_PER_EMIF_CLKCTRL_OFFSET) #define AM43XX_PRM_EMIF_CTRL_OFFSET 0x0030 +#define RTC_SECONDS_REG 0x0 +#define RTC_PMIC_REG 0x98 +#define RTC_PMIC_POWER_EN BIT(16) +#define RTC_PMIC_EXT_WAKEUP_STS BIT(12) +#define RTC_PMIC_EXT_WAKEUP_POL BIT(4) +#define RTC_PMIC_EXT_WAKEUP_EN BIT(0) + .arm .align 3 @@ -147,6 +154,20 @@ sync: ldr r4, [r2, #AMX3_PM_WFI_FLAGS_OFFSET] cache_skip_flush: + /* + * If we are trying to enter RTC+DDR mode we must perform + * a read from the rtc address space to ensure translation + * presence in the TLB to avoid page table walk after DDR + * is unavailable. + */ + tst r4, #WFI_FLAG_RTC_ONLY + beq skip_rtc_va_refresh + + adr r3, am43xx_pm_ro_sram_data + ldr r1, [r3, #AMX3_PM_RTC_BASE_VIRT_OFFSET] + ldr r0, [r1] + +skip_rtc_va_refresh: /* Check if we want self refresh */ tst r4, #WFI_FLAG_SELF_REFRESH beq emif_skip_enter_sr @@ -182,6 +203,34 @@ wait_emif_disable: bne wait_emif_disable emif_skip_disable: + tst r4, #WFI_FLAG_RTC_ONLY + beq skip_rtc_only + + adr r3, am43xx_pm_ro_sram_data + ldr r1, [r3, #AMX3_PM_RTC_BASE_VIRT_OFFSET] + + ldr r0, [r1, #RTC_PMIC_REG] + orr r0, r0, #RTC_PMIC_POWER_EN + orr r0, r0, #RTC_PMIC_EXT_WAKEUP_STS + orr r0, r0, #RTC_PMIC_EXT_WAKEUP_EN + orr r0, r0, #RTC_PMIC_EXT_WAKEUP_POL + str r0, [r1, #RTC_PMIC_REG] + ldr r0, [r1, #RTC_PMIC_REG] + /* Wait for 2 seconds to lose power */ + mov r3, #2 + ldr r2, [r1, #RTC_SECONDS_REG] +rtc_loop: + ldr r0, [r1, #RTC_SECONDS_REG] + cmp r0, r2 + beq rtc_loop + mov r2, r0 + subs r3, r3, #1 + bne rtc_loop + + b re_enable_emif + +skip_rtc_only: + tst r4, #WFI_FLAG_WAKE_M3 beq wkup_m3_skip @@ -247,6 +296,7 @@ wkup_m3_skip: mov r2, #AM33XX_CM_CLKCTRL_MODULEMODE_ENABLE str r2, [r1] +re_enable_emif: /* Re-enable EMIF */ ldr r1, am43xx_virt_emif_clkctrl mov r2, #AM33XX_CM_CLKCTRL_MODULEMODE_ENABLE @@ -381,8 +431,6 @@ ENDPROC(am43xx_resume_from_deep_sleep) * Local variables */ .align -resume_addr: - .word cpu_resume - PAGE_OFFSET + 0x80000000 kernel_flush: .word v7_flush_dcache_all ddr_start: @@ -429,6 +477,8 @@ ENTRY(am43xx_pm_sram) .word am43xx_emif_sram_table .word am43xx_pm_ro_sram_data +resume_addr: + .word cpu_resume - PAGE_OFFSET + 0x80000000 .align 3 ENTRY(am43xx_pm_ro_sram_data) diff --git a/drivers/soc/ti/pm33xx.c b/drivers/soc/ti/pm33xx.c index 0011c8f5ecd7..d0dab323651f 100644 --- a/drivers/soc/ti/pm33xx.c +++ b/drivers/soc/ti/pm33xx.c @@ -229,6 +229,7 @@ static int am33xx_push_sram_idle(void) ro_sram_data.amx3_pm_sram_data_virt = ocmcram_location_data; ro_sram_data.amx3_pm_sram_data_phys = gen_pool_virt_to_phys(sram_pool_data, ocmcram_location_data); + ro_sram_data.rtc_base_virt = pm_ops->get_rtc_base_addr(); /* Save physical address to calculate resume offset during pm init */ am33xx_do_wfi_sram_phys = gen_pool_virt_to_phys(sram_pool, diff --git a/include/linux/platform_data/pm33xx.h b/include/linux/platform_data/pm33xx.h index d231265c135c..fbf5ed73c7cc 100644 --- a/include/linux/platform_data/pm33xx.h +++ b/include/linux/platform_data/pm33xx.h @@ -42,6 +42,7 @@ struct am33xx_pm_sram_addr { unsigned long *resume_offset; unsigned long *emif_sram_table; unsigned long *ro_sram_data; + unsigned long resume_address; }; struct am33xx_pm_platform_data { @@ -49,6 +50,7 @@ struct am33xx_pm_platform_data { int (*soc_suspend)(unsigned int state, int (*fn)(unsigned long), unsigned long args); struct am33xx_pm_sram_addr *(*get_sram_addrs)(void); + void __iomem *(*get_rtc_base_addr)(void); }; struct am33xx_pm_sram_data { @@ -60,6 +62,7 @@ struct am33xx_pm_sram_data { struct am33xx_pm_ro_sram_data { u32 amx3_pm_sram_data_virt; u32 amx3_pm_sram_data_phys; + void __iomem *rtc_base_virt; } __packed __aligned(8); #endif /* __ASSEMBLER__ */ From 92eb49089c00487c87cf5cf177f19a18f1b78b59 Mon Sep 17 00:00:00 2001 From: Bartosz Golaszewski Date: Thu, 28 Jun 2018 11:57:41 +0200 Subject: [PATCH 081/112] ARM: davinci: omapl138-hawk: add aemif & nand support We now have support for aemif & nand from board files. As an example add support for nand to da850-hawk. Signed-off-by: Bartosz Golaszewski Signed-off-by: Sekhar Nori --- arch/arm/mach-davinci/board-omapl138-hawk.c | 132 ++++++++++++++++++++ 1 file changed, 132 insertions(+) diff --git a/arch/arm/mach-davinci/board-omapl138-hawk.c b/arch/arm/mach-davinci/board-omapl138-hawk.c index 466e87b24e9a..8e8d51f4a276 100644 --- a/arch/arm/mach-davinci/board-omapl138-hawk.c +++ b/arch/arm/mach-davinci/board-omapl138-hawk.c @@ -15,7 +15,12 @@ #include #include #include +#include +#include #include +#include +#include +#include #include #include @@ -166,6 +171,129 @@ mmc_setup_mmcsd_fail: gpiod_remove_lookup_table(&mmc_gpios_table); } +static struct mtd_partition omapl138_hawk_nandflash_partition[] = { + { + .name = "u-boot env", + .offset = 0, + .size = SZ_128K, + .mask_flags = MTD_WRITEABLE, + }, + { + .name = "u-boot", + .offset = MTDPART_OFS_APPEND, + .size = SZ_512K, + .mask_flags = MTD_WRITEABLE, + }, + { + .name = "free space", + .offset = MTDPART_OFS_APPEND, + .size = MTDPART_SIZ_FULL, + .mask_flags = 0, + }, +}; + +static struct davinci_aemif_timing omapl138_hawk_nandflash_timing = { + .wsetup = 24, + .wstrobe = 21, + .whold = 14, + .rsetup = 19, + .rstrobe = 50, + .rhold = 0, + .ta = 20, +}; + +static struct davinci_nand_pdata omapl138_hawk_nandflash_data = { + .core_chipsel = 1, + .parts = omapl138_hawk_nandflash_partition, + .nr_parts = ARRAY_SIZE(omapl138_hawk_nandflash_partition), + .ecc_mode = NAND_ECC_HW, + .ecc_bits = 4, + .bbt_options = NAND_BBT_USE_FLASH, + .options = NAND_BUSWIDTH_16, + .timing = &omapl138_hawk_nandflash_timing, + .mask_chipsel = 0, + .mask_ale = 0, + .mask_cle = 0, +}; + +static struct resource omapl138_hawk_nandflash_resource[] = { + { + .start = DA8XX_AEMIF_CS3_BASE, + .end = DA8XX_AEMIF_CS3_BASE + SZ_32M, + .flags = IORESOURCE_MEM, + }, + { + .start = DA8XX_AEMIF_CTL_BASE, + .end = DA8XX_AEMIF_CTL_BASE + SZ_32K, + .flags = IORESOURCE_MEM, + }, +}; + +static struct resource omapl138_hawk_aemif_resource[] = { + { + .start = DA8XX_AEMIF_CTL_BASE, + .end = DA8XX_AEMIF_CTL_BASE + SZ_32K, + .flags = IORESOURCE_MEM, + } +}; + +static struct aemif_abus_data omapl138_hawk_aemif_abus_data[] = { + { + .cs = 3, + } +}; + +static struct platform_device omapl138_hawk_aemif_devices[] = { + { + .name = "davinci_nand", + .id = -1, + .dev = { + .platform_data = &omapl138_hawk_nandflash_data, + }, + .resource = omapl138_hawk_nandflash_resource, + .num_resources = ARRAY_SIZE(omapl138_hawk_nandflash_resource), + } +}; + +static struct aemif_platform_data omapl138_hawk_aemif_pdata = { + .cs_offset = 2, + .abus_data = omapl138_hawk_aemif_abus_data, + .num_abus_data = ARRAY_SIZE(omapl138_hawk_aemif_abus_data), + .sub_devices = omapl138_hawk_aemif_devices, + .num_sub_devices = ARRAY_SIZE(omapl138_hawk_aemif_devices), +}; + +static struct platform_device omapl138_hawk_aemif_device = { + .name = "ti-aemif", + .id = -1, + .dev = { + .platform_data = &omapl138_hawk_aemif_pdata, + }, + .resource = omapl138_hawk_aemif_resource, + .num_resources = ARRAY_SIZE(omapl138_hawk_aemif_resource), +}; + +static const short omapl138_hawk_nand_pins[] = { + DA850_EMA_WAIT_1, DA850_NEMA_OE, DA850_NEMA_WE, DA850_NEMA_CS_3, + DA850_EMA_D_0, DA850_EMA_D_1, DA850_EMA_D_2, DA850_EMA_D_3, + DA850_EMA_D_4, DA850_EMA_D_5, DA850_EMA_D_6, DA850_EMA_D_7, + DA850_EMA_D_8, DA850_EMA_D_9, DA850_EMA_D_10, DA850_EMA_D_11, + DA850_EMA_D_12, DA850_EMA_D_13, DA850_EMA_D_14, DA850_EMA_D_15, + DA850_EMA_A_1, DA850_EMA_A_2, + -1 +}; + +static int omapl138_hawk_register_aemif(void) +{ + int ret; + + ret = davinci_cfg_reg_list(omapl138_hawk_nand_pins); + if (ret) + pr_warn("%s: NAND mux setup failed: %d\n", __func__, ret); + + return platform_device_register(&omapl138_hawk_aemif_device); +} + static irqreturn_t omapl138_hawk_usb_ocic_irq(int irq, void *dev_id); static da8xx_ocic_handler_t hawk_usb_ocic_handler; @@ -298,6 +426,10 @@ static __init void omapl138_hawk_init(void) omapl138_hawk_usb_init(); + ret = omapl138_hawk_register_aemif(); + if (ret) + pr_warn("%s: aemif registration failed: %d\n", __func__, ret); + ret = da8xx_register_watchdog(); if (ret) pr_warn("%s: watchdog registration failed: %d\n", From d51626ce5fe4c70ed013a1e9ba0f2db6f48e8b89 Mon Sep 17 00:00:00 2001 From: Bartosz Golaszewski Date: Thu, 28 Jun 2018 11:57:42 +0200 Subject: [PATCH 082/112] ARM: davinci: da850-evm: use aemif platform driver in legacy mode We now support board files in the aemif driver. Register a platform device instead of using the handcrafted API in da850-evm. Signed-off-by: Bartosz Golaszewski Signed-off-by: Sekhar Nori --- arch/arm/mach-davinci/board-da850-evm.c | 95 ++++++++++++++----------- 1 file changed, 52 insertions(+), 43 deletions(-) diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c index 442c16773f09..ace66f368f8d 100644 --- a/arch/arm/mach-davinci/board-da850-evm.c +++ b/arch/arm/mach-davinci/board-da850-evm.c @@ -33,6 +33,7 @@ #include #include #include +#include #include #include #include @@ -185,16 +186,6 @@ static struct resource da850_evm_norflash_resource[] = { }, }; -static struct platform_device da850_evm_norflash_device = { - .name = "physmap-flash", - .id = 0, - .dev = { - .platform_data = &da850_evm_norflash_data, - }, - .num_resources = 1, - .resource = da850_evm_norflash_resource, -}; - /* DA850/OMAP-L138 EVM includes a 512 MByte large-page NAND flash * (128K blocks). It may be used instead of the (default) SPI flash * to boot, using TI's tools to install the secondary boot loader @@ -266,37 +257,58 @@ static struct resource da850_evm_nandflash_resource[] = { }, }; -static struct platform_device da850_evm_nandflash_device = { - .name = "davinci_nand", - .id = 1, - .dev = { - .platform_data = &da850_evm_nandflash_data, +static struct resource da850_evm_aemif_resource[] = { + { + .start = DA8XX_AEMIF_CTL_BASE, + .end = DA8XX_AEMIF_CTL_BASE + SZ_32K, + .flags = IORESOURCE_MEM, + } +}; + +static struct aemif_abus_data da850_evm_aemif_abus_data[] = { + { + .cs = 3, + } +}; + +static struct platform_device da850_evm_aemif_devices[] = { + { + .name = "davinci_nand", + .id = 1, + .dev = { + .platform_data = &da850_evm_nandflash_data, + }, + .num_resources = ARRAY_SIZE(da850_evm_nandflash_resource), + .resource = da850_evm_nandflash_resource, }, - .num_resources = ARRAY_SIZE(da850_evm_nandflash_resource), - .resource = da850_evm_nandflash_resource, + { + .name = "physmap-flash", + .id = 0, + .dev = { + .platform_data = &da850_evm_norflash_data, + }, + .num_resources = 1, + .resource = da850_evm_norflash_resource, + } }; -static struct platform_device *da850_evm_devices[] = { - &da850_evm_nandflash_device, - &da850_evm_norflash_device, +static struct aemif_platform_data da850_evm_aemif_pdata = { + .cs_offset = 2, + .abus_data = da850_evm_aemif_abus_data, + .num_abus_data = ARRAY_SIZE(da850_evm_aemif_abus_data), + .sub_devices = da850_evm_aemif_devices, + .num_sub_devices = ARRAY_SIZE(da850_evm_aemif_devices), }; -#define DA8XX_AEMIF_CE2CFG_OFFSET 0x10 -#define DA8XX_AEMIF_ASIZE_16BIT 0x1 - -static void __init da850_evm_init_nor(void) -{ - void __iomem *aemif_addr; - - aemif_addr = ioremap(DA8XX_AEMIF_CTL_BASE, SZ_32K); - - /* Configure data bus width of CS2 to 16 bit */ - writel(readl(aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET) | - DA8XX_AEMIF_ASIZE_16BIT, - aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET); - - iounmap(aemif_addr); -} +static struct platform_device da850_evm_aemif_device = { + .name = "ti-aemif", + .id = -1, + .dev = { + .platform_data = &da850_evm_aemif_pdata, + }, + .resource = da850_evm_aemif_resource, + .num_resources = ARRAY_SIZE(da850_evm_aemif_resource), +}; static const short da850_evm_nand_pins[] = { DA850_EMA_D_0, DA850_EMA_D_1, DA850_EMA_D_2, DA850_EMA_D_3, @@ -339,13 +351,10 @@ static inline void da850_evm_setup_nor_nand(void) pr_warn("%s: NOR mux setup failed: %d\n", __func__, ret); - da850_evm_init_nor(); - - platform_add_devices(da850_evm_devices, - ARRAY_SIZE(da850_evm_devices)); - - if (davinci_aemif_setup(&da850_evm_nandflash_device)) - pr_warn("%s: Cannot configure AEMIF.\n", __func__); + ret = platform_device_register(&da850_evm_aemif_device); + if (ret) + pr_warn("%s: registering aemif failed: %d\n", + __func__, ret); } } From 8c03a8889b1a0af293237879ff31b8c69f958805 Mon Sep 17 00:00:00 2001 From: Bartosz Golaszewski Date: Thu, 28 Jun 2018 11:57:43 +0200 Subject: [PATCH 083/112] ARM: davinci: dm365-evm: use the ti-aemif soc driver We now support board files in the aemif driver. Register a platform device instead of using the handcrafted API in dm365-evm. Signed-off-by: Bartosz Golaszewski Signed-off-by: Sekhar Nori --- arch/arm/mach-davinci/board-dm365-evm.c | 59 +++++++++++++++++++------ 1 file changed, 46 insertions(+), 13 deletions(-) diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c index 307e88d99dd3..8143756ff38b 100644 --- a/arch/arm/mach-davinci/board-dm365-evm.c +++ b/arch/arm/mach-davinci/board-dm365-evm.c @@ -28,6 +28,7 @@ #include #include #include +#include #include #include @@ -159,16 +160,49 @@ static struct resource davinci_nand_resources[] = { }, }; -static struct platform_device davinci_nand_device = { - .name = "davinci_nand", - .id = 0, - .num_resources = ARRAY_SIZE(davinci_nand_resources), - .resource = davinci_nand_resources, - .dev = { - .platform_data = &davinci_nand_data, +static struct platform_device davinci_aemif_devices[] = { + { + .name = "davinci_nand", + .id = 0, + .num_resources = ARRAY_SIZE(davinci_nand_resources), + .resource = davinci_nand_resources, + .dev = { + .platform_data = &davinci_nand_data, + }, + } +}; + +static struct resource davinci_aemif_resources[] = { + { + .start = DM365_ASYNC_EMIF_CONTROL_BASE, + .end = DM365_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, }, }; +static struct aemif_abus_data da850_evm_aemif_abus_data[] = { + { + .cs = 1, + }, +}; + +static struct aemif_platform_data davinci_aemif_pdata = { + .abus_data = da850_evm_aemif_abus_data, + .num_abus_data = ARRAY_SIZE(da850_evm_aemif_abus_data), + .sub_devices = davinci_aemif_devices, + .num_sub_devices = ARRAY_SIZE(davinci_aemif_devices), +}; + +static struct platform_device davinci_aemif_device = { + .name = "ti-aemif", + .id = -1, + .dev = { + .platform_data = &davinci_aemif_pdata, + }, + .resource = davinci_aemif_resources, + .num_resources = ARRAY_SIZE(davinci_aemif_resources), +}; + static struct at24_platform_data eeprom_info = { .byte_len = (256*1024) / 8, .page_size = 64, @@ -537,10 +571,6 @@ static void __init evm_init_i2c(void) i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info)); } -static struct platform_device *dm365_evm_nand_devices[] __initdata = { - &davinci_nand_device, -}; - static inline int have_leds(void) { #ifdef CONFIG_LEDS_CLASS @@ -628,6 +658,7 @@ static void __init evm_init_cpld(void) u8 mux, resets; const char *label; struct clk *aemif_clk; + int rc; /* Make sure we can configure the CPLD through CS1. Then * leave it on for later access to MMC and LED registers. @@ -660,8 +691,10 @@ fail: /* external keypad mux */ mux |= BIT(7); - platform_add_devices(dm365_evm_nand_devices, - ARRAY_SIZE(dm365_evm_nand_devices)); + rc = platform_device_register(&davinci_aemif_device); + if (rc) + pr_warn("%s(): error registering the aemif device: %d\n", + __func__, rc); } else { /* no OneNAND support yet */ } From 2ee2948e874f61defb081acf6c4d850b7f889695 Mon Sep 17 00:00:00 2001 From: Bartosz Golaszewski Date: Thu, 28 Jun 2018 11:57:44 +0200 Subject: [PATCH 084/112] ARM: davinci: dm644x-evm: use aemif platform driver We now support board files in the aemif driver. Register a platform device instead of using the handcrafted API in dm644x-evm. Signed-off-by: Bartosz Golaszewski Signed-off-by: Sekhar Nori --- arch/arm/mach-davinci/board-dm644x-evm.c | 55 ++++++++++++++++++------ 1 file changed, 42 insertions(+), 13 deletions(-) diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c index 738e443ab15f..e4a8f9225d16 100644 --- a/arch/arm/mach-davinci/board-dm644x-evm.c +++ b/arch/arm/mach-davinci/board-dm644x-evm.c @@ -42,6 +42,7 @@ #include #include #include +#include #include "davinci.h" @@ -174,14 +175,47 @@ static struct resource davinci_evm_nandflash_resource[] = { }, }; -static struct platform_device davinci_evm_nandflash_device = { - .name = "davinci_nand", - .id = 0, - .dev = { - .platform_data = &davinci_evm_nandflash_data, +static struct resource davinci_evm_aemif_resource[] = { + { + .start = DM644X_ASYNC_EMIF_CONTROL_BASE, + .end = DM644X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, }, - .num_resources = ARRAY_SIZE(davinci_evm_nandflash_resource), - .resource = davinci_evm_nandflash_resource, +}; + +static struct aemif_abus_data davinci_evm_aemif_abus_data[] = { + { + .cs = 1, + }, +}; + +static struct platform_device davinci_evm_nandflash_devices[] = { + { + .name = "davinci_nand", + .id = 0, + .dev = { + .platform_data = &davinci_evm_nandflash_data, + }, + .num_resources = ARRAY_SIZE(davinci_evm_nandflash_resource), + .resource = davinci_evm_nandflash_resource, + }, +}; + +static struct aemif_platform_data davinci_evm_aemif_pdata = { + .abus_data = davinci_evm_aemif_abus_data, + .num_abus_data = ARRAY_SIZE(davinci_evm_aemif_abus_data), + .sub_devices = davinci_evm_nandflash_devices, + .num_sub_devices = ARRAY_SIZE(davinci_evm_nandflash_devices), +}; + +static struct platform_device davinci_evm_aemif_device = { + .name = "ti-aemif", + .id = -1, + .dev = { + .platform_data = &davinci_evm_aemif_pdata, + }, + .resource = davinci_evm_aemif_resource, + .num_resources = ARRAY_SIZE(davinci_evm_aemif_resource), }; static u64 davinci_fb_dma_mask = DMA_BIT_MASK(32); @@ -795,12 +829,7 @@ static __init void davinci_evm_init(void) /* only one device will be jumpered and detected */ if (HAS_NAND) { - platform_device_register(&davinci_evm_nandflash_device); - - if (davinci_aemif_setup(&davinci_evm_nandflash_device)) - pr_warn("%s: Cannot configure AEMIF\n", - __func__); - + platform_device_register(&davinci_evm_aemif_device); #ifdef CONFIG_I2C evm_leds[7].default_trigger = "nand-disk"; #endif From aa88d25d5296b013f2b8fec9277db1d9539b5579 Mon Sep 17 00:00:00 2001 From: Bartosz Golaszewski Date: Thu, 28 Jun 2018 11:57:45 +0200 Subject: [PATCH 085/112] ARM: davinci: da830-evm: use aemif platform driver We now support board files in the aemif driver. Register a platform device instead of using the handcrafted API in da830-evm. Signed-off-by: Bartosz Golaszewski Signed-off-by: Sekhar Nori --- arch/arm/mach-davinci/board-da830-evm.c | 56 +++++++++++++++++++------ 1 file changed, 44 insertions(+), 12 deletions(-) diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c index b2470141dba3..7d8ab36ff83d 100644 --- a/arch/arm/mach-davinci/board-da830-evm.c +++ b/arch/arm/mach-davinci/board-da830-evm.c @@ -28,6 +28,7 @@ #include #include #include +#include #include #include @@ -333,14 +334,48 @@ static struct resource da830_evm_nand_resources[] = { }, }; -static struct platform_device da830_evm_nand_device = { - .name = "davinci_nand", - .id = 1, - .dev = { - .platform_data = &da830_evm_nand_pdata, +static struct platform_device da830_evm_aemif_devices[] = { + { + .name = "davinci_nand", + .id = 1, + .dev = { + .platform_data = &da830_evm_nand_pdata, + }, + .num_resources = ARRAY_SIZE(da830_evm_nand_resources), + .resource = da830_evm_nand_resources, }, - .num_resources = ARRAY_SIZE(da830_evm_nand_resources), - .resource = da830_evm_nand_resources, +}; + +static struct resource da830_evm_aemif_resource[] = { + { + .start = DA8XX_AEMIF_CTL_BASE, + .end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1, + .flags = IORESOURCE_MEM, + }, +}; + +static struct aemif_abus_data da830_evm_aemif_abus_data[] = { + { + .cs = 3, + }, +}; + +static struct aemif_platform_data da830_evm_aemif_pdata = { + .abus_data = da830_evm_aemif_abus_data, + .num_abus_data = ARRAY_SIZE(da830_evm_aemif_abus_data), + .sub_devices = da830_evm_aemif_devices, + .num_sub_devices = ARRAY_SIZE(da830_evm_aemif_devices), + .cs_offset = 2, +}; + +static struct platform_device da830_evm_aemif_device = { + .name = "ti-aemif", + .id = -1, + .dev = { + .platform_data = &da830_evm_aemif_pdata, + }, + .resource = da830_evm_aemif_resource, + .num_resources = ARRAY_SIZE(da830_evm_aemif_resource), }; /* @@ -371,12 +406,9 @@ static inline void da830_evm_init_nand(int mux_mode) if (ret) pr_warn("%s: emif25 mux setup failed: %d\n", __func__, ret); - ret = platform_device_register(&da830_evm_nand_device); + ret = platform_device_register(&da830_evm_aemif_device); if (ret) - pr_warn("%s: NAND device not registered\n", __func__); - - if (davinci_aemif_setup(&da830_evm_nand_device)) - pr_warn("%s: Cannot configure AEMIF\n", __func__); + pr_warn("%s: AEMIF device not registered\n", __func__); gpio_direction_output(mux_mode, 1); } From 59a2180298d9ccc7218f701061739cece7ddb49b Mon Sep 17 00:00:00 2001 From: Bartosz Golaszewski Date: Thu, 28 Jun 2018 11:57:46 +0200 Subject: [PATCH 086/112] ARM: davinci: dm646x-evm: use aemif platform driver We now support board files in the aemif driver. Register a platform device instead of using the handcrafted API in dm646x-evm. Signed-off-by: Bartosz Golaszewski Signed-off-by: Sekhar Nori --- arch/arm/mach-davinci/board-dm646x-evm.c | 56 ++++++++++++++++++------ 1 file changed, 43 insertions(+), 13 deletions(-) diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c index 867ab2fa6cfd..3e5ee09ee717 100644 --- a/arch/arm/mach-davinci/board-dm646x-evm.c +++ b/arch/arm/mach-davinci/board-dm646x-evm.c @@ -24,6 +24,7 @@ #include #include #include +#include #include #include @@ -106,18 +107,49 @@ static struct resource davinci_nand_resources[] = { }, }; -static struct platform_device davinci_nand_device = { - .name = "davinci_nand", - .id = 0, - - .num_resources = ARRAY_SIZE(davinci_nand_resources), - .resource = davinci_nand_resources, - - .dev = { - .platform_data = &davinci_nand_data, +static struct platform_device davinci_aemif_devices[] = { + { + .name = "davinci_nand", + .id = 0, + .num_resources = ARRAY_SIZE(davinci_nand_resources), + .resource = davinci_nand_resources, + .dev = { + .platform_data = &davinci_nand_data, + }, }, }; +static struct resource davinci_aemif_resources[] = { + { + .start = DM646X_ASYNC_EMIF_CONTROL_BASE, + .end = DM646X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, +}; + +static struct aemif_abus_data davinci_aemif_abus_data[] = { + { + .cs = 1, + }, +}; + +static struct aemif_platform_data davinci_aemif_pdata = { + .abus_data = davinci_aemif_abus_data, + .num_abus_data = ARRAY_SIZE(davinci_aemif_abus_data), + .sub_devices = davinci_aemif_devices, + .num_sub_devices = ARRAY_SIZE(davinci_aemif_devices), +}; + +static struct platform_device davinci_aemif_device = { + .name = "ti-aemif", + .id = -1, + .dev = { + .platform_data = &davinci_aemif_pdata, + }, + .resource = davinci_aemif_resources, + .num_resources = ARRAY_SIZE(davinci_aemif_resources), +}; + #define HAS_ATA (IS_ENABLED(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \ IS_ENABLED(CONFIG_PATA_BK3710)) @@ -793,10 +825,8 @@ static __init void evm_init(void) if (machine_is_davinci_dm6467tevm()) davinci_nand_data.timing = &dm6467tevm_nandflash_timing; - platform_device_register(&davinci_nand_device); - - if (davinci_aemif_setup(&davinci_nand_device)) - pr_warn("%s: Cannot configure AEMIF.\n", __func__); + if (platform_device_register(&davinci_aemif_device)) + pr_warn("%s: Cannot register AEMIF device.\n", __func__); dm646x_init_edma(dm646x_edma_rsv); From acc0fb43c691e8b70bc8ae8c8ce9ed6d5177a60f Mon Sep 17 00:00:00 2001 From: Bartosz Golaszewski Date: Thu, 28 Jun 2018 11:57:47 +0200 Subject: [PATCH 087/112] ARM: davinci: mityomapl138: use aemif platform driver We now support board files in the aemif driver. Register a platform device instead of using the handcrafted API in mityomapl138. Signed-off-by: Bartosz Golaszewski Signed-off-by: Sekhar Nori --- arch/arm/mach-davinci/board-mityomapl138.c | 55 ++++++++++++++++------ 1 file changed, 41 insertions(+), 14 deletions(-) diff --git a/arch/arm/mach-davinci/board-mityomapl138.c b/arch/arm/mach-davinci/board-mityomapl138.c index 2cce0d7d2f2a..2933e0c87cfa 100644 --- a/arch/arm/mach-davinci/board-mityomapl138.c +++ b/arch/arm/mach-davinci/board-mityomapl138.c @@ -30,6 +30,7 @@ #include #include #include +#include #include #include @@ -422,27 +423,53 @@ static struct resource mityomapl138_nandflash_resource[] = { }, }; -static struct platform_device mityomapl138_nandflash_device = { - .name = "davinci_nand", - .id = 1, - .dev = { - .platform_data = &mityomapl138_nandflash_data, +static struct platform_device mityomapl138_aemif_devices[] = { + { + .name = "davinci_nand", + .id = 1, + .dev = { + .platform_data = &mityomapl138_nandflash_data, + }, + .num_resources = ARRAY_SIZE(mityomapl138_nandflash_resource), + .resource = mityomapl138_nandflash_resource, }, - .num_resources = ARRAY_SIZE(mityomapl138_nandflash_resource), - .resource = mityomapl138_nandflash_resource, }; -static struct platform_device *mityomapl138_devices[] __initdata = { - &mityomapl138_nandflash_device, +static struct resource mityomapl138_aemif_resources[] = { + { + .start = DA8XX_AEMIF_CTL_BASE, + .end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1, + .flags = IORESOURCE_MEM, + }, +}; + +static struct aemif_abus_data mityomapl138_aemif_abus_data[] = { + { + .cs = 1, + }, +}; + +static struct aemif_platform_data mityomapl138_aemif_pdata = { + .abus_data = mityomapl138_aemif_abus_data, + .num_abus_data = ARRAY_SIZE(mityomapl138_aemif_abus_data), + .sub_devices = mityomapl138_aemif_devices, + .num_sub_devices = ARRAY_SIZE(mityomapl138_aemif_devices), +}; + +static struct platform_device mityomapl138_aemif_device = { + .name = "ti-aemif", + .id = -1, + .dev = { + .platform_data = &mityomapl138_aemif_pdata, + }, + .resource = mityomapl138_aemif_resources, + .num_resources = ARRAY_SIZE(mityomapl138_aemif_resources), }; static void __init mityomapl138_setup_nand(void) { - platform_add_devices(mityomapl138_devices, - ARRAY_SIZE(mityomapl138_devices)); - - if (davinci_aemif_setup(&mityomapl138_nandflash_device)) - pr_warn("%s: Cannot configure AEMIF\n", __func__); + if (platform_device_register(&mityomapl138_aemif_device)) + pr_warn("%s: Cannot register AEMIF device\n", __func__); } static const short mityomap_mii_pins[] = { From 7f69ae7fadd9dbebe563bfc28b993a2bc9c8acf9 Mon Sep 17 00:00:00 2001 From: Bartosz Golaszewski Date: Thu, 28 Jun 2018 11:57:48 +0200 Subject: [PATCH 088/112] ARM: davinci: unduplicate aemif support All users now register platform devices using the ti-aemif driver. Remove the handcrafted aemif API. Signed-off-by: Bartosz Golaszewski Signed-off-by: Sekhar Nori --- arch/arm/mach-davinci/Makefile | 2 +- arch/arm/mach-davinci/aemif.c | 218 ------------------ .../linux/platform_data/mtd-davinci-aemif.h | 1 - 3 files changed, 1 insertion(+), 220 deletions(-) delete mode 100644 arch/arm/mach-davinci/aemif.c diff --git a/arch/arm/mach-davinci/Makefile b/arch/arm/mach-davinci/Makefile index 8725d8bea567..93d271b4d84b 100644 --- a/arch/arm/mach-davinci/Makefile +++ b/arch/arm/mach-davinci/Makefile @@ -6,7 +6,7 @@ # Common objects obj-y := time.o serial.o usb.o \ - common.o sram.o aemif.o + common.o sram.o obj-$(CONFIG_DAVINCI_MUX) += mux.o diff --git a/arch/arm/mach-davinci/aemif.c b/arch/arm/mach-davinci/aemif.c deleted file mode 100644 index e4ab3f3a2a1f..000000000000 --- a/arch/arm/mach-davinci/aemif.c +++ /dev/null @@ -1,218 +0,0 @@ -/* - * AEMIF support for DaVinci SoCs - * - * Copyright (C) 2010 Texas Instruments Incorporated. http://www.ti.com/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include -#include -#include -#include -#include -#include - -#include -#include - -/* Timing value configuration */ - -#define TA(x) ((x) << 2) -#define RHOLD(x) ((x) << 4) -#define RSTROBE(x) ((x) << 7) -#define RSETUP(x) ((x) << 13) -#define WHOLD(x) ((x) << 17) -#define WSTROBE(x) ((x) << 20) -#define WSETUP(x) ((x) << 26) - -#define TA_MAX 0x3 -#define RHOLD_MAX 0x7 -#define RSTROBE_MAX 0x3f -#define RSETUP_MAX 0xf -#define WHOLD_MAX 0x7 -#define WSTROBE_MAX 0x3f -#define WSETUP_MAX 0xf - -#define TIMING_MASK (TA(TA_MAX) | \ - RHOLD(RHOLD_MAX) | \ - RSTROBE(RSTROBE_MAX) | \ - RSETUP(RSETUP_MAX) | \ - WHOLD(WHOLD_MAX) | \ - WSTROBE(WSTROBE_MAX) | \ - WSETUP(WSETUP_MAX)) - -static inline unsigned int davinci_aemif_readl(void __iomem *base, int offset) -{ - return readl_relaxed(base + offset); -} - -static inline void davinci_aemif_writel(void __iomem *base, - int offset, unsigned long value) -{ - writel_relaxed(value, base + offset); -} - -/* - * aemif_calc_rate - calculate timing data. - * @wanted: The cycle time needed in nanoseconds. - * @clk: The input clock rate in kHz. - * @max: The maximum divider value that can be programmed. - * - * On success, returns the calculated timing value minus 1 for easy - * programming into AEMIF timing registers, else negative errno. - */ -static int aemif_calc_rate(int wanted, unsigned long clk, int max) -{ - int result; - - result = DIV_ROUND_UP((wanted * clk), NSEC_PER_MSEC) - 1; - - pr_debug("%s: result %d from %ld, %d\n", __func__, result, clk, wanted); - - /* It is generally OK to have a more relaxed timing than requested... */ - if (result < 0) - result = 0; - - /* ... But configuring tighter timings is not an option. */ - else if (result > max) - result = -EINVAL; - - return result; -} - -/** - * davinci_aemif_setup_timing - setup timing values for a given AEMIF interface - * @t: timing values to be progammed - * @base: The virtual base address of the AEMIF interface - * @cs: chip-select to program the timing values for - * @clkrate: the AEMIF clkrate - * - * This function programs the given timing values (in real clock) into the - * AEMIF registers taking the AEMIF clock into account. - * - * This function does not use any locking while programming the AEMIF - * because it is expected that there is only one user of a given - * chip-select. - * - * Returns 0 on success, else negative errno. - */ -static int davinci_aemif_setup_timing(struct davinci_aemif_timing *t, - void __iomem *base, unsigned cs, - unsigned long clkrate) -{ - unsigned set, val; - int ta, rhold, rstrobe, rsetup, whold, wstrobe, wsetup; - unsigned offset = A1CR_OFFSET + cs * 4; - - if (!t) - return 0; /* Nothing to do */ - - clkrate /= 1000; /* turn clock into kHz for ease of use */ - - ta = aemif_calc_rate(t->ta, clkrate, TA_MAX); - rhold = aemif_calc_rate(t->rhold, clkrate, RHOLD_MAX); - rstrobe = aemif_calc_rate(t->rstrobe, clkrate, RSTROBE_MAX); - rsetup = aemif_calc_rate(t->rsetup, clkrate, RSETUP_MAX); - whold = aemif_calc_rate(t->whold, clkrate, WHOLD_MAX); - wstrobe = aemif_calc_rate(t->wstrobe, clkrate, WSTROBE_MAX); - wsetup = aemif_calc_rate(t->wsetup, clkrate, WSETUP_MAX); - - if (ta < 0 || rhold < 0 || rstrobe < 0 || rsetup < 0 || - whold < 0 || wstrobe < 0 || wsetup < 0) { - pr_err("%s: cannot get suitable timings\n", __func__); - return -EINVAL; - } - - set = TA(ta) | RHOLD(rhold) | RSTROBE(rstrobe) | RSETUP(rsetup) | - WHOLD(whold) | WSTROBE(wstrobe) | WSETUP(wsetup); - - val = __raw_readl(base + offset); - val &= ~TIMING_MASK; - val |= set; - __raw_writel(val, base + offset); - - return 0; -} - -/** - * davinci_aemif_setup - setup AEMIF interface by davinci_nand_pdata - * @pdev - link to platform device to setup settings for - * - * This function does not use any locking while programming the AEMIF - * because it is expected that there is only one user of a given - * chip-select. - * - * Returns 0 on success, else negative errno. - */ -int davinci_aemif_setup(struct platform_device *pdev) -{ - struct davinci_nand_pdata *pdata = dev_get_platdata(&pdev->dev); - uint32_t val; - unsigned long clkrate; - struct resource *res; - void __iomem *base; - struct clk *clk; - int ret = 0; - - clk = clk_get(&pdev->dev, "aemif"); - if (IS_ERR(clk)) { - ret = PTR_ERR(clk); - dev_dbg(&pdev->dev, "unable to get AEMIF clock, err %d\n", ret); - return ret; - } - - ret = clk_prepare_enable(clk); - if (ret < 0) { - dev_dbg(&pdev->dev, "unable to enable AEMIF clock, err %d\n", - ret); - goto err_put; - } - - res = platform_get_resource(pdev, IORESOURCE_MEM, 1); - if (!res) { - dev_err(&pdev->dev, "cannot get IORESOURCE_MEM\n"); - ret = -ENOMEM; - goto err; - } - - base = ioremap(res->start, resource_size(res)); - if (!base) { - dev_err(&pdev->dev, "ioremap failed for resource %pR\n", res); - ret = -ENOMEM; - goto err; - } - - /* - * Setup Async configuration register in case we did not boot - * from NAND and so bootloader did not bother to set it up. - */ - val = davinci_aemif_readl(base, A1CR_OFFSET + pdata->core_chipsel * 4); - /* - * Extended Wait is not valid and Select Strobe mode is not - * used - */ - val &= ~(ACR_ASIZE_MASK | ACR_EW_MASK | ACR_SS_MASK); - if (pdata->options & NAND_BUSWIDTH_16) - val |= 0x1; - - davinci_aemif_writel(base, A1CR_OFFSET + pdata->core_chipsel * 4, val); - - clkrate = clk_get_rate(clk); - - if (pdata->timing) - ret = davinci_aemif_setup_timing(pdata->timing, base, - pdata->core_chipsel, clkrate); - - if (ret < 0) - dev_dbg(&pdev->dev, "NAND timing values setup fail\n"); - - iounmap(base); -err: - clk_disable_unprepare(clk); -err_put: - clk_put(clk); - return ret; -} diff --git a/include/linux/platform_data/mtd-davinci-aemif.h b/include/linux/platform_data/mtd-davinci-aemif.h index 97948ac2bb9b..a403dd51dacc 100644 --- a/include/linux/platform_data/mtd-davinci-aemif.h +++ b/include/linux/platform_data/mtd-davinci-aemif.h @@ -33,5 +33,4 @@ struct davinci_aemif_timing { u8 ta; }; -int davinci_aemif_setup(struct platform_device *pdev); #endif From be9d6446c38c8bcd6a0307780f75eed723843907 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Tue, 3 Jul 2018 20:24:49 +0800 Subject: [PATCH 089/112] MAINTAINERS: add Freescale Layerscape ARM architecture entry I have been collecting Freescale Layerscape device tree source files for a while. Add a MAINTAINERS entry for it, so that relevant patches can reach my mail box. Signed-off-by: Shawn Guo Acked-by: Li Yang --- MAINTAINERS | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 9d5eeff51b5f..d72f1162daea 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1442,6 +1442,16 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git F: arch/arm/mach-imx/*vf610* F: arch/arm/boot/dts/vf* +ARM/FREESCALE LAYERSCAPE ARM ARCHITECTURE +M: Shawn Guo +M: Li Yang +L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) +S: Maintained +T: git git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git +F: arch/arm/boot/dts/ls1021a* +F: arch/arm64/boot/dts/freescale/fsl-* +F: arch/arm64/boot/dts/freescale/qoriq-* + ARM/GLOMATION GESBC9312SX MACHINE SUPPORT M: Lennert Buytenhek L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) From 08a213c24f3ec2dbd6e790582a6e7ff303f02fd4 Mon Sep 17 00:00:00 2001 From: Vladimir Zapolskiy Date: Tue, 3 Jul 2018 22:29:32 +0300 Subject: [PATCH 090/112] ARM: i.MX31: remove rnga registration as a platform device On i.MX31 powered boards with OF support Security Random Number Generator Accelerator RNGA controller is initialized from device tree, its registration as a platform device is redundant and actually it is broken due to missing clock information: mxc_rnga mxc_rnga: Could not get rng_clk! mxc_rnga: probe of mxc_rnga failed with error -2 Signed-off-by: Vladimir Zapolskiy Reviewed-by: Fabio Estevam Signed-off-by: Shawn Guo --- arch/arm/mach-imx/imx31-dt.c | 18 ------------------ 1 file changed, 18 deletions(-) diff --git a/arch/arm/mach-imx/imx31-dt.c b/arch/arm/mach-imx/imx31-dt.c index 668d74b72511..9d9640aaf858 100644 --- a/arch/arm/mach-imx/imx31-dt.c +++ b/arch/arm/mach-imx/imx31-dt.c @@ -9,35 +9,17 @@ * http://www.gnu.org/copyleft/gpl.html */ -#include -#include -#include #include -#include - #include "common.h" -#include "mx31.h" static const char * const imx31_dt_board_compat[] __initconst = { "fsl,imx31", NULL }; -/* FIXME: replace with DT binding */ -static const struct resource imx31_rnga_res[] __initconst = { - DEFINE_RES_MEM(MX31_RNGA_BASE_ADDR, SZ_16K), -}; - -static void __init imx31_dt_mach_init(void) -{ - platform_device_register_simple("mxc_rnga", -1, imx31_rnga_res, - ARRAY_SIZE(imx31_rnga_res)); -} - DT_MACHINE_START(IMX31_DT, "Freescale i.MX31 (Device Tree Support)") .map_io = mx31_map_io, .init_early = imx31_init_early, .init_irq = mx31_init_irq, - .init_machine = imx31_dt_mach_init, .dt_compat = imx31_dt_board_compat, MACHINE_END From 4ea7bdc6b5b33427bbd3f41c333e21c1825462a3 Mon Sep 17 00:00:00 2001 From: Stefan Agner Date: Sun, 25 Mar 2018 20:09:56 +0200 Subject: [PATCH 091/112] ARM: trusted_foundations: do not use naked function As documented in GCC naked functions should only use basic ASM syntax. The extended ASM or mixture of basic ASM and "C" code is not guaranteed. Currently this works because it was hard coded to follow and check GCC behavior for arguments and register placement. Furthermore with clang using parameters in Extended asm in a naked function is not supported: arch/arm/firmware/trusted_foundations.c:47:10: error: parameter references not allowed in naked functions : "r" (type), "r" (arg1), "r" (arg2) ^ Use a regular function to be more portable. This aligns also with the other SMC call implementations e.g. in qcom_scm-32.c and bcm_kona_smc.c. Cc: Dmitry Osipenko Cc: Stephen Warren Cc: Thierry Reding Signed-off-by: Stefan Agner Signed-off-by: Thierry Reding --- arch/arm/firmware/trusted_foundations.c | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/arch/arm/firmware/trusted_foundations.c b/arch/arm/firmware/trusted_foundations.c index 3fb1b5a1dce9..689e6565abfc 100644 --- a/arch/arm/firmware/trusted_foundations.c +++ b/arch/arm/firmware/trusted_foundations.c @@ -31,21 +31,25 @@ static unsigned long cpu_boot_addr; -static void __naked tf_generic_smc(u32 type, u32 arg1, u32 arg2) +static void tf_generic_smc(u32 type, u32 arg1, u32 arg2) { + register u32 r0 asm("r0") = type; + register u32 r1 asm("r1") = arg1; + register u32 r2 asm("r2") = arg2; + asm volatile( ".arch_extension sec\n\t" - "stmfd sp!, {r4 - r11, lr}\n\t" + "stmfd sp!, {r4 - r11}\n\t" __asmeq("%0", "r0") __asmeq("%1", "r1") __asmeq("%2", "r2") "mov r3, #0\n\t" "mov r4, #0\n\t" "smc #0\n\t" - "ldmfd sp!, {r4 - r11, pc}" + "ldmfd sp!, {r4 - r11}\n\t" : - : "r" (type), "r" (arg1), "r" (arg2) - : "memory"); + : "r" (r0), "r" (r1), "r" (r2) + : "memory", "r3", "r12", "lr"); } static int tf_set_cpu_boot_addr(int cpu, unsigned long boot_addr) From cff70654d8289311c427625020d9f74348ad856e Mon Sep 17 00:00:00 2001 From: Nicholas Mc Guire Date: Sun, 8 Jul 2018 10:32:54 +0200 Subject: [PATCH 092/112] ARM: imx: flag failure of of_iomap imx_set_aips is assuming that the address returned from of_iomap is valid which it probably is in the normal case - as the call site is void error propagation is not possible but never the less at least a WARN_ON() seems warranted here. Signed-off-by: Nicholas Mc Guire Fixes: commit e57e4ab5fc2e ("ARM: i.MX: allow disabling supervisor protect via DT") Signed-off-by: Shawn Guo --- arch/arm/mach-imx/cpu.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-imx/cpu.c b/arch/arm/mach-imx/cpu.c index 32969f34486a..c6b1bf97a6c1 100644 --- a/arch/arm/mach-imx/cpu.c +++ b/arch/arm/mach-imx/cpu.c @@ -68,6 +68,7 @@ void __init imx_aips_allow_unprivileged_access( for_each_compatible_node(np, NULL, compat) { aips_base_addr = of_iomap(np, 0); + WARN_ON(!aips_base_addr); imx_set_aips(aips_base_addr); } } From 9a189f25ff27f8984bb6c297cbbd557ee983e155 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Fri, 6 Jul 2018 14:54:48 +0200 Subject: [PATCH 093/112] ARM: imx: fix i.MX6SLL build The i.MX6SLL cpuidle support reuses the i.MX6SX implementation, but the Makefile accidentally enables the i.MX6SL one as well, which then fails with a link error unless the kernel also enables the the i.MX6SL clock driver: arch/arm/mach-imx/cpuidle-imx6sl.o: In function `imx6sl_enter_wait': cpuidle-imx6sl.c:(.text+0x24): undefined reference to `imx6sl_set_wait_clk' This changes the two lines that were just modified again, hopefully getting every case right this time. Fixes: e7fa1fb39b11 ("ARM: imx: add cpu idle support for i.MX6SLL") Signed-off-by: Arnd Bergmann Signed-off-by: Shawn Guo --- arch/arm/mach-imx/Makefile | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile index 146ebf97b7eb..bae179af21f6 100644 --- a/arch/arm/mach-imx/Makefile +++ b/arch/arm/mach-imx/Makefile @@ -25,8 +25,8 @@ obj-$(CONFIG_MXC_DEBUG_BOARD) += 3ds_debugboard.o ifeq ($(CONFIG_CPU_IDLE),y) obj-$(CONFIG_SOC_IMX5) += cpuidle-imx5.o obj-$(CONFIG_SOC_IMX6Q) += cpuidle-imx6q.o -obj-$(CONFIG_SOC_IMX6SL) += cpuidle-imx6sl.o cpuidle-imx6sx.o -obj-$(CONFIG_SOC_IMX6SLL) += cpuidle-imx6sl.o cpuidle-imx6sx.o +obj-$(CONFIG_SOC_IMX6SL) += cpuidle-imx6sl.o +obj-$(CONFIG_SOC_IMX6SLL) += cpuidle-imx6sx.o obj-$(CONFIG_SOC_IMX6SX) += cpuidle-imx6sx.o obj-$(CONFIG_SOC_IMX6UL) += cpuidle-imx6sx.o endif From bc0ebbd5b5c14cd8d85ba671d725fb439741afa2 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Mon, 9 Jul 2018 17:51:17 +0200 Subject: [PATCH 094/112] ARM: imx: call imx6sx_cpuidle_init() conditionally for 6sll The imx6sl platform has two different cpuidle implementations, and fails to link if we only want one of the two: arch/arm/mach-imx/mach-imx6sl.o: In function `imx6sl_init_late': mach-imx6sl.c:(.init.text+0x12): undefined reference to `imx6sx_cpuidle_init' This makes the call into reference conditional on the configuration. Fixes: e7fa1fb39b11 ("ARM: imx: add cpu idle support for i.MX6SLL") Signed-off-by: Arnd Bergmann Signed-off-by: Shawn Guo --- arch/arm/mach-imx/mach-imx6sl.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-imx/mach-imx6sl.c b/arch/arm/mach-imx/mach-imx6sl.c index 183540e0838b..99be4225297a 100644 --- a/arch/arm/mach-imx/mach-imx6sl.c +++ b/arch/arm/mach-imx/mach-imx6sl.c @@ -42,9 +42,9 @@ static void __init imx6sl_init_late(void) if (IS_ENABLED(CONFIG_ARM_IMX6Q_CPUFREQ)) platform_device_register_simple("imx6q-cpufreq", -1, NULL, 0); - if (cpu_is_imx6sl()) + if (IS_ENABLED(CONFIG_SOC_IMX6SL) && cpu_is_imx6sl()) imx6sl_cpuidle_init(); - else + else if (IS_ENABLED(CONFIG_SOC_IMX6SLL)) imx6sx_cpuidle_init(); } From 11d973de60e1a69e2b0b240557ad02cf9f884d71 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Mon, 9 Jul 2018 15:19:15 -0300 Subject: [PATCH 095/112] ARM: imx51: Configure M4IF to avoid visual artifacts Configure the M4IF registers as per the vendor bootloader to avoid visual artifacts during video playback. This way we don't need to rely on the bootloader configuration for optimal IPU/VPU bus priorities. Signed-off-by: Fabio Estevam Tested-by: Sergey Lapin Reviewed-by: Lucas Stach Signed-off-by: Shawn Guo --- arch/arm/mach-imx/mach-imx51.c | 29 ++++++++++++++++++++++++++++- 1 file changed, 28 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-imx/mach-imx51.c b/arch/arm/mach-imx/mach-imx51.c index 3835b6a3423c..9d5895ea64f1 100644 --- a/arch/arm/mach-imx/mach-imx51.c +++ b/arch/arm/mach-imx/mach-imx51.c @@ -12,6 +12,7 @@ #include #include +#include #include #include #include @@ -48,11 +49,37 @@ static void __init imx51_ipu_mipi_setup(void) iounmap(hsc_addr); } +static void __init imx51_m4if_setup(void) +{ + void __iomem *m4if_base; + struct device_node *np; + + np = of_find_compatible_node(NULL, NULL, "fsl,imx51-m4if"); + if (!np) + return; + + m4if_base = of_iomap(np, 0); + if (!m4if_base) { + pr_err("Unable to map M4IF registers\n"); + return; + } + + /* + * Configure VPU and IPU with higher priorities + * in order to avoid artifacts during video playback + */ + writel_relaxed(0x00000203, m4if_base + 0x40); + writel_relaxed(0x00000000, m4if_base + 0x44); + writel_relaxed(0x00120125, m4if_base + 0x9c); + writel_relaxed(0x001901A3, m4if_base + 0x48); + iounmap(m4if_base); +} + static void __init imx51_dt_init(void) { imx51_ipu_mipi_setup(); imx_src_init(); - + imx51_m4if_setup(); imx_aips_allow_unprivileged_access("fsl,imx51-aipstz"); } From 26b754f99402d6e7fc4e07d67a2597e6ebabde8b Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Tue, 10 Jul 2018 13:31:48 -0300 Subject: [PATCH 096/112] ARM: mx5: Set the DBGEN bit in ARM_GPC register On i.MX51/i.MX53 it is necessary to set the DBGEN bit in ARM_GPC register in order to turn on the debug clocks. The DBGEN bit of ARM_GPC register has the following description in the i.MX53 Reference Manual: "This allows the user to manually activate clocks within the debug system. This register bit directly controls the platform's dbgen_out output signal which connects to the DAP_SYS to enable all debug clocks. Once enabled, the clocks cannot be disabled except by asserting the disable_trace input of the DAP_SYS." Based on a previous patch from Sebastian Reichel. Signed-off-by: Fabio Estevam Signed-off-by: Shawn Guo --- arch/arm/mach-imx/common.h | 1 + arch/arm/mach-imx/cpu-imx5.c | 45 ++++++++++++++++++++++++++++++++++ arch/arm/mach-imx/mach-imx51.c | 1 + arch/arm/mach-imx/mach-imx53.c | 2 +- 4 files changed, 48 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-imx/common.h b/arch/arm/mach-imx/common.h index 93225db759f8..423dd76bb6b8 100644 --- a/arch/arm/mach-imx/common.h +++ b/arch/arm/mach-imx/common.h @@ -62,6 +62,7 @@ void imx_gpc_set_arm_power_up_timing(u32 sw2iso, u32 sw); void imx_gpc_set_arm_power_down_timing(u32 sw2iso, u32 sw); void imx25_pm_init(void); void imx27_pm_init(void); +void imx5_pmu_init(void); enum mxc_cpu_pwr_mode { WAIT_CLOCKED, /* wfi only */ diff --git a/arch/arm/mach-imx/cpu-imx5.c b/arch/arm/mach-imx/cpu-imx5.c index 4f2d1c772f85..e210bac18840 100644 --- a/arch/arm/mach-imx/cpu-imx5.c +++ b/arch/arm/mach-imx/cpu-imx5.c @@ -117,3 +117,48 @@ int mx53_revision(void) return mx5_cpu_rev; } EXPORT_SYMBOL(mx53_revision); + +#define ARM_GPC 0x4 +#define DBGEN BIT(16) + +/* + * This enables the DBGEN bit in ARM_GPC register, which is + * required for accessing some performance counter features. + * Technically it is only required while perf is used, but to + * keep the source code simple we just enable it all the time + * when the kernel configuration allows using the feature. + */ +void __init imx5_pmu_init(void) +{ + void __iomem *tigerp_base; + struct device_node *np; + u32 gpc; + + if (!IS_ENABLED(CONFIG_ARM_PMU)) + return; + + np = of_find_compatible_node(NULL, NULL, "arm,cortex-a8-pmu"); + if (!np) + return; + + if (!of_property_read_bool(np, "secure-reg-access")) + goto exit; + + of_node_put(np); + + np = of_find_compatible_node(NULL, NULL, "fsl,imx51-tigerp"); + if (!np) + return; + + tigerp_base = of_iomap(np, 0); + if (!tigerp_base) + goto exit; + + gpc = readl_relaxed(tigerp_base + ARM_GPC); + gpc |= DBGEN; + writel_relaxed(gpc, tigerp_base + ARM_GPC); + iounmap(tigerp_base); +exit: + of_node_put(np); + +} diff --git a/arch/arm/mach-imx/mach-imx51.c b/arch/arm/mach-imx/mach-imx51.c index 9d5895ea64f1..c7169c2f94c4 100644 --- a/arch/arm/mach-imx/mach-imx51.c +++ b/arch/arm/mach-imx/mach-imx51.c @@ -80,6 +80,7 @@ static void __init imx51_dt_init(void) imx51_ipu_mipi_setup(); imx_src_init(); imx51_m4if_setup(); + imx5_pmu_init(); imx_aips_allow_unprivileged_access("fsl,imx51-aipstz"); } diff --git a/arch/arm/mach-imx/mach-imx53.c b/arch/arm/mach-imx/mach-imx53.c index 07c2e8dca494..5ec7100737e8 100644 --- a/arch/arm/mach-imx/mach-imx53.c +++ b/arch/arm/mach-imx/mach-imx53.c @@ -31,7 +31,7 @@ static void __init imx53_init_early(void) static void __init imx53_dt_init(void) { imx_src_init(); - + imx5_pmu_init(); imx_aips_allow_unprivileged_access("fsl,imx53-aipstz"); } From 9f30b5ae0585ca5234fe979294b8f897299dec99 Mon Sep 17 00:00:00 2001 From: Nicholas Mc Guire Date: Thu, 12 Jul 2018 11:28:22 +0200 Subject: [PATCH 097/112] ARM: hisi: fix error handling and missing of_node_put of_iomap() can return NULL which seems critical here and thus should be explicitly flagged so that the cause of system halting can be understood. As of_find_compatible_node() is returning a device node with refcount incremented it must be explicitly decremented here. Signed-off-by: Nicholas Mc Guire Fixes: commit 7fda91e73155 ("ARM: hisi: enable smp for HiP01") Signed-off-by: Wei Xu --- arch/arm/mach-hisi/hotplug.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/mach-hisi/hotplug.c b/arch/arm/mach-hisi/hotplug.c index a129aae72602..3b0d1c695108 100644 --- a/arch/arm/mach-hisi/hotplug.c +++ b/arch/arm/mach-hisi/hotplug.c @@ -219,10 +219,10 @@ void hip01_set_cpu(int cpu, bool enable) if (!ctrl_base) { np = of_find_compatible_node(NULL, NULL, "hisilicon,hip01-sysctrl"); - if (np) - ctrl_base = of_iomap(np, 0); - else - BUG(); + BUG_ON(!np); + ctrl_base = of_iomap(np, 0); + of_node_put(np); + BUG_ON(!ctrl_base); } if (enable) { From 81646a3d39ef14749301374a3a0b8311384cd412 Mon Sep 17 00:00:00 2001 From: Nicholas Mc Guire Date: Thu, 12 Jul 2018 11:28:23 +0200 Subject: [PATCH 098/112] ARM: hisi: check of_iomap and fix missing of_node_put of_find_compatible_node() returns a device node with refcount incremented and thus needs an explicit of_node_put(). Further relying on an unchecked of_iomap() which can return NULL is problematic here, after all ctrl_base is critical enough for hix5hd2_set_cpu() to call BUG() if not available so a check seems mandated here. Signed-off-by: Nicholas Mc Guire 0002 Fixes: commit 06cc5c1d4d73 ("ARM: hisi: enable hix5hd2 SoC") Signed-off-by: Wei Xu --- arch/arm/mach-hisi/hotplug.c | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/arch/arm/mach-hisi/hotplug.c b/arch/arm/mach-hisi/hotplug.c index 3b0d1c695108..ae5461cfb67f 100644 --- a/arch/arm/mach-hisi/hotplug.c +++ b/arch/arm/mach-hisi/hotplug.c @@ -173,11 +173,15 @@ static bool hix5hd2_hotplug_init(void) struct device_node *np; np = of_find_compatible_node(NULL, NULL, "hisilicon,cpuctrl"); - if (np) { - ctrl_base = of_iomap(np, 0); - return true; - } - return false; + if (!np) + return false; + + ctrl_base = of_iomap(np, 0); + of_node_put(np); + if (!ctrl_base) + return false; + + return true; } void hix5hd2_set_cpu(int cpu, bool enable) From d396cb185c0337aae5664b250cdd9a73f6eb1503 Mon Sep 17 00:00:00 2001 From: Nicholas Mc Guire Date: Thu, 12 Jul 2018 11:28:24 +0200 Subject: [PATCH 099/112] ARM: hisi: handle of_iomap and fix missing of_node_put Relying on an unchecked of_iomap() which can return NULL is problematic here, an explicit check seems mandatory. Also the call to of_find_compatible_node() returns a device node with refcount incremented therefor an explicit of_node_put() is needed here. Signed-off-by: Nicholas Mc Guire Fixes: commit 22bae4290457 ("ARM: hi3xxx: add hotplug support") Signed-off-by: Wei Xu --- arch/arm/mach-hisi/hotplug.c | 19 +++++++++++++------ 1 file changed, 13 insertions(+), 6 deletions(-) diff --git a/arch/arm/mach-hisi/hotplug.c b/arch/arm/mach-hisi/hotplug.c index ae5461cfb67f..909bb2493781 100644 --- a/arch/arm/mach-hisi/hotplug.c +++ b/arch/arm/mach-hisi/hotplug.c @@ -148,13 +148,20 @@ static int hi3xxx_hotplug_init(void) struct device_node *node; node = of_find_compatible_node(NULL, NULL, "hisilicon,sysctrl"); - if (node) { - ctrl_base = of_iomap(node, 0); - id = HI3620_CTRL; - return 0; + if (!node) { + id = ERROR_CTRL; + return -ENOENT; } - id = ERROR_CTRL; - return -ENOENT; + + ctrl_base = of_iomap(node, 0); + of_node_put(node); + if (!ctrl_base) { + id = ERROR_CTRL; + return -ENOMEM; + } + + id = HI3620_CTRL; + return 0; } void hi3xxx_set_cpu(int cpu, bool enable) From 514e2a294aad435ce205c1c66d2abb89a292473c Mon Sep 17 00:00:00 2001 From: Claudiu Beznea Date: Tue, 17 Jul 2018 11:26:54 +0300 Subject: [PATCH 100/112] ARM: at91: pm: Use ULP0 naming instead of slow clock Switch to use ULP0 naming instead of slow clock naming for power modes, to be as closed as possible to datasheet. This commit does the necessary renaming and macro addition to be as close as possible to the namings from [1]. [1] https://lore.kernel.org/lkml/1470650705-31418-3-git-send-email-wenyou.yang@atmel.com Signed-off-by: Claudiu Beznea Signed-off-by: Alexandre Belloni --- arch/arm/mach-at91/pm.c | 18 +++++++++--------- arch/arm/mach-at91/pm.h | 3 ++- arch/arm/mach-at91/pm_suspend.S | 12 ++++++------ 3 files changed, 17 insertions(+), 16 deletions(-) diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c index 849014c01cf4..d43f00a715d7 100644 --- a/arch/arm/mach-at91/pm.c +++ b/arch/arm/mach-at91/pm.c @@ -40,15 +40,15 @@ extern void at91_pinctrl_gpio_resume(void); #endif static const match_table_t pm_modes __initconst = { - { 0, "standby" }, - { AT91_PM_SLOW_CLOCK, "ulp0" }, + { AT91_PM_STANDBY, "standby" }, + { AT91_PM_ULP0, "ulp0" }, { AT91_PM_BACKUP, "backup" }, { -1, NULL }, }; static struct at91_pm_data pm_data = { - .standby_mode = 0, - .suspend_mode = AT91_PM_SLOW_CLOCK, + .standby_mode = AT91_PM_STANDBY, + .suspend_mode = AT91_PM_ULP0, }; #define at91_ramc_read(id, field) \ @@ -145,7 +145,7 @@ static int at91_pm_verify_clocks(void) */ int at91_suspend_entering_slow_clock(void) { - return (pm_data.mode >= AT91_PM_SLOW_CLOCK); + return (pm_data.mode >= AT91_PM_ULP0); } EXPORT_SYMBOL(at91_suspend_entering_slow_clock); @@ -186,7 +186,7 @@ static void at91_pm_suspend(suspend_state_t state) * event sources; and reduces DRAM power. But otherwise it's identical to * PM_SUSPEND_ON: cpu idle, and nothing fancy done with main or cpu clocks. * - * AT91_PM_SLOW_CLOCK is like STANDBY plus slow clock mode, so drivers must + * AT91_PM_ULP0 is like STANDBY plus slow clock mode, so drivers must * suspend more deeply, the master clock switches to the clk32k and turns off * the main oscillator * @@ -204,7 +204,7 @@ static int at91_pm_enter(suspend_state_t state) /* * Ensure that clocks are in a valid state. */ - if ((pm_data.mode >= AT91_PM_SLOW_CLOCK) && + if (pm_data.mode >= AT91_PM_ULP0 && !at91_pm_verify_clocks()) goto error; @@ -546,9 +546,9 @@ securam_fail: pm_data.sfrbu = NULL; if (pm_data.standby_mode == AT91_PM_BACKUP) - pm_data.standby_mode = AT91_PM_SLOW_CLOCK; + pm_data.standby_mode = AT91_PM_ULP0; if (pm_data.suspend_mode == AT91_PM_BACKUP) - pm_data.suspend_mode = AT91_PM_SLOW_CLOCK; + pm_data.suspend_mode = AT91_PM_ULP0; } struct pmc_info { diff --git a/arch/arm/mach-at91/pm.h b/arch/arm/mach-at91/pm.h index f95d31496f08..c44eaf17db86 100644 --- a/arch/arm/mach-at91/pm.h +++ b/arch/arm/mach-at91/pm.h @@ -21,7 +21,8 @@ #define AT91_MEMCTRL_SDRAMC 1 #define AT91_MEMCTRL_DDRSDR 2 -#define AT91_PM_SLOW_CLOCK 0x01 +#define AT91_PM_STANDBY 0x00 +#define AT91_PM_ULP0 0x01 #define AT91_PM_BACKUP 0x02 #ifndef __ASSEMBLY__ diff --git a/arch/arm/mach-at91/pm_suspend.S b/arch/arm/mach-at91/pm_suspend.S index daca91feea6a..821322d1a64d 100644 --- a/arch/arm/mach-at91/pm_suspend.S +++ b/arch/arm/mach-at91/pm_suspend.S @@ -112,8 +112,8 @@ ENTRY(at91_pm_suspend_in_sram) bl at91_sramc_self_refresh ldr r0, .pm_mode - cmp r0, #AT91_PM_SLOW_CLOCK - beq slow_clock + cmp r0, #AT91_PM_ULP0 + beq ulp0_mode cmp r0, #AT91_PM_BACKUP beq backup_mode @@ -122,8 +122,8 @@ ENTRY(at91_pm_suspend_in_sram) at91_cpu_idle b exit_suspend -slow_clock: - bl at91_slowck_mode +ulp0_mode: + bl at91_ulp0_mode b exit_suspend backup_mode: bl at91_backup_mode @@ -151,7 +151,7 @@ ENTRY(at91_backup_mode) str tmp1, [r0, #0] ENDPROC(at91_backup_mode) -ENTRY(at91_slowck_mode) +ENTRY(at91_ulp0_mode) ldr pmc, .pmc_base /* Save Master clock setting */ @@ -212,7 +212,7 @@ ENTRY(at91_slowck_mode) wait_mckrdy mov pc, lr -ENDPROC(at91_slowck_mode) +ENDPROC(at91_ulp0_mode) /* * void at91_sramc_self_refresh(unsigned int is_active) From 5b56c182edb1224bc1a97a1c74003eaa0eb59daf Mon Sep 17 00:00:00 2001 From: Wenyou Yang Date: Tue, 17 Jul 2018 11:26:55 +0300 Subject: [PATCH 101/112] ARM: at91: pm: Add ULP1 mode support In the ULP1 mode, in order to achieve the lowest power consumption with the system in retention mode and be able to resume on the wake up events, all the clocks are shut off, inclusive the embedded 12MHz RC oscillator, and the number of wake up sources is limited as well. When the wake up event is asserted, the embedded 12MHz RC oscillator restarts automatically. The ULP1 (Ultra Low-power mode 1) is introduced by SAMA5D2. The previous size of pm_suspend.o was 2148 bytes. With the addition of ULP1 mode the new size of pm_suspend.o raised at 2456 bytes. Signed-off-by: Wenyou Yang Signed-off-by: Ludovic Desroches [claudiu.beznea@microchip.com: aligned with 4.18-rc1] Signed-off-by: Claudiu Beznea Signed-off-by: Alexandre Belloni --- arch/arm/mach-at91/pm.c | 1 + arch/arm/mach-at91/pm.h | 3 +- arch/arm/mach-at91/pm_suspend.S | 142 +++++++++++++++++++++++++++----- include/linux/clk/at91_pmc.h | 2 + 4 files changed, 127 insertions(+), 21 deletions(-) diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c index d43f00a715d7..099d8094018c 100644 --- a/arch/arm/mach-at91/pm.c +++ b/arch/arm/mach-at91/pm.c @@ -42,6 +42,7 @@ extern void at91_pinctrl_gpio_resume(void); static const match_table_t pm_modes __initconst = { { AT91_PM_STANDBY, "standby" }, { AT91_PM_ULP0, "ulp0" }, + { AT91_PM_ULP1, "ulp1" }, { AT91_PM_BACKUP, "backup" }, { -1, NULL }, }; diff --git a/arch/arm/mach-at91/pm.h b/arch/arm/mach-at91/pm.h index c44eaf17db86..9bd4e6ca672a 100644 --- a/arch/arm/mach-at91/pm.h +++ b/arch/arm/mach-at91/pm.h @@ -23,7 +23,8 @@ #define AT91_PM_STANDBY 0x00 #define AT91_PM_ULP0 0x01 -#define AT91_PM_BACKUP 0x02 +#define AT91_PM_ULP1 0x02 +#define AT91_PM_BACKUP 0x03 #ifndef __ASSEMBLY__ struct at91_pm_data { diff --git a/arch/arm/mach-at91/pm_suspend.S b/arch/arm/mach-at91/pm_suspend.S index 821322d1a64d..a7c6ae13c945 100644 --- a/arch/arm/mach-at91/pm_suspend.S +++ b/arch/arm/mach-at91/pm_suspend.S @@ -41,6 +41,15 @@ tmp2 .req r5 beq 1b .endm +/* + * Wait for main oscillator selection is done + */ + .macro wait_moscsels +1: ldr tmp1, [pmc, #AT91_PMC_SR] + tst tmp1, #AT91_PMC_MOSCSELS + beq 1b + .endm + /* * Wait until PLLA has locked. */ @@ -112,19 +121,20 @@ ENTRY(at91_pm_suspend_in_sram) bl at91_sramc_self_refresh ldr r0, .pm_mode - cmp r0, #AT91_PM_ULP0 - beq ulp0_mode + cmp r0, #AT91_PM_STANDBY + beq standby cmp r0, #AT91_PM_BACKUP beq backup_mode + bl at91_ulp_mode + b exit_suspend + +standby: /* Wait for interrupt */ ldr pmc, .pmc_base at91_cpu_idle b exit_suspend -ulp0_mode: - bl at91_ulp0_mode - b exit_suspend backup_mode: bl at91_backup_mode b exit_suspend @@ -151,7 +161,102 @@ ENTRY(at91_backup_mode) str tmp1, [r0, #0] ENDPROC(at91_backup_mode) -ENTRY(at91_ulp0_mode) +.macro at91_pm_ulp0_mode + ldr pmc, .pmc_base + + /* Turn off the crystal oscillator */ + ldr tmp1, [pmc, #AT91_CKGR_MOR] + bic tmp1, tmp1, #AT91_PMC_MOSCEN + orr tmp1, tmp1, #AT91_PMC_KEY + str tmp1, [pmc, #AT91_CKGR_MOR] + + /* Wait for interrupt */ + at91_cpu_idle + + /* Turn on the crystal oscillator */ + ldr tmp1, [pmc, #AT91_CKGR_MOR] + orr tmp1, tmp1, #AT91_PMC_MOSCEN + orr tmp1, tmp1, #AT91_PMC_KEY + str tmp1, [pmc, #AT91_CKGR_MOR] + + wait_moscrdy +.endm + +/** + * Note: This procedure only applies on the platform which uses + * the external crystal oscillator as a main clock source. + */ +.macro at91_pm_ulp1_mode + ldr pmc, .pmc_base + + /* Switch the main clock source to 12-MHz RC oscillator */ + ldr tmp1, [pmc, #AT91_CKGR_MOR] + bic tmp1, tmp1, #AT91_PMC_MOSCSEL + bic tmp1, tmp1, #AT91_PMC_KEY_MASK + orr tmp1, tmp1, #AT91_PMC_KEY + str tmp1, [pmc, #AT91_CKGR_MOR] + + wait_moscsels + + /* Disable the crystal oscillator */ + ldr tmp1, [pmc, #AT91_CKGR_MOR] + bic tmp1, tmp1, #AT91_PMC_MOSCEN + bic tmp1, tmp1, #AT91_PMC_KEY_MASK + orr tmp1, tmp1, #AT91_PMC_KEY + str tmp1, [pmc, #AT91_CKGR_MOR] + + /* Switch the master clock source to main clock */ + ldr tmp1, [pmc, #AT91_PMC_MCKR] + bic tmp1, tmp1, #AT91_PMC_CSS + orr tmp1, tmp1, #AT91_PMC_CSS_MAIN + str tmp1, [pmc, #AT91_PMC_MCKR] + + wait_mckrdy + + /* Enter the ULP1 mode by set WAITMODE bit in CKGR_MOR */ + ldr tmp1, [pmc, #AT91_CKGR_MOR] + orr tmp1, tmp1, #AT91_PMC_WAITMODE + bic tmp1, tmp1, #AT91_PMC_KEY_MASK + orr tmp1, tmp1, #AT91_PMC_KEY + str tmp1, [pmc, #AT91_CKGR_MOR] + + wait_mckrdy + + /* Enable the crystal oscillator */ + ldr tmp1, [pmc, #AT91_CKGR_MOR] + orr tmp1, tmp1, #AT91_PMC_MOSCEN + bic tmp1, tmp1, #AT91_PMC_KEY_MASK + orr tmp1, tmp1, #AT91_PMC_KEY + str tmp1, [pmc, #AT91_CKGR_MOR] + + wait_moscrdy + + /* Switch the master clock source to slow clock */ + ldr tmp1, [pmc, #AT91_PMC_MCKR] + bic tmp1, tmp1, #AT91_PMC_CSS + str tmp1, [pmc, #AT91_PMC_MCKR] + + wait_mckrdy + + /* Switch main clock source to crystal oscillator */ + ldr tmp1, [pmc, #AT91_CKGR_MOR] + orr tmp1, tmp1, #AT91_PMC_MOSCSEL + bic tmp1, tmp1, #AT91_PMC_KEY_MASK + orr tmp1, tmp1, #AT91_PMC_KEY + str tmp1, [pmc, #AT91_CKGR_MOR] + + wait_moscsels + + /* Switch the master clock source to main clock */ + ldr tmp1, [pmc, #AT91_PMC_MCKR] + bic tmp1, tmp1, #AT91_PMC_CSS + orr tmp1, tmp1, #AT91_PMC_CSS_MAIN + str tmp1, [pmc, #AT91_PMC_MCKR] + + wait_mckrdy +.endm + +ENTRY(at91_ulp_mode) ldr pmc, .pmc_base /* Save Master clock setting */ @@ -174,22 +279,19 @@ ENTRY(at91_ulp0_mode) orr tmp1, tmp1, #(1 << 29) /* bit 29 always set */ str tmp1, [pmc, #AT91_CKGR_PLLAR] - /* Turn off the main oscillator */ - ldr tmp1, [pmc, #AT91_CKGR_MOR] - bic tmp1, tmp1, #AT91_PMC_MOSCEN - orr tmp1, tmp1, #AT91_PMC_KEY - str tmp1, [pmc, #AT91_CKGR_MOR] + ldr r0, .pm_mode + cmp r0, #AT91_PM_ULP1 + beq ulp1_mode - /* Wait for interrupt */ - at91_cpu_idle + at91_pm_ulp0_mode + b ulp_exit - /* Turn on the main oscillator */ - ldr tmp1, [pmc, #AT91_CKGR_MOR] - orr tmp1, tmp1, #AT91_PMC_MOSCEN - orr tmp1, tmp1, #AT91_PMC_KEY - str tmp1, [pmc, #AT91_CKGR_MOR] +ulp1_mode: + at91_pm_ulp1_mode + b ulp_exit - wait_moscrdy +ulp_exit: + ldr pmc, .pmc_base /* Restore PLLA setting */ ldr tmp1, .saved_pllar @@ -212,7 +314,7 @@ ENTRY(at91_ulp0_mode) wait_mckrdy mov pc, lr -ENDPROC(at91_ulp0_mode) +ENDPROC(at91_ulp_mode) /* * void at91_sramc_self_refresh(unsigned int is_active) diff --git a/include/linux/clk/at91_pmc.h b/include/linux/clk/at91_pmc.h index 6aca5ce8a99a..4ea2cbf9b50d 100644 --- a/include/linux/clk/at91_pmc.h +++ b/include/linux/clk/at91_pmc.h @@ -47,8 +47,10 @@ #define AT91_CKGR_MOR 0x20 /* Main Oscillator Register [not on SAM9RL] */ #define AT91_PMC_MOSCEN (1 << 0) /* Main Oscillator Enable */ #define AT91_PMC_OSCBYPASS (1 << 1) /* Oscillator Bypass */ +#define AT91_PMC_WAITMODE (1 << 2) /* Wait Mode Command */ #define AT91_PMC_MOSCRCEN (1 << 3) /* Main On-Chip RC Oscillator Enable [some SAM9] */ #define AT91_PMC_OSCOUNT (0xff << 8) /* Main Oscillator Start-up Time */ +#define AT91_PMC_KEY_MASK (0xff << 16) #define AT91_PMC_KEY (0x37 << 16) /* MOR Writing Key */ #define AT91_PMC_MOSCSEL (1 << 24) /* Main Oscillator Selection [some SAM9] */ #define AT91_PMC_CFDEN (1 << 25) /* Clock Failure Detector Enable [some SAM9] */ From 3abd729aa468d7346f12d7dfc8f81aba653f6c88 Mon Sep 17 00:00:00 2001 From: Claudiu Beznea Date: Tue, 17 Jul 2018 11:26:56 +0300 Subject: [PATCH 102/112] ARM: at91: pm: add PMC fast startup registers defines Add PMC fast startup registers defines. Signed-off-by: Claudiu Beznea Signed-off-by: Alexandre Belloni --- include/linux/clk/at91_pmc.h | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/include/linux/clk/at91_pmc.h b/include/linux/clk/at91_pmc.h index 4ea2cbf9b50d..931ab05f771d 100644 --- a/include/linux/clk/at91_pmc.h +++ b/include/linux/clk/at91_pmc.h @@ -157,6 +157,19 @@ #define AT91_PMC_GCKRDY (1 << 24) /* Generated Clocks */ #define AT91_PMC_IMR 0x6c /* Interrupt Mask Register */ +#define AT91_PMC_FSMR 0x70 /* Fast Startup Mode Register */ +#define AT91_PMC_FSTT(n) BIT(n) +#define AT91_PMC_RTCAL BIT(17) /* RTC Alarm Enable */ +#define AT91_PMC_USBAL BIT(18) /* USB Resume Enable */ +#define AT91_PMC_SDMMC_CD BIT(19) /* SDMMC Card Detect Enable */ +#define AT91_PMC_LPM BIT(20) /* Low-power Mode */ +#define AT91_PMC_RXLP_MCE BIT(24) /* Backup UART Receive Enable */ +#define AT91_PMC_ACC_CE BIT(25) /* ACC Enable */ + +#define AT91_PMC_FSPR 0x74 /* Fast Startup Polarity Reg */ + +#define AT91_PMC_FS_INPUT_MASK 0x7ff + #define AT91_PMC_PLLICPR 0x80 /* PLL Charge Pump Current Register */ #define AT91_PMC_PROT 0xe4 /* Write Protect Mode Register [some SAM9] */ From d7484f5c6b3b0565d2395aece2862f183581e1c1 Mon Sep 17 00:00:00 2001 From: Claudiu Beznea Date: Tue, 17 Jul 2018 14:06:24 +0300 Subject: [PATCH 103/112] ARM: at91: pm: configure wakeup sources for ULP1 mode Since for ULP1 PM mode of SAMA5D2 the wakeup sources are limited and well known add a method to check if these wakeup sources are defined by user (either via DT or filesystem). In case there are no wakeup sources defined for ULP1 the PM suspend will fail, otherwise these will be configured in fast startup registers of PMC. Since wakeup sources of ULP1 need also to be configured in SHDWC registers the code was a bit changed to map the SHDWC also in case ULP1 is requested by user (this was done in the initialization phase). In case the ULP1 initialization fails the ULP0 mode is used (this mode was also used in case backup mode initialization failed). Signed-off-by: Claudiu Beznea Signed-off-by: Alexandre Belloni --- arch/arm/mach-at91/pm.c | 168 ++++++++++++++++++++++++++++++++++------ 1 file changed, 146 insertions(+), 22 deletions(-) diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c index 099d8094018c..e8f3d0f97e61 100644 --- a/arch/arm/mach-at91/pm.c +++ b/arch/arm/mach-at91/pm.c @@ -80,6 +80,90 @@ static struct at91_pm_bu { phys_addr_t resume; } *pm_bu; +struct wakeup_source_info { + unsigned int pmc_fsmr_bit; + unsigned int shdwc_mr_bit; + bool set_polarity; +}; + +static const struct wakeup_source_info ws_info[] = { + { .pmc_fsmr_bit = AT91_PMC_FSTT(10), .set_polarity = true }, + { .pmc_fsmr_bit = AT91_PMC_RTCAL, .shdwc_mr_bit = BIT(17) }, + { .pmc_fsmr_bit = AT91_PMC_USBAL }, + { .pmc_fsmr_bit = AT91_PMC_SDMMC_CD }, +}; + +static const struct of_device_id sama5d2_ws_ids[] = { + { .compatible = "atmel,sama5d2-gem", .data = &ws_info[0] }, + { .compatible = "atmel,at91rm9200-rtc", .data = &ws_info[1] }, + { .compatible = "atmel,sama5d3-udc", .data = &ws_info[2] }, + { .compatible = "atmel,at91rm9200-ohci", .data = &ws_info[2] }, + { .compatible = "usb-ohci", .data = &ws_info[2] }, + { .compatible = "atmel,at91sam9g45-ehci", .data = &ws_info[2] }, + { .compatible = "usb-ehci", .data = &ws_info[2] }, + { .compatible = "atmel,sama5d2-sdhci", .data = &ws_info[3] }, + { /* sentinel */ } +}; + +static int at91_pm_config_ws(unsigned int pm_mode, bool set) +{ + const struct wakeup_source_info *wsi; + const struct of_device_id *match; + struct platform_device *pdev; + struct device_node *np; + unsigned int mode = 0, polarity = 0, val = 0; + + if (pm_mode != AT91_PM_ULP1) + return 0; + + if (!pm_data.pmc || !pm_data.shdwc) + return -EPERM; + + if (!set) { + writel(mode, pm_data.pmc + AT91_PMC_FSMR); + return 0; + } + + /* SHDWC.WUIR */ + val = readl(pm_data.shdwc + 0x0c); + mode |= (val & 0x3ff); + polarity |= ((val >> 16) & 0x3ff); + + /* SHDWC.MR */ + val = readl(pm_data.shdwc + 0x04); + + /* Loop through defined wakeup sources. */ + for_each_matching_node_and_match(np, sama5d2_ws_ids, &match) { + pdev = of_find_device_by_node(np); + if (!pdev) + continue; + + if (device_may_wakeup(&pdev->dev)) { + wsi = match->data; + + /* Check if enabled on SHDWC. */ + if (wsi->shdwc_mr_bit && !(val & wsi->shdwc_mr_bit)) + goto put_node; + + mode |= wsi->pmc_fsmr_bit; + if (wsi->set_polarity) + polarity |= wsi->pmc_fsmr_bit; + } + +put_node: + of_node_put(np); + } + + if (mode) { + writel(mode, pm_data.pmc + AT91_PMC_FSMR); + writel(polarity, pm_data.pmc + AT91_PMC_FSPR); + } else { + pr_err("AT91: PM: no ULP1 wakeup sources found!"); + } + + return mode ? 0 : -EPERM; +} + /* * Called after processes are frozen, but before we shutdown devices. */ @@ -98,7 +182,7 @@ static int at91_pm_begin(suspend_state_t state) pm_data.mode = -1; } - return 0; + return at91_pm_config_ws(pm_data.mode, true); } /* @@ -234,6 +318,7 @@ error: */ static void at91_pm_end(void) { + at91_pm_config_ws(pm_data.mode, false); } @@ -479,31 +564,28 @@ static void __init at91_pm_sram_init(void) &at91_pm_suspend_in_sram, at91_pm_suspend_in_sram_sz); } -static void __init at91_pm_backup_init(void) +static bool __init at91_is_pm_mode_active(int pm_mode) +{ + return (pm_data.standby_mode == pm_mode || + pm_data.suspend_mode == pm_mode); +} + +static int __init at91_pm_backup_init(void) { struct gen_pool *sram_pool; struct device_node *np; struct platform_device *pdev = NULL; + int ret = -ENODEV; - if ((pm_data.standby_mode != AT91_PM_BACKUP) && - (pm_data.suspend_mode != AT91_PM_BACKUP)) - return; + if (!at91_is_pm_mode_active(AT91_PM_BACKUP)) + return 0; pm_bu = NULL; - np = of_find_compatible_node(NULL, NULL, "atmel,sama5d2-shdwc"); - if (!np) { - pr_warn("%s: failed to find shdwc!\n", __func__); - return; - } - - pm_data.shdwc = of_iomap(np, 0); - of_node_put(np); - np = of_find_compatible_node(NULL, NULL, "atmel,sama5d2-sfrbu"); if (!np) { pr_warn("%s: failed to find sfrbu!\n", __func__); - goto sfrbu_fail; + return ret; } pm_data.sfrbu = of_iomap(np, 0); @@ -530,6 +612,7 @@ static void __init at91_pm_backup_init(void) pm_bu = (void *)gen_pool_alloc(sram_pool, sizeof(struct at91_pm_bu)); if (!pm_bu) { pr_warn("%s: unable to alloc securam!\n", __func__); + ret = -ENOMEM; goto securam_fail; } @@ -537,21 +620,62 @@ static void __init at91_pm_backup_init(void) pm_bu->canary = __pa_symbol(&canary); pm_bu->resume = __pa_symbol(cpu_resume); - return; + return 0; -sfrbu_fail: - iounmap(pm_data.shdwc); - pm_data.shdwc = NULL; securam_fail: iounmap(pm_data.sfrbu); pm_data.sfrbu = NULL; + return ret; +} - if (pm_data.standby_mode == AT91_PM_BACKUP) +static void __init at91_pm_use_default_mode(int pm_mode) +{ + if (pm_mode != AT91_PM_ULP1 && pm_mode != AT91_PM_BACKUP) + return; + + if (pm_data.standby_mode == pm_mode) pm_data.standby_mode = AT91_PM_ULP0; - if (pm_data.suspend_mode == AT91_PM_BACKUP) + if (pm_data.suspend_mode == pm_mode) pm_data.suspend_mode = AT91_PM_ULP0; } +static void __init at91_pm_modes_init(void) +{ + struct device_node *np; + int ret; + + if (!at91_is_pm_mode_active(AT91_PM_BACKUP) && + !at91_is_pm_mode_active(AT91_PM_ULP1)) + return; + + np = of_find_compatible_node(NULL, NULL, "atmel,sama5d2-shdwc"); + if (!np) { + pr_warn("%s: failed to find shdwc!\n", __func__); + goto ulp1_default; + } + + pm_data.shdwc = of_iomap(np, 0); + of_node_put(np); + + ret = at91_pm_backup_init(); + if (ret) { + if (!at91_is_pm_mode_active(AT91_PM_ULP1)) + goto unmap; + else + goto backup_default; + } + + return; + +unmap: + iounmap(pm_data.shdwc); + pm_data.shdwc = NULL; +ulp1_default: + at91_pm_use_default_mode(AT91_PM_ULP1); +backup_default: + at91_pm_use_default_mode(AT91_PM_BACKUP); +} + struct pmc_info { unsigned long uhp_udp_mask; }; @@ -645,7 +769,7 @@ void __init sama5d2_pm_init(void) if (!IS_ENABLED(CONFIG_SOC_SAMA5D2)) return; - at91_pm_backup_init(); + at91_pm_modes_init(); sama5_pm_init(); } From 7416d4411361c79e10667c571b15eed18e811f44 Mon Sep 17 00:00:00 2001 From: Michel Pollet Date: Thu, 28 Jun 2018 09:17:13 +0100 Subject: [PATCH 104/112] ARM: shmobile: Add the R9A06G032 SMP enabler driver The Renesas R9A06G032 second CA7 is parked in a ROM pen at boot time, it equires a special enable method to get it started. Signed-off-by: Michel Pollet Reviewed-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- drivers/soc/renesas/Makefile | 1 + drivers/soc/renesas/r9a06g032-smp.c | 96 +++++++++++++++++++++++++++++ 2 files changed, 97 insertions(+) create mode 100644 drivers/soc/renesas/r9a06g032-smp.c diff --git a/drivers/soc/renesas/Makefile b/drivers/soc/renesas/Makefile index 7dc0f20d7907..44a0d6b10192 100644 --- a/drivers/soc/renesas/Makefile +++ b/drivers/soc/renesas/Makefile @@ -18,6 +18,7 @@ obj-$(CONFIG_SYSC_R8A77970) += r8a77970-sysc.o obj-$(CONFIG_SYSC_R8A77980) += r8a77980-sysc.o obj-$(CONFIG_SYSC_R8A77990) += r8a77990-sysc.o obj-$(CONFIG_SYSC_R8A77995) += r8a77995-sysc.o +obj-$(CONFIG_ARCH_R9A06G032) += r9a06g032-smp.o # Family obj-$(CONFIG_RST_RCAR) += rcar-rst.o diff --git a/drivers/soc/renesas/r9a06g032-smp.c b/drivers/soc/renesas/r9a06g032-smp.c new file mode 100644 index 000000000000..a1926e8d73f2 --- /dev/null +++ b/drivers/soc/renesas/r9a06g032-smp.c @@ -0,0 +1,96 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * R9A06G032 Second CA7 enabler. + * + * Copyright (C) 2018 Renesas Electronics Europe Limited + * + * Michel Pollet , + * Derived from actions,s500-smp + */ + +#include +#include +#include +#include + +/* + * The second CPU is parked in ROM at boot time. It requires waking it after + * writing an address into the BOOTADDR register of sysctrl. + * + * So the default value of the "cpu-release-addr" corresponds to BOOTADDR... + * + * *However* the BOOTADDR register is not available when the kernel + * starts in NONSEC mode. + * + * So for NONSEC mode, the bootloader re-parks the second CPU into a pen + * in SRAM, and changes the "cpu-release-addr" of linux's DT to a SRAM address, + * which is not restricted. + */ + +static void __iomem *cpu_bootaddr; + +static DEFINE_SPINLOCK(cpu_lock); + +static int +r9a06g032_smp_boot_secondary(unsigned int cpu, + struct task_struct *idle) +{ + if (!cpu_bootaddr) + return -ENODEV; + + spin_lock(&cpu_lock); + + writel(__pa_symbol(secondary_startup), cpu_bootaddr); + arch_send_wakeup_ipi_mask(cpumask_of(cpu)); + + spin_unlock(&cpu_lock); + + return 0; +} + +static void __init r9a06g032_smp_prepare_cpus(unsigned int max_cpus) +{ + struct device_node *dn; + int ret = -EINVAL, dns; + u32 bootaddr; + + dn = of_get_cpu_node(1, NULL); + if (!dn) { + pr_err("CPU#1: missing device tree node\n"); + return; + } + /* + * Determine the address from which the CPU is polling. + * The bootloader *does* change this property. + * Note: The property can be either 64 or 32 bits, so handle both cases + */ + if (of_find_property(dn, "cpu-release-addr", &dns)) { + if (dns == sizeof(u64)) { + u64 temp; + + ret = of_property_read_u64(dn, + "cpu-release-addr", &temp); + bootaddr = temp; + } else { + ret = of_property_read_u32(dn, + "cpu-release-addr", + &bootaddr); + } + } + of_node_put(dn); + if (ret) { + pr_err("CPU#1: invalid cpu-release-addr property\n"); + return; + } + pr_info("CPU#1: cpu-release-addr %08x\n", bootaddr); + + cpu_bootaddr = ioremap(bootaddr, sizeof(bootaddr)); +} + +static const struct smp_operations r9a06g032_smp_ops __initconst = { + .smp_prepare_cpus = r9a06g032_smp_prepare_cpus, + .smp_boot_secondary = r9a06g032_smp_boot_secondary, +}; + +CPU_METHOD_OF_DECLARE(r9a06g032_smp, + "renesas,r9a06g032-smp", &r9a06g032_smp_ops); From c83e9c4873d34aa8d9bbb90345fee0757b6233ef Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Fri, 6 Jul 2018 17:16:01 +0200 Subject: [PATCH 105/112] soc: r9a06g032: don't build SMP files for non-SMP config Without CONFIG_SMP, we get a build failure: In file included from include/linux/byteorder/little_endian.h:5, from arch/arm/include/uapi/asm/byteorder.h:22, from include/asm-generic/bitops/le.h:6, from arch/arm/include/asm/bitops.h:342, from include/linux/bitops.h:18, from include/linux/kernel.h:11, from include/asm-generic/bug.h:18, from arch/arm/include/asm/bug.h:60, from include/linux/bug.h:5, from include/linux/io.h:23, from drivers/soc/renesas/r9a06g032-smp.c:11: drivers/soc/renesas/r9a06g032-smp.c: In function 'r9a06g032_smp_boot_secondary': drivers/soc/renesas/r9a06g032-smp.c:43:21: error: 'secondary_startup' undeclared (first use in this function) writel(__pa_symbol(secondary_startup), cpu_bootaddr); ^~~~~~~~~~~~~~~~~ This makes the compilation of that file conditional on SMP support. It would probably be better for consistency to leave that file in arch/arm/mach-shmobile/, matching what we do for all other smp operations. Fixes: cde4f86f9249 ("arm: shmobile: Add the R9A06G032 SMP enabler driver") Signed-off-by: Arnd Bergmann Reviewed-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- drivers/soc/renesas/Makefile | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/soc/renesas/Makefile b/drivers/soc/renesas/Makefile index 44a0d6b10192..c37b0803c1b6 100644 --- a/drivers/soc/renesas/Makefile +++ b/drivers/soc/renesas/Makefile @@ -18,7 +18,9 @@ obj-$(CONFIG_SYSC_R8A77970) += r8a77970-sysc.o obj-$(CONFIG_SYSC_R8A77980) += r8a77980-sysc.o obj-$(CONFIG_SYSC_R8A77990) += r8a77990-sysc.o obj-$(CONFIG_SYSC_R8A77995) += r8a77995-sysc.o +ifdef CONFIG_SMP obj-$(CONFIG_ARCH_R9A06G032) += r9a06g032-smp.o +endif # Family obj-$(CONFIG_RST_RCAR) += rcar-rst.o From 8fc0d470bc77fa07632b471cec8207baf9704e32 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Fri, 6 Jul 2018 17:15:19 +0200 Subject: [PATCH 106/112] ARM: shmobile: r8a7779: hide unused r8a7779_platform_cpu_kill After the cleanup in r8a7779_smp_prepare_cpus(), the only remaining caller of r8a7779_platform_cpu_kill() is in an ifdef, which leads to a build warning without CONFIG_HOTPLUG_CPU: arch/arm/mach-shmobile/smp-r8a7779.c:26:12: error: 'r8a7779_platform_cpu_kill' defined but not used [-Werror=unused-function] This moves the function inside of that #ifdef to avoid the warning. Fixes: 62f55ce683e3 ("ARM: shmobile: r8a7779: Stop powering down secondary CPUs during early boot") Signed-off-by: Arnd Bergmann Reviewed-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/smp-r8a7779.c | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/arch/arm/mach-shmobile/smp-r8a7779.c b/arch/arm/mach-shmobile/smp-r8a7779.c index b7fe1f489b08..0ed73b650c14 100644 --- a/arch/arm/mach-shmobile/smp-r8a7779.c +++ b/arch/arm/mach-shmobile/smp-r8a7779.c @@ -23,17 +23,6 @@ #define AVECR IOMEM(0xfe700040) #define R8A7779_SCU_BASE 0xf0000000 -static int r8a7779_platform_cpu_kill(unsigned int cpu) -{ - int ret = -EIO; - - cpu = cpu_logical_map(cpu); - if (cpu) - ret = rcar_sysc_power_down_cpu(cpu); - - return ret ? ret : 1; -} - static int r8a7779_boot_secondary(unsigned int cpu, struct task_struct *idle) { int ret = -EIO; @@ -55,6 +44,17 @@ static void __init r8a7779_smp_prepare_cpus(unsigned int max_cpus) } #ifdef CONFIG_HOTPLUG_CPU +static int r8a7779_platform_cpu_kill(unsigned int cpu) +{ + int ret = -EIO; + + cpu = cpu_logical_map(cpu); + if (cpu) + ret = rcar_sysc_power_down_cpu(cpu); + + return ret ? ret : 1; +} + static int r8a7779_cpu_kill(unsigned int cpu) { if (shmobile_smp_scu_cpu_kill(cpu)) From 54f464e0c91f10212fa5699bfef1f104ee7d2213 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Thu, 12 Jul 2018 18:08:57 +0200 Subject: [PATCH 107/112] ARM: shmobile: Always enable ARCH_TIMER on SoCs with A7 and/or A15 R-Mobile APE6, R-Car Gen2, and RZ/G1 SoCs have Cortex-A7 and/or Cortex-A15 CPU cores, all of which have ARM architectured timers. Force use of the ARM architectured timer on these SoCs. This allows to: - Remove the calls to shmobile_init_delay() from the corresponding machine vectors, - Remove a check in timer setup specific to R-Car Gen2, - Remove a check in shmobile_init_delay(). Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/Kconfig | 2 ++ arch/arm/mach-shmobile/setup-r8a73a4.c | 1 - arch/arm/mach-shmobile/setup-rcar-gen2.c | 4 ---- arch/arm/mach-shmobile/timer.c | 8 -------- 4 files changed, 2 insertions(+), 13 deletions(-) diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig index 0b67254eabb2..aeb2eed08598 100644 --- a/arch/arm/mach-shmobile/Kconfig +++ b/arch/arm/mach-shmobile/Kconfig @@ -15,6 +15,7 @@ config ARCH_RCAR_GEN1 config ARCH_RCAR_GEN2 bool + select HAVE_ARM_ARCH_TIMER select PM select PM_GENERIC_DOMAINS select RENESAS_IRQC @@ -58,6 +59,7 @@ config ARCH_R8A73A4 bool "R-Mobile APE6 (R8A73A40)" select ARCH_RMOBILE select ARM_ERRATA_798181 if SMP + select HAVE_ARM_ARCH_TIMER select RENESAS_IRQC config ARCH_R8A7740 diff --git a/arch/arm/mach-shmobile/setup-r8a73a4.c b/arch/arm/mach-shmobile/setup-r8a73a4.c index ef391fa368e9..23a29a0ea9c9 100644 --- a/arch/arm/mach-shmobile/setup-r8a73a4.c +++ b/arch/arm/mach-shmobile/setup-r8a73a4.c @@ -18,7 +18,6 @@ static const char *const r8a73a4_boards_compat_dt[] __initconst = { }; DT_MACHINE_START(R8A73A4_DT, "Generic R8A73A4 (Flattened Device Tree)") - .init_early = shmobile_init_delay, .init_late = shmobile_init_late, .dt_compat = r8a73a4_boards_compat_dt, MACHINE_END diff --git a/arch/arm/mach-shmobile/setup-rcar-gen2.c b/arch/arm/mach-shmobile/setup-rcar-gen2.c index 117531367f17..013acc97795c 100644 --- a/arch/arm/mach-shmobile/setup-rcar-gen2.c +++ b/arch/arm/mach-shmobile/setup-rcar-gen2.c @@ -59,7 +59,6 @@ static unsigned int __init get_extal_freq(void) void __init rcar_gen2_timer_init(void) { -#ifdef CONFIG_ARM_ARCH_TIMER void __iomem *base; u32 freq; @@ -101,7 +100,6 @@ void __init rcar_gen2_timer_init(void) } iounmap(base); -#endif /* CONFIG_ARM_ARCH_TIMER */ of_clk_init(NULL); timer_probe(); @@ -187,7 +185,6 @@ static const char * const rcar_gen2_boards_compat_dt[] __initconst = { }; DT_MACHINE_START(RCAR_GEN2_DT, "Generic R-Car Gen2 (Flattened Device Tree)") - .init_early = shmobile_init_delay, .init_late = shmobile_init_late, .init_time = rcar_gen2_timer_init, .reserve = rcar_gen2_reserve, @@ -202,7 +199,6 @@ static const char * const rz_g1_boards_compat_dt[] __initconst = { }; DT_MACHINE_START(RZ_G1_DT, "Generic RZ/G1 (Flattened Device Tree)") - .init_early = shmobile_init_delay, .init_late = shmobile_init_late, .init_time = rcar_gen2_timer_init, .reserve = rcar_gen2_reserve, diff --git a/arch/arm/mach-shmobile/timer.c b/arch/arm/mach-shmobile/timer.c index 6196a6380385..828e8aea037e 100644 --- a/arch/arm/mach-shmobile/timer.c +++ b/arch/arm/mach-shmobile/timer.c @@ -32,14 +32,6 @@ void __init shmobile_init_delay(void) for_each_child_of_node(cpus, np) { u32 freq; - if (IS_ENABLED(CONFIG_ARM_ARCH_TIMER) && - (of_device_is_compatible(np, "arm,cortex-a7") || - of_device_is_compatible(np, "arm,cortex-a15"))) { - of_node_put(np); - of_node_put(cpus); - return; - } - if (!of_property_read_u32(np, "clock-frequency", &freq)) max_freq = max(max_freq, freq); } From e89549a596b3b039e8fbac487452d0988943444c Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Tue, 24 Jul 2018 18:48:07 +0200 Subject: [PATCH 108/112] ARM: exynos: Remove outdated maintainer information The current maintainers are specified in MAINTAINERS file, so remove in-sources information with outdated e-mail address (Thomas Abraham's email does not work, Kukjin Kim uses @kernel.org). Signed-off-by: Krzysztof Kozlowski --- arch/arm/mach-exynos/exynos.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c index f4b6c93a7fd0..865dcc4c3181 100644 --- a/arch/arm/mach-exynos/exynos.c +++ b/arch/arm/mach-exynos/exynos.c @@ -190,8 +190,6 @@ static void __init exynos_dt_fixup(void) } DT_MACHINE_START(EXYNOS_DT, "SAMSUNG EXYNOS (Flattened Device Tree)") - /* Maintainer: Thomas Abraham */ - /* Maintainer: Kukjin Kim */ .l2c_aux_val = 0x3c400001, .l2c_aux_mask = 0xc20fffff, .smp = smp_ops(exynos_smp_ops), From cd4806911cee3901bc2b5eb95603cf1958720b57 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Tue, 24 Jul 2018 18:48:14 +0200 Subject: [PATCH 109/112] ARM: exynos: Clear global variable on init error path For most of Exynos SoCs, Power Management Unit (PMU) address space is mapped into global variable 'pmu_base_addr' very early when initializing PMU interrupt controller. A lot of other machine code depends on it so when doing iounmap() on this address, clear the global as well to avoid usage of invalid value (pointing to unmapped memory region). Properly mapped PMU address space is a requirement for all other machine code so this fix is purely theoretical. Boot will fail immediately in many other places after following this error path. Signed-off-by: Krzysztof Kozlowski --- arch/arm/mach-exynos/suspend.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-exynos/suspend.c b/arch/arm/mach-exynos/suspend.c index d3db306a5a70..941b0ffd9806 100644 --- a/arch/arm/mach-exynos/suspend.c +++ b/arch/arm/mach-exynos/suspend.c @@ -203,6 +203,7 @@ static int __init exynos_pmu_irq_init(struct device_node *node, NULL); if (!domain) { iounmap(pmu_base_addr); + pmu_base_addr = NULL; return -ENOMEM; } From f61513f724001e7c51b83482496c23018814d88f Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Thu, 19 Jul 2018 06:50:05 +0900 Subject: [PATCH 110/112] ARM: uniphier: remove empty Makefile arch/arm/mach-uniphier/Makefile has been unused for a long time. Signed-off-by: Masahiro Yamada Signed-off-by: Olof Johansson --- arch/arm/Makefile | 1 - arch/arm/mach-uniphier/Makefile | 0 2 files changed, 1 deletion(-) delete mode 100644 arch/arm/mach-uniphier/Makefile diff --git a/arch/arm/Makefile b/arch/arm/Makefile index fc26c3d7b9b6..2ff19d4635ad 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -222,7 +222,6 @@ machine-$(CONFIG_ARCH_TANGO) += tango machine-$(CONFIG_ARCH_TEGRA) += tegra machine-$(CONFIG_ARCH_U300) += u300 machine-$(CONFIG_ARCH_U8500) += ux500 -machine-$(CONFIG_ARCH_UNIPHIER) += uniphier machine-$(CONFIG_ARCH_VERSATILE) += versatile machine-$(CONFIG_ARCH_VEXPRESS) += vexpress machine-$(CONFIG_ARCH_VT8500) += vt8500 diff --git a/arch/arm/mach-uniphier/Makefile b/arch/arm/mach-uniphier/Makefile deleted file mode 100644 index e69de29bb2d1..000000000000 From ab6ab445b9353a06df16e40506cf91fd437a4ddc Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Mon, 25 Jun 2018 12:34:45 +0900 Subject: [PATCH 111/112] arm64: uniphier: select RESET_CONTROLLER The UniPhier platform highly relies on the reset controller. Select RESET_CONTROLLER to enable it forcibly. Signed-off-by: Masahiro Yamada Signed-off-by: Olof Johansson --- arch/arm64/Kconfig.platforms | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms index d5aeac351fc3..f34cd1b42d69 100644 --- a/arch/arm64/Kconfig.platforms +++ b/arch/arm64/Kconfig.platforms @@ -261,6 +261,7 @@ config ARCH_UNIPHIER bool "Socionext UniPhier SoC Family" select ARCH_HAS_RESET_CONTROLLER select PINCTRL + select RESET_CONTROLLER help This enables support for Socionext UniPhier SoC family. From f0fc40aff6fee100ffbed8328a0df88f8aa75fce Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Mon, 25 Jun 2018 12:34:44 +0900 Subject: [PATCH 112/112] ARM: uniphier: select RESET_CONTROLLER The UniPhier platform highly relies on the reset controller. Select RESET_CONTROLLER to enable it forcibly. Signed-off-by: Masahiro Yamada Signed-off-by: Olof Johansson --- arch/arm/mach-uniphier/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-uniphier/Kconfig b/arch/arm/mach-uniphier/Kconfig index 779235a9147d..e661d2626675 100644 --- a/arch/arm/mach-uniphier/Kconfig +++ b/arch/arm/mach-uniphier/Kconfig @@ -9,6 +9,7 @@ config ARCH_UNIPHIER select HAVE_ARM_SCU select HAVE_ARM_TWD if SMP select PINCTRL + select RESET_CONTROLLER help Support for UniPhier SoC family developed by Socionext Inc. (formerly, System LSI Business Division of Panasonic Corporation)