pinctrl: Add SX150X GPIO Extender Pinctrl Driver
Since the I2C sx150x GPIO expander driver uses platform_data to manage
the pins configurations, rewrite the driver as a pinctrl driver using
pinconf to get/set pin configurations from DT or debugfs.
The pinctrl driver is functionnally equivalent as the gpio-only driver
and can use DT for pinconf. The platform_data confirmation is dropped.
This patchset removed the gpio-only driver and selects the Pinctrl driver
config instead. This patchset also migrates the gpio dt-bindings to pinctrl
and add the pinctrl optional properties.
The driver was tested with a SX1509 device on a BeagleBone black with
interrupt support and on an X86_64 machine over an I2C to USB converter.
This is a fixed version that builds and runs on non-OF platforms and on
arm based OF. The GPIO version is removed and the bindings are also moved
to the pinctrl bindings.
Changes since v2
- rebased on v4.9-rc1
- removed MODULE_DEVICE_TABLE as in upstream bb411e771b
("gpio: sx150x: fix implicit assumption module.h is present")
Changes since v1
- Fix Kconfig descriptions on pinctrl and gpio
- Fix Kconfig dependency
- Remove oscio support for non-789 devices
- correct typo in dt bindings
- remove probe reset for non-789 devices
Changes since RFC
- Put #ifdef CONFIG_OF/CONFIG_OF_GPIO to remove OF code for non-of platforms
- No more rely on OF_GPIO config
- Moved and enhanced bindings to pinctrl bindings
- Removed gpio-sx150x.c
- Temporary select PINCTRL_SX150X when GPIO_SX150X
- Temporary mark GPIO_SX150X as deprecated
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Peter Rosin <peda@axentia.se>
Acked-by: Rob Herring <robh@kernel.org>
ested-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
hifive-unleashed-5.1
Neil Armstrong
Linus Walleij
parent
07d9a38068
commit
9e80f9064e
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@ -1,41 +0,0 @@
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SEMTECH SX150x GPIO expander bindings
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Required properties:
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- compatible: should be "semtech,sx1506q",
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"semtech,sx1508q",
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"semtech,sx1509q",
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"semtech,sx1502q".
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- reg: The I2C slave address for this device.
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- interrupt-parent: phandle of the parent interrupt controller.
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- interrupts: Interrupt specifier for the controllers interrupt.
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- #gpio-cells: Should be 2. The first cell is the GPIO number and the
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second cell is used to specify optional parameters:
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bit 0: polarity (0: normal, 1: inverted)
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- gpio-controller: Marks the device as a GPIO controller.
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- interrupt-controller: Marks the device as a interrupt controller.
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The GPIO expander can optionally be used as an interrupt controller, in
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which case it uses the default two cell specifier as described in
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Documentation/devicetree/bindings/interrupt-controller/interrupts.txt.
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Example:
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i2c_gpio_expander@20{
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#gpio-cells = <2>;
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#interrupt-cells = <2>;
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compatible = "semtech,sx1506q";
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reg = <0x20>;
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interrupt-parent = <&gpio_1>;
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interrupts = <16 0>;
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gpio-controller;
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interrupt-controller;
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};
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@ -0,0 +1,69 @@
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SEMTECH SX150x GPIO expander bindings
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Please refer to pinctrl-bindings.txt, ../gpio/gpio.txt, and
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../interrupt-controller/interrupts.txt for generic information regarding
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pin controller, GPIO, and interrupt bindings.
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Required properties:
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- compatible: should be one of :
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"semtech,sx1506q",
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"semtech,sx1508q",
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"semtech,sx1509q",
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"semtech,sx1502q".
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- reg: The I2C slave address for this device.
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- #gpio-cells: Should be 2. The first cell is the GPIO number and the
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second cell is used to specify optional parameters:
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bit 0: polarity (0: normal, 1: inverted)
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- gpio-controller: Marks the device as a GPIO controller.
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Optional properties :
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- interrupt-parent: phandle of the parent interrupt controller.
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- interrupts: Interrupt specifier for the controllers interrupt.
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- interrupt-controller: Marks the device as a interrupt controller.
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- semtech,probe-reset: Will trigger a reset of the GPIO expander on probe,
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only for sx1508q and sx1509q
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The GPIO expander can optionally be used as an interrupt controller, in
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which case it uses the default two cell specifier.
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Required properties for pin configuration sub-nodes:
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- pins: List of pins to which the configuration applies.
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Optional properties for pin configuration sub-nodes:
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----------------------------------------------------
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- bias-disable: disable any pin bias, except the OSCIO pin
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- bias-pull-up: pull up the pin, except the OSCIO pin
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- bias-pull-down: pull down the pin, except the OSCIO pin
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- bias-pull-pin-default: use pin-default pull state, except the OSCIO pin
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- drive-push-pull: drive actively high and low
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- drive-open-drain: drive with open drain only for sx1508q and sx1509q and except the OSCIO pin
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- output-low: set the pin to output mode with low level
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- output-high: set the pin to output mode with high level
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Example:
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i2c0gpio-expander@20{
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#gpio-cells = <2>;
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#interrupt-cells = <2>;
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compatible = "semtech,sx1506q";
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reg = <0x20>;
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interrupt-parent = <&gpio_1>;
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interrupts = <16 0>;
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gpio-controller;
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interrupt-controller;
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pinctrl-names = "default";
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pinctrl-0 = <&gpio1_cfg_pins>;
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gpio1_cfg_pins: gpio1-cfg {
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pins = "gpio1";
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bias-pull-up;
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};
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};
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@ -781,16 +781,13 @@ config GPIO_PCF857X
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platform-neutral GPIO calls.
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config GPIO_SX150X
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bool "Semtech SX150x I2C GPIO expander"
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depends on I2C=y
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select GPIOLIB_IRQCHIP
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bool "Semtech SX150x I2C GPIO expander (deprecated)"
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depends on PINCTRL && I2C=y
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select PINCTRL_SX150X
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default n
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help
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Say yes here to provide support for Semtech SX150-series I2C
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GPIO expanders. Compatible models include:
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8 bits: sx1508q
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16 bits: sx1509q
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Say yes here to provide support for Semtech SX150x-series I2C
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GPIO expanders. The GPIO driver was replaced by a Pinctrl version.
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config GPIO_TPIC2810
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tristate "TPIC2810 8-Bit I2C GPO expander"
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@ -102,7 +102,6 @@ obj-$(CONFIG_GPIO_SPEAR_SPICS) += gpio-spear-spics.o
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obj-$(CONFIG_GPIO_STA2X11) += gpio-sta2x11.o
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obj-$(CONFIG_GPIO_STMPE) += gpio-stmpe.o
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obj-$(CONFIG_GPIO_STP_XWAY) += gpio-stp-xway.o
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obj-$(CONFIG_GPIO_SX150X) += gpio-sx150x.o
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obj-$(CONFIG_GPIO_SYSCON) += gpio-syscon.o
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obj-$(CONFIG_GPIO_TB10X) += gpio-tb10x.o
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obj-$(CONFIG_GPIO_TC3589X) += gpio-tc3589x.o
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@ -1,792 +0,0 @@
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/* Copyright (c) 2010, Code Aurora Forum. All rights reserved.
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*
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* Driver for Semtech SX150X I2C GPIO Expanders
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*
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* Author: Gregory Bean <gbean@codeaurora.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
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* 02110-1301, USA.
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*/
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#include <linux/gpio.h>
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#include <linux/i2c.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/mutex.h>
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#include <linux/slab.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/of_irq.h>
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#include <linux/of_gpio.h>
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#include <linux/of_device.h>
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#define NO_UPDATE_PENDING -1
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/* The chip models of sx150x */
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#define SX150X_123 0
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#define SX150X_456 1
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#define SX150X_789 2
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struct sx150x_123_pri {
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u8 reg_pld_mode;
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u8 reg_pld_table0;
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u8 reg_pld_table1;
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u8 reg_pld_table2;
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u8 reg_pld_table3;
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u8 reg_pld_table4;
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u8 reg_advance;
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};
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struct sx150x_456_pri {
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u8 reg_pld_mode;
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u8 reg_pld_table0;
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u8 reg_pld_table1;
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u8 reg_pld_table2;
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u8 reg_pld_table3;
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u8 reg_pld_table4;
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u8 reg_advance;
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};
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struct sx150x_789_pri {
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u8 reg_drain;
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u8 reg_polarity;
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u8 reg_clock;
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u8 reg_misc;
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u8 reg_reset;
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u8 ngpios;
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};
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struct sx150x_device_data {
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u8 model;
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u8 reg_pullup;
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u8 reg_pulldn;
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u8 reg_dir;
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u8 reg_data;
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u8 reg_irq_mask;
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u8 reg_irq_src;
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u8 reg_sense;
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u8 ngpios;
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union {
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struct sx150x_123_pri x123;
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struct sx150x_456_pri x456;
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struct sx150x_789_pri x789;
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} pri;
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};
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/**
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* struct sx150x_platform_data - config data for SX150x driver
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* @gpio_base: The index number of the first GPIO assigned to this
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* GPIO expander. The expander will create a block of
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* consecutively numbered gpios beginning at the given base,
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* with the size of the block depending on the model of the
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* expander chip.
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* @oscio_is_gpo: If set to true, the driver will configure OSCIO as a GPO
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* instead of as an oscillator, increasing the size of the
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* GP(I)O pool created by this expander by one. The
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* output-only GPO pin will be added at the end of the block.
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* @io_pullup_ena: A bit-mask which enables or disables the pull-up resistor
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* for each IO line in the expander. Setting the bit at
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* position n will enable the pull-up for the IO at
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* the corresponding offset. For chips with fewer than
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* 16 IO pins, high-end bits are ignored.
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* @io_pulldn_ena: A bit-mask which enables-or disables the pull-down
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* resistor for each IO line in the expander. Setting the
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* bit at position n will enable the pull-down for the IO at
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* the corresponding offset. For chips with fewer than
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* 16 IO pins, high-end bits are ignored.
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* @io_polarity: A bit-mask which enables polarity inversion for each IO line
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* in the expander. Setting the bit at position n inverts
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* the polarity of that IO line, while clearing it results
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* in normal polarity. For chips with fewer than 16 IO pins,
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* high-end bits are ignored.
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* @irq_summary: The 'summary IRQ' line to which the GPIO expander's INT line
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* is connected, via which it reports interrupt events
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* across all GPIO lines. This must be a real,
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* pre-existing IRQ line.
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* Setting this value < 0 disables the irq_chip functionality
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* of the driver.
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* @irq_base: The first 'virtual IRQ' line at which our block of GPIO-based
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* IRQ lines will appear. Similarly to gpio_base, the expander
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* will create a block of irqs beginning at this number.
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* This value is ignored if irq_summary is < 0.
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* @reset_during_probe: If set to true, the driver will trigger a full
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* reset of the chip at the beginning of the probe
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* in order to place it in a known state.
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*/
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struct sx150x_platform_data {
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unsigned gpio_base;
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bool oscio_is_gpo;
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u16 io_pullup_ena;
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u16 io_pulldn_ena;
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u16 io_polarity;
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int irq_summary;
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unsigned irq_base;
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bool reset_during_probe;
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};
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struct sx150x_chip {
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struct gpio_chip gpio_chip;
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struct i2c_client *client;
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const struct sx150x_device_data *dev_cfg;
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int irq_summary;
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int irq_base;
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int irq_update;
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u32 irq_sense;
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u32 irq_masked;
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u32 dev_sense;
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u32 dev_masked;
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struct irq_chip irq_chip;
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struct mutex lock;
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};
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static const struct sx150x_device_data sx150x_devices[] = {
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[0] = { /* sx1508q */
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.model = SX150X_789,
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.reg_pullup = 0x03,
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.reg_pulldn = 0x04,
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.reg_dir = 0x07,
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.reg_data = 0x08,
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.reg_irq_mask = 0x09,
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.reg_irq_src = 0x0c,
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.reg_sense = 0x0b,
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.pri.x789 = {
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.reg_drain = 0x05,
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.reg_polarity = 0x06,
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.reg_clock = 0x0f,
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.reg_misc = 0x10,
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.reg_reset = 0x7d,
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},
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.ngpios = 8,
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},
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[1] = { /* sx1509q */
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.model = SX150X_789,
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.reg_pullup = 0x07,
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.reg_pulldn = 0x09,
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.reg_dir = 0x0f,
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.reg_data = 0x11,
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.reg_irq_mask = 0x13,
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.reg_irq_src = 0x19,
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.reg_sense = 0x17,
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.pri.x789 = {
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.reg_drain = 0x0b,
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.reg_polarity = 0x0d,
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.reg_clock = 0x1e,
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.reg_misc = 0x1f,
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.reg_reset = 0x7d,
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},
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.ngpios = 16
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},
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[2] = { /* sx1506q */
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.model = SX150X_456,
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.reg_pullup = 0x05,
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.reg_pulldn = 0x07,
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.reg_dir = 0x03,
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.reg_data = 0x01,
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.reg_irq_mask = 0x09,
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.reg_irq_src = 0x0f,
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.reg_sense = 0x0d,
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.pri.x456 = {
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.reg_pld_mode = 0x21,
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.reg_pld_table0 = 0x23,
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.reg_pld_table1 = 0x25,
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.reg_pld_table2 = 0x27,
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.reg_pld_table3 = 0x29,
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.reg_pld_table4 = 0x2b,
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.reg_advance = 0xad,
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},
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.ngpios = 16
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},
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[3] = { /* sx1502q */
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.model = SX150X_123,
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.reg_pullup = 0x02,
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.reg_pulldn = 0x03,
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.reg_dir = 0x01,
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.reg_data = 0x00,
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.reg_irq_mask = 0x05,
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.reg_irq_src = 0x08,
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.reg_sense = 0x07,
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.pri.x123 = {
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.reg_pld_mode = 0x10,
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.reg_pld_table0 = 0x11,
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.reg_pld_table1 = 0x12,
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.reg_pld_table2 = 0x13,
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.reg_pld_table3 = 0x14,
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.reg_pld_table4 = 0x15,
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.reg_advance = 0xad,
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},
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.ngpios = 8,
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},
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};
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static const struct i2c_device_id sx150x_id[] = {
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{"sx1508q", 0},
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{"sx1509q", 1},
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{"sx1506q", 2},
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{"sx1502q", 3},
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{}
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};
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static const struct of_device_id sx150x_of_match[] = {
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{ .compatible = "semtech,sx1508q" },
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{ .compatible = "semtech,sx1509q" },
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{ .compatible = "semtech,sx1506q" },
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{ .compatible = "semtech,sx1502q" },
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{},
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};
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static s32 sx150x_i2c_write(struct i2c_client *client, u8 reg, u8 val)
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{
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s32 err = i2c_smbus_write_byte_data(client, reg, val);
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if (err < 0)
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dev_warn(&client->dev,
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"i2c write fail: can't write %02x to %02x: %d\n",
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val, reg, err);
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return err;
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}
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static s32 sx150x_i2c_read(struct i2c_client *client, u8 reg, u8 *val)
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{
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s32 err = i2c_smbus_read_byte_data(client, reg);
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if (err >= 0)
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*val = err;
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else
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dev_warn(&client->dev,
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"i2c read fail: can't read from %02x: %d\n",
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reg, err);
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return err;
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}
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static inline bool offset_is_oscio(struct sx150x_chip *chip, unsigned offset)
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{
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return (chip->dev_cfg->ngpios == offset);
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}
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/*
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* These utility functions solve the common problem of locating and setting
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* configuration bits. Configuration bits are grouped into registers
|
||||
* whose indexes increase downwards. For example, with eight-bit registers,
|
||||
* sixteen gpios would have their config bits grouped in the following order:
|
||||
* REGISTER N-1 [ f e d c b a 9 8 ]
|
||||
* N [ 7 6 5 4 3 2 1 0 ]
|
||||
*
|
||||
* For multi-bit configurations, the pattern gets wider:
|
||||
* REGISTER N-3 [ f f e e d d c c ]
|
||||
* N-2 [ b b a a 9 9 8 8 ]
|
||||
* N-1 [ 7 7 6 6 5 5 4 4 ]
|
||||
* N [ 3 3 2 2 1 1 0 0 ]
|
||||
*
|
||||
* Given the address of the starting register 'N', the index of the gpio
|
||||
* whose configuration we seek to change, and the width in bits of that
|
||||
* configuration, these functions allow us to locate the correct
|
||||
* register and mask the correct bits.
|
||||
*/
|
||||
static inline void sx150x_find_cfg(u8 offset, u8 width,
|
||||
u8 *reg, u8 *mask, u8 *shift)
|
||||
{
|
||||
*reg -= offset * width / 8;
|
||||
*mask = (1 << width) - 1;
|
||||
*shift = (offset * width) % 8;
|
||||
*mask <<= *shift;
|
||||
}
|
||||
|
||||
static s32 sx150x_write_cfg(struct sx150x_chip *chip,
|
||||
u8 offset, u8 width, u8 reg, u8 val)
|
||||
{
|
||||
u8 mask;
|
||||
u8 data;
|
||||
u8 shift;
|
||||
s32 err;
|
||||
|
||||
sx150x_find_cfg(offset, width, ®, &mask, &shift);
|
||||
err = sx150x_i2c_read(chip->client, reg, &data);
|
||||
if (err < 0)
|
||||
return err;
|
||||
|
||||
data &= ~mask;
|
||||
data |= (val << shift) & mask;
|
||||
return sx150x_i2c_write(chip->client, reg, data);
|
||||
}
|
||||
|
||||
static int sx150x_get_io(struct sx150x_chip *chip, unsigned offset)
|
||||
{
|
||||
u8 reg = chip->dev_cfg->reg_data;
|
||||
u8 mask;
|
||||
u8 data;
|
||||
u8 shift;
|
||||
s32 err;
|
||||
|
||||
sx150x_find_cfg(offset, 1, ®, &mask, &shift);
|
||||
err = sx150x_i2c_read(chip->client, reg, &data);
|
||||
if (err >= 0)
|
||||
err = (data & mask) != 0 ? 1 : 0;
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
static void sx150x_set_oscio(struct sx150x_chip *chip, int val)
|
||||
{
|
||||
sx150x_i2c_write(chip->client,
|
||||
chip->dev_cfg->pri.x789.reg_clock,
|
||||
(val ? 0x1f : 0x10));
|
||||
}
|
||||
|
||||
static void sx150x_set_io(struct sx150x_chip *chip, unsigned offset, int val)
|
||||
{
|
||||
sx150x_write_cfg(chip,
|
||||
offset,
|
||||
1,
|
||||
chip->dev_cfg->reg_data,
|
||||
(val ? 1 : 0));
|
||||
}
|
||||
|
||||
static int sx150x_io_input(struct sx150x_chip *chip, unsigned offset)
|
||||
{
|
||||
return sx150x_write_cfg(chip,
|
||||
offset,
|
||||
1,
|
||||
chip->dev_cfg->reg_dir,
|
||||
1);
|
||||
}
|
||||
|
||||
static int sx150x_io_output(struct sx150x_chip *chip, unsigned offset, int val)
|
||||
{
|
||||
int err;
|
||||
|
||||
err = sx150x_write_cfg(chip,
|
||||
offset,
|
||||
1,
|
||||
chip->dev_cfg->reg_data,
|
||||
(val ? 1 : 0));
|
||||
if (err >= 0)
|
||||
err = sx150x_write_cfg(chip,
|
||||
offset,
|
||||
1,
|
||||
chip->dev_cfg->reg_dir,
|
||||
0);
|
||||
return err;
|
||||
}
|
||||
|
||||
static int sx150x_gpio_get(struct gpio_chip *gc, unsigned offset)
|
||||
{
|
||||
struct sx150x_chip *chip = gpiochip_get_data(gc);
|
||||
int status = -EINVAL;
|
||||
|
||||
if (!offset_is_oscio(chip, offset)) {
|
||||
mutex_lock(&chip->lock);
|
||||
status = sx150x_get_io(chip, offset);
|
||||
mutex_unlock(&chip->lock);
|
||||
}
|
||||
|
||||
return (status < 0) ? status : !!status;
|
||||
}
|
||||
|
||||
static void sx150x_gpio_set(struct gpio_chip *gc, unsigned offset, int val)
|
||||
{
|
||||
struct sx150x_chip *chip = gpiochip_get_data(gc);
|
||||
|
||||
mutex_lock(&chip->lock);
|
||||
if (offset_is_oscio(chip, offset))
|
||||
sx150x_set_oscio(chip, val);
|
||||
else
|
||||
sx150x_set_io(chip, offset, val);
|
||||
mutex_unlock(&chip->lock);
|
||||
}
|
||||
|
||||
static int sx150x_gpio_set_single_ended(struct gpio_chip *gc,
|
||||
unsigned offset,
|
||||
enum single_ended_mode mode)
|
||||
{
|
||||
struct sx150x_chip *chip = gpiochip_get_data(gc);
|
||||
|
||||
/* On the SX160X 789 we can set open drain */
|
||||
if (chip->dev_cfg->model != SX150X_789)
|
||||
return -ENOTSUPP;
|
||||
|
||||
if (mode == LINE_MODE_PUSH_PULL)
|
||||
return sx150x_write_cfg(chip,
|
||||
offset,
|
||||
1,
|
||||
chip->dev_cfg->pri.x789.reg_drain,
|
||||
0);
|
||||
|
||||
if (mode == LINE_MODE_OPEN_DRAIN)
|
||||
return sx150x_write_cfg(chip,
|
||||
offset,
|
||||
1,
|
||||
chip->dev_cfg->pri.x789.reg_drain,
|
||||
1);
|
||||
return -ENOTSUPP;
|
||||
}
|
||||
|
||||
static int sx150x_gpio_direction_input(struct gpio_chip *gc, unsigned offset)
|
||||
{
|
||||
struct sx150x_chip *chip = gpiochip_get_data(gc);
|
||||
int status = -EINVAL;
|
||||
|
||||
if (!offset_is_oscio(chip, offset)) {
|
||||
mutex_lock(&chip->lock);
|
||||
status = sx150x_io_input(chip, offset);
|
||||
mutex_unlock(&chip->lock);
|
||||
}
|
||||
return status;
|
||||
}
|
||||
|
||||
static int sx150x_gpio_direction_output(struct gpio_chip *gc,
|
||||
unsigned offset,
|
||||
int val)
|
||||
{
|
||||
struct sx150x_chip *chip = gpiochip_get_data(gc);
|
||||
int status = 0;
|
||||
|
||||
if (!offset_is_oscio(chip, offset)) {
|
||||
mutex_lock(&chip->lock);
|
||||
status = sx150x_io_output(chip, offset, val);
|
||||
mutex_unlock(&chip->lock);
|
||||
}
|
||||
return status;
|
||||
}
|
||||
|
||||
static void sx150x_irq_mask(struct irq_data *d)
|
||||
{
|
||||
struct sx150x_chip *chip = gpiochip_get_data(irq_data_get_irq_chip_data(d));
|
||||
unsigned n = d->hwirq;
|
||||
|
||||
chip->irq_masked |= (1 << n);
|
||||
chip->irq_update = n;
|
||||
}
|
||||
|
||||
static void sx150x_irq_unmask(struct irq_data *d)
|
||||
{
|
||||
struct sx150x_chip *chip = gpiochip_get_data(irq_data_get_irq_chip_data(d));
|
||||
unsigned n = d->hwirq;
|
||||
|
||||
chip->irq_masked &= ~(1 << n);
|
||||
chip->irq_update = n;
|
||||
}
|
||||
|
||||
static int sx150x_irq_set_type(struct irq_data *d, unsigned int flow_type)
|
||||
{
|
||||
struct sx150x_chip *chip = gpiochip_get_data(irq_data_get_irq_chip_data(d));
|
||||
unsigned n, val = 0;
|
||||
|
||||
if (flow_type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW))
|
||||
return -EINVAL;
|
||||
|
||||
n = d->hwirq;
|
||||
|
||||
if (flow_type & IRQ_TYPE_EDGE_RISING)
|
||||
val |= 0x1;
|
||||
if (flow_type & IRQ_TYPE_EDGE_FALLING)
|
||||
val |= 0x2;
|
||||
|
||||
chip->irq_sense &= ~(3UL << (n * 2));
|
||||
chip->irq_sense |= val << (n * 2);
|
||||
chip->irq_update = n;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static irqreturn_t sx150x_irq_thread_fn(int irq, void *dev_id)
|
||||
{
|
||||
struct sx150x_chip *chip = (struct sx150x_chip *)dev_id;
|
||||
unsigned nhandled = 0;
|
||||
unsigned sub_irq;
|
||||
unsigned n;
|
||||
s32 err;
|
||||
u8 val;
|
||||
int i;
|
||||
|
||||
for (i = (chip->dev_cfg->ngpios / 8) - 1; i >= 0; --i) {
|
||||
err = sx150x_i2c_read(chip->client,
|
||||
chip->dev_cfg->reg_irq_src - i,
|
||||
&val);
|
||||
if (err < 0)
|
||||
continue;
|
||||
|
||||
sx150x_i2c_write(chip->client,
|
||||
chip->dev_cfg->reg_irq_src - i,
|
||||
val);
|
||||
for (n = 0; n < 8; ++n) {
|
||||
if (val & (1 << n)) {
|
||||
sub_irq = irq_find_mapping(
|
||||
chip->gpio_chip.irqdomain,
|
||||
(i * 8) + n);
|
||||
handle_nested_irq(sub_irq);
|
||||
++nhandled;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return (nhandled > 0 ? IRQ_HANDLED : IRQ_NONE);
|
||||
}
|
||||
|
||||
static void sx150x_irq_bus_lock(struct irq_data *d)
|
||||
{
|
||||
struct sx150x_chip *chip = gpiochip_get_data(irq_data_get_irq_chip_data(d));
|
||||
|
||||
mutex_lock(&chip->lock);
|
||||
}
|
||||
|
||||
static void sx150x_irq_bus_sync_unlock(struct irq_data *d)
|
||||
{
|
||||
struct sx150x_chip *chip = gpiochip_get_data(irq_data_get_irq_chip_data(d));
|
||||
unsigned n;
|
||||
|
||||
if (chip->irq_update == NO_UPDATE_PENDING)
|
||||
goto out;
|
||||
|
||||
n = chip->irq_update;
|
||||
chip->irq_update = NO_UPDATE_PENDING;
|
||||
|
||||
/* Avoid updates if nothing changed */
|
||||
if (chip->dev_sense == chip->irq_sense &&
|
||||
chip->dev_masked == chip->irq_masked)
|
||||
goto out;
|
||||
|
||||
chip->dev_sense = chip->irq_sense;
|
||||
chip->dev_masked = chip->irq_masked;
|
||||
|
||||
if (chip->irq_masked & (1 << n)) {
|
||||
sx150x_write_cfg(chip, n, 1, chip->dev_cfg->reg_irq_mask, 1);
|
||||
sx150x_write_cfg(chip, n, 2, chip->dev_cfg->reg_sense, 0);
|
||||
} else {
|
||||
sx150x_write_cfg(chip, n, 1, chip->dev_cfg->reg_irq_mask, 0);
|
||||
sx150x_write_cfg(chip, n, 2, chip->dev_cfg->reg_sense,
|
||||
chip->irq_sense >> (n * 2));
|
||||
}
|
||||
out:
|
||||
mutex_unlock(&chip->lock);
|
||||
}
|
||||
|
||||
static void sx150x_init_chip(struct sx150x_chip *chip,
|
||||
struct i2c_client *client,
|
||||
kernel_ulong_t driver_data,
|
||||
struct sx150x_platform_data *pdata)
|
||||
{
|
||||
mutex_init(&chip->lock);
|
||||
|
||||
chip->client = client;
|
||||
chip->dev_cfg = &sx150x_devices[driver_data];
|
||||
chip->gpio_chip.parent = &client->dev;
|
||||
chip->gpio_chip.label = client->name;
|
||||
chip->gpio_chip.direction_input = sx150x_gpio_direction_input;
|
||||
chip->gpio_chip.direction_output = sx150x_gpio_direction_output;
|
||||
chip->gpio_chip.get = sx150x_gpio_get;
|
||||
chip->gpio_chip.set = sx150x_gpio_set;
|
||||
chip->gpio_chip.set_single_ended = sx150x_gpio_set_single_ended;
|
||||
chip->gpio_chip.base = pdata->gpio_base;
|
||||
chip->gpio_chip.can_sleep = true;
|
||||
chip->gpio_chip.ngpio = chip->dev_cfg->ngpios;
|
||||
#ifdef CONFIG_OF_GPIO
|
||||
chip->gpio_chip.of_node = client->dev.of_node;
|
||||
chip->gpio_chip.of_gpio_n_cells = 2;
|
||||
#endif
|
||||
if (pdata->oscio_is_gpo)
|
||||
++chip->gpio_chip.ngpio;
|
||||
|
||||
chip->irq_chip.name = client->name;
|
||||
chip->irq_chip.irq_mask = sx150x_irq_mask;
|
||||
chip->irq_chip.irq_unmask = sx150x_irq_unmask;
|
||||
chip->irq_chip.irq_set_type = sx150x_irq_set_type;
|
||||
chip->irq_chip.irq_bus_lock = sx150x_irq_bus_lock;
|
||||
chip->irq_chip.irq_bus_sync_unlock = sx150x_irq_bus_sync_unlock;
|
||||
chip->irq_summary = -1;
|
||||
chip->irq_base = -1;
|
||||
chip->irq_masked = ~0;
|
||||
chip->irq_sense = 0;
|
||||
chip->dev_masked = ~0;
|
||||
chip->dev_sense = 0;
|
||||
chip->irq_update = NO_UPDATE_PENDING;
|
||||
}
|
||||
|
||||
static int sx150x_init_io(struct sx150x_chip *chip, u8 base, u16 cfg)
|
||||
{
|
||||
int err = 0;
|
||||
unsigned n;
|
||||
|
||||
for (n = 0; err >= 0 && n < (chip->dev_cfg->ngpios / 8); ++n)
|
||||
err = sx150x_i2c_write(chip->client, base - n, cfg >> (n * 8));
|
||||
return err;
|
||||
}
|
||||
|
||||
static int sx150x_reset(struct sx150x_chip *chip)
|
||||
{
|
||||
int err;
|
||||
|
||||
err = i2c_smbus_write_byte_data(chip->client,
|
||||
chip->dev_cfg->pri.x789.reg_reset,
|
||||
0x12);
|
||||
if (err < 0)
|
||||
return err;
|
||||
|
||||
err = i2c_smbus_write_byte_data(chip->client,
|
||||
chip->dev_cfg->pri.x789.reg_reset,
|
||||
0x34);
|
||||
return err;
|
||||
}
|
||||
|
||||
static int sx150x_init_hw(struct sx150x_chip *chip,
|
||||
struct sx150x_platform_data *pdata)
|
||||
{
|
||||
int err = 0;
|
||||
|
||||
if (pdata->reset_during_probe) {
|
||||
err = sx150x_reset(chip);
|
||||
if (err < 0)
|
||||
return err;
|
||||
}
|
||||
|
||||
if (chip->dev_cfg->model == SX150X_789)
|
||||
err = sx150x_i2c_write(chip->client,
|
||||
chip->dev_cfg->pri.x789.reg_misc,
|
||||
0x01);
|
||||
else if (chip->dev_cfg->model == SX150X_456)
|
||||
err = sx150x_i2c_write(chip->client,
|
||||
chip->dev_cfg->pri.x456.reg_advance,
|
||||
0x04);
|
||||
else
|
||||
err = sx150x_i2c_write(chip->client,
|
||||
chip->dev_cfg->pri.x123.reg_advance,
|
||||
0x00);
|
||||
if (err < 0)
|
||||
return err;
|
||||
|
||||
err = sx150x_init_io(chip, chip->dev_cfg->reg_pullup,
|
||||
pdata->io_pullup_ena);
|
||||
if (err < 0)
|
||||
return err;
|
||||
|
||||
err = sx150x_init_io(chip, chip->dev_cfg->reg_pulldn,
|
||||
pdata->io_pulldn_ena);
|
||||
if (err < 0)
|
||||
return err;
|
||||
|
||||
if (chip->dev_cfg->model == SX150X_789) {
|
||||
err = sx150x_init_io(chip,
|
||||
chip->dev_cfg->pri.x789.reg_polarity,
|
||||
pdata->io_polarity);
|
||||
if (err < 0)
|
||||
return err;
|
||||
} else if (chip->dev_cfg->model == SX150X_456) {
|
||||
/* Set all pins to work in normal mode */
|
||||
err = sx150x_init_io(chip,
|
||||
chip->dev_cfg->pri.x456.reg_pld_mode,
|
||||
0);
|
||||
if (err < 0)
|
||||
return err;
|
||||
} else {
|
||||
/* Set all pins to work in normal mode */
|
||||
err = sx150x_init_io(chip,
|
||||
chip->dev_cfg->pri.x123.reg_pld_mode,
|
||||
0);
|
||||
if (err < 0)
|
||||
return err;
|
||||
}
|
||||
|
||||
|
||||
if (pdata->oscio_is_gpo)
|
||||
sx150x_set_oscio(chip, 0);
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
static int sx150x_install_irq_chip(struct sx150x_chip *chip,
|
||||
int irq_summary,
|
||||
int irq_base)
|
||||
{
|
||||
int err;
|
||||
|
||||
chip->irq_summary = irq_summary;
|
||||
chip->irq_base = irq_base;
|
||||
|
||||
/* Add gpio chip to irq subsystem */
|
||||
err = gpiochip_irqchip_add(&chip->gpio_chip,
|
||||
&chip->irq_chip, chip->irq_base,
|
||||
handle_edge_irq, IRQ_TYPE_EDGE_BOTH);
|
||||
if (err) {
|
||||
dev_err(&chip->client->dev,
|
||||
"could not connect irqchip to gpiochip\n");
|
||||
return err;
|
||||
}
|
||||
|
||||
err = devm_request_threaded_irq(&chip->client->dev,
|
||||
irq_summary, NULL, sx150x_irq_thread_fn,
|
||||
IRQF_ONESHOT | IRQF_SHARED | IRQF_TRIGGER_FALLING,
|
||||
chip->irq_chip.name, chip);
|
||||
if (err < 0) {
|
||||
chip->irq_summary = -1;
|
||||
chip->irq_base = -1;
|
||||
}
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
static int sx150x_probe(struct i2c_client *client,
|
||||
const struct i2c_device_id *id)
|
||||
{
|
||||
static const u32 i2c_funcs = I2C_FUNC_SMBUS_BYTE_DATA |
|
||||
I2C_FUNC_SMBUS_WRITE_WORD_DATA;
|
||||
struct sx150x_platform_data *pdata;
|
||||
struct sx150x_chip *chip;
|
||||
int rc;
|
||||
|
||||
pdata = dev_get_platdata(&client->dev);
|
||||
if (!pdata)
|
||||
return -EINVAL;
|
||||
|
||||
if (!i2c_check_functionality(client->adapter, i2c_funcs))
|
||||
return -ENOSYS;
|
||||
|
||||
chip = devm_kzalloc(&client->dev,
|
||||
sizeof(struct sx150x_chip), GFP_KERNEL);
|
||||
if (!chip)
|
||||
return -ENOMEM;
|
||||
|
||||
sx150x_init_chip(chip, client, id->driver_data, pdata);
|
||||
rc = sx150x_init_hw(chip, pdata);
|
||||
if (rc < 0)
|
||||
return rc;
|
||||
|
||||
rc = devm_gpiochip_add_data(&client->dev, &chip->gpio_chip, chip);
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
if (pdata->irq_summary >= 0) {
|
||||
rc = sx150x_install_irq_chip(chip,
|
||||
pdata->irq_summary,
|
||||
pdata->irq_base);
|
||||
if (rc < 0)
|
||||
return rc;
|
||||
}
|
||||
|
||||
i2c_set_clientdata(client, chip);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct i2c_driver sx150x_driver = {
|
||||
.driver = {
|
||||
.name = "sx150x",
|
||||
.of_match_table = of_match_ptr(sx150x_of_match),
|
||||
},
|
||||
.probe = sx150x_probe,
|
||||
.id_table = sx150x_id,
|
||||
};
|
||||
|
||||
static int __init sx150x_init(void)
|
||||
{
|
||||
return i2c_add_driver(&sx150x_driver);
|
||||
}
|
||||
subsys_initcall(sx150x_init);
|
||||
|
|
@ -164,6 +164,20 @@ config PINCTRL_SIRF
|
|||
select GENERIC_PINCONF
|
||||
select GPIOLIB_IRQCHIP
|
||||
|
||||
config PINCTRL_SX150X
|
||||
bool "Semtech SX150x I2C GPIO expander pinctrl driver"
|
||||
depends on GPIOLIB && I2C=y
|
||||
select PINMUX
|
||||
select PINCONF
|
||||
select GENERIC_PINCONF
|
||||
select GPIOLIB_IRQCHIP
|
||||
help
|
||||
Say yes here to provide support for Semtech SX150x-series I2C
|
||||
GPIO expanders as pinctrl module.
|
||||
Compatible models include:
|
||||
- 8 bits: sx1508q, sx1502q
|
||||
- 16 bits: sx1509q, sx1506q
|
||||
|
||||
config PINCTRL_PISTACHIO
|
||||
def_bool y if MACH_PISTACHIO
|
||||
depends on GPIOLIB
|
||||
|
|
|
|||
|
|
@ -25,6 +25,7 @@ obj-$(CONFIG_PINCTRL_PISTACHIO) += pinctrl-pistachio.o
|
|||
obj-$(CONFIG_PINCTRL_ROCKCHIP) += pinctrl-rockchip.o
|
||||
obj-$(CONFIG_PINCTRL_SINGLE) += pinctrl-single.o
|
||||
obj-$(CONFIG_PINCTRL_SIRF) += sirf/
|
||||
obj-$(CONFIG_PINCTRL_SX150X) += pinctrl-sx150x.o
|
||||
obj-$(CONFIG_ARCH_TEGRA) += tegra/
|
||||
obj-$(CONFIG_PINCTRL_TZ1090) += pinctrl-tz1090.o
|
||||
obj-$(CONFIG_PINCTRL_TZ1090_PDC) += pinctrl-tz1090-pdc.o
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
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Reference in New Issue