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staging: rtl8192e: Remove unused defines 

Remove most of unused defines (excluding phyreg/hw registers).

Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
hifive-unleashed-5.1
Mateusz Kulikowski 2015-07-14 22:04:05 +02:00 committed by Greg Kroah-Hartman
parent 04ed5f3d4e
commit 9efe891d01
12 changed files with 0 additions and 128 deletions
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4
drivers/staging/rtl8192e/dot11d.h
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@ -79,7 +79,6 @@ static inline void cpMacAddr(unsigned char *des, unsigned char *src)
#define UPDATE_CIE_SRC(__pIeeeDev, __pTa) \
cpMacAddr(GET_DOT11D_INFO(__pIeeeDev)->CountryIeSrcAddr, __pTa)
#define CIE_WATCHDOG_TH 1
#define GET_CIE_WATCHDOG(__pIeeeDev) \
(GET_DOT11D_INFO(__pIeeeDev)->CountryIeWatchdog)
static inline void RESET_CIE_WATCHDOG(struct rtllib_device *__pIeeeDev)
@ -88,9 +87,6 @@ static inline void RESET_CIE_WATCHDOG(struct rtllib_device *__pIeeeDev)
}
#define UPDATE_CIE_WATCHDOG(__pIeeeDev) (++GET_CIE_WATCHDOG(__pIeeeDev))
#define IS_DOT11D_STATE_DONE(__pIeeeDev) \
(GET_DOT11D_INFO(__pIeeeDev)->State == DOT11D_STATE_DONE)
void dot11d_init(struct rtllib_device *dev);
void Dot11d_Channelmap(u8 channel_plan, struct rtllib_device *ieee);
void Dot11d_Reset(struct rtllib_device *dev);

46
drivers/staging/rtl8192e/rtl8192e/r8190P_def.h
View File

@ -26,8 +26,6 @@
#define MAX_SILENT_RESET_RX_SLOT_NUM 10
#define RX_MPDU_QUEUE 0
#define RX_CMD_QUEUE 1
enum rtl819x_loopback {
RTL819X_NO_LOOPBACK = 0,
@ -36,11 +34,6 @@ enum rtl819x_loopback {
RTL819X_CCK_LOOPBACK = 3,
};
#define RESET_DELAY_8185 20
#define RT_IBSS_INT_MASKS (IMR_BcnInt | IMR_BcnInt | IMR_TBDOK | IMR_TBDER)
#define DESC90_RATE1M 0x00
#define DESC90_RATE2M 0x01
#define DESC90_RATE5_5M 0x02
@ -74,17 +67,6 @@ enum rtl819x_loopback {
#define SHORT_SLOT_TIME 9
#define NON_SHORT_SLOT_TIME 20
#define MAX_LINES_HWCONFIG_TXT 1000
#define MAX_BYTES_LINE_HWCONFIG_TXT 128
#define SW_THREE_WIRE 0
#define HW_THREE_WIRE 2
#define BT_DEMO_BOARD 0
#define BT_QA_BOARD 1
#define BT_FPGA 2
#define RX_SMOOTH 20
#define QSLT_BK 0x1
@ -96,25 +78,14 @@ enum rtl819x_loopback {
#define QSLT_MGNT 0x12
#define QSLT_CMD 0x13
#define NUM_OF_FIRMWARE_QUEUE 10
#define NUM_OF_PAGES_IN_FW 0x100
#define NUM_OF_PAGE_IN_FW_QUEUE_BK 0x007
#define NUM_OF_PAGE_IN_FW_QUEUE_BE 0x0aa
#define NUM_OF_PAGE_IN_FW_QUEUE_VI 0x024
#define NUM_OF_PAGE_IN_FW_QUEUE_VO 0x007
#define NUM_OF_PAGE_IN_FW_QUEUE_HCCA 0
#define NUM_OF_PAGE_IN_FW_QUEUE_CMD 0x2
#define NUM_OF_PAGE_IN_FW_QUEUE_MGNT 0x10
#define NUM_OF_PAGE_IN_FW_QUEUE_HIGH 0
#define NUM_OF_PAGE_IN_FW_QUEUE_BCN 0x4
#define NUM_OF_PAGE_IN_FW_QUEUE_PUB 0xd
#define NUM_OF_PAGE_IN_FW_QUEUE_BK_DTM 0x026
#define NUM_OF_PAGE_IN_FW_QUEUE_BE_DTM 0x048
#define NUM_OF_PAGE_IN_FW_QUEUE_VI_DTM 0x048
#define NUM_OF_PAGE_IN_FW_QUEUE_VO_DTM 0x026
#define NUM_OF_PAGE_IN_FW_QUEUE_PUB_DTM 0x00
#define APPLIED_RESERVED_QUEUE_IN_FW 0x80000000
#define RSVD_FW_QUEUE_PAGE_BK_SHIFT 0x00
#define RSVD_FW_QUEUE_PAGE_BE_SHIFT 0x08
@ -197,23 +168,6 @@ struct tx_fwinfo_8190pci {
};
#define TX_DESC_SIZE 32
#define TX_DESC_CMD_SIZE 32
#define TX_STATUS_DESC_SIZE 32
#define TX_FWINFO_SIZE 8
#define RX_DESC_SIZE 16
#define RX_STATUS_DESC_SIZE 16
#define RX_DRIVER_INFO_SIZE 8
struct log_int_8190 {
u32 nIMR_COMDOK;
u32 nIMR_MGNTDOK;

2
drivers/staging/rtl8192e/rtl8192e/r8192E_firmware.h
View File

@ -19,8 +19,6 @@
#ifndef __INC_FIRMWARE_H
#define __INC_FIRMWARE_H
#define RTL8190_CPU_START_OFFSET 0x80
#define GET_COMMAND_PACKET_FRAG_THRESHOLD(v) (4*(v/4) - 8)
#define RTL8192E_BOOT_IMG_FW "RTL8192E/boot.img"

3
drivers/staging/rtl8192e/rtl8192e/rtl_dm.c
View File

@ -58,9 +58,6 @@ static u32 edca_setting_UL[HT_IOT_PEER_MAX] = {
0x5e4332
};
#define RTK_UL_EDCA 0xa44f
#define RTK_DL_EDCA 0x5e4322
const u32 dm_tx_bb_gain[TxBBGainTableLength] = {
0x7f8001fe, /* 12 dB */
0x788001e2, /* 11 dB */

19
drivers/staging/rtl8192e/rtl8192e/rtl_dm.h
View File

@ -27,26 +27,17 @@
#define DM_DIG_THRESH_HIGH 40
#define DM_DIG_THRESH_LOW 35
#define DM_FALSEALARM_THRESH_LOW 40
#define DM_FALSEALARM_THRESH_HIGH 1000
#define DM_DIG_HIGH_PWR_THRESH_HIGH 75
#define DM_DIG_HIGH_PWR_THRESH_LOW 70
#define BW_AUTO_SWITCH_HIGH_LOW 25
#define BW_AUTO_SWITCH_LOW_HIGH 30
#define DM_check_fsync_time_interval 500
#define DM_DIG_BACKOFF 12
#define DM_DIG_MAX 0x36
#define DM_DIG_MIN 0x1c
#define DM_DIG_MIN_Netcore 0x12
#define DM_DIG_BACKOFF_MAX 12
#define DM_DIG_BACKOFF_MIN -4
#define RxPathSelection_SS_TH_low 30
#define RxPathSelection_diff_TH 18
@ -55,8 +46,6 @@
#define RateAdaptiveTH_Low_40M 10
#define VeryLowRSSI 15
#define CTSToSelfTHVal 35
#define WAIotTHVal 25
#define E_FOR_TX_POWER_TRACK 300
@ -70,14 +59,6 @@
#define Tx_Retry_Count_Reg 0x1ac
#define RegC38_TH 20
#define TX_POWER_NEAR_FIELD_THRESH_LVL2 74
#define TX_POWER_NEAR_FIELD_THRESH_LVL1 67
#define TxHighPwrLevel_Normal 0
#define TxHighPwrLevel_Level1 1
#define TxHighPwrLevel_Level2 2
#define DM_Type_ByFW 0
#define DM_Type_ByDriver 1
/*--------------------------Define Parameters-------------------------------*/

1
drivers/staging/rtl8192e/rtl8192e/rtl_ps.h
View File

@ -30,7 +30,6 @@
struct net_device;
#define RT_CHECK_FOR_HANG_PERIOD 2
#define INIT_DEFAULT_CHAN 1
void rtl8192_hw_wakeup(struct net_device *dev);
void rtl8192_hw_to_sleep(struct net_device *dev, u64 time);

3
drivers/staging/rtl8192e/rtl8192e/rtl_wx.c
View File

@ -729,9 +729,6 @@ static int r8192_wx_set_enc(struct net_device *dev,
hwkey[i] |= (key[4 * i + 3] & mask) << 24;
}
#define CONF_WEP40 0x4
#define CONF_WEP104 0x14
switch (wrqu->encoding.flags & IW_ENCODE_INDEX) {
case 0:
key_idx = ieee->crypt_info.tx_keyidx;

5
drivers/staging/rtl8192e/rtl819x_BA.h
View File

@ -19,11 +19,7 @@
#ifndef _BATYPE_H_
#define _BATYPE_H_
#define TOTAL_TXBA_NUM 16
#define TOTAL_RXBA_NUM 16
#define BA_SETUP_TIMEOUT 200
#define BA_INACT_TIMEOUT 60000
#define BA_POLICY_DELAYED 0
#define BA_POLICY_IMMEDIATE 1
@ -32,7 +28,6 @@
#define ADDBA_STATUS_REFUSED 37
#define ADDBA_STATUS_INVALID_PARAM 38
#define DELBA_REASON_QSTA_LEAVING 36
#define DELBA_REASON_END_BA 37
#define DELBA_REASON_UNKNOWN_BA 38
#define DELBA_REASON_TIMEOUT 39

2
drivers/staging/rtl8192e/rtl819x_HT.h
View File

@ -20,8 +20,6 @@
#define _RTL819XU_HTTYPE_H_
#define MIMO_PS_STATIC 0
#define MIMO_PS_DYNAMIC 1
#define MIMO_PS_NOLIMIT 3
#define sHTCLng 4

2
drivers/staging/rtl8192e/rtl819x_TS.h
View File

@ -19,8 +19,6 @@
#ifndef _TSTYPE_H_
#define _TSTYPE_H_
#include "rtl819x_Qos.h"
#define TS_SETUP_TIMEOUT 60
#define TS_INACT_TIMEOUT 60
#define TS_ADDBA_DELAY 60
#define TOTAL_TS_NUM 16

40
drivers/staging/rtl8192e/rtllib.h
View File

@ -84,9 +84,6 @@
#define iwe_stream_add_point_rsl(info, start, stop, iwe, p) \
iwe_stream_add_point(info, start, stop, iwe, p)
#define usb_alloc_urb_rsl(x, y) usb_alloc_urb(x, y)
#define usb_submit_urb_rsl(x, y) usb_submit_urb(x, y)
static inline void *netdev_priv_rsl(struct net_device *dev)
{
return netdev_priv(dev);
@ -110,27 +107,14 @@ static inline void *netdev_priv_rsl(struct net_device *dev)
#define HIGH_QUEUE 7
#define BEACON_QUEUE 8
#define LOW_QUEUE BE_QUEUE
#define NORMAL_QUEUE MGNT_QUEUE
#ifndef IW_MODE_MESH
#define IW_MODE_MESH 7
#endif
#define AMSDU_SUBHEADER_LEN 14
#define SWRF_TIMEOUT 50
#define IE_CISCO_FLAG_POSITION 0x08
#define SUPPORT_CKIP_MIC 0x08
#define SUPPORT_CKIP_PK 0x10
#define RT_RF_OFF_LEVL_ASPM BIT0
#define RT_RF_OFF_LEVL_CLK_REQ BIT1
#define RT_RF_OFF_LEVL_PCI_D3 BIT2
#define RT_RF_OFF_LEVL_HALT_NIC BIT3
#define RT_RF_OFF_LEVL_FREE_FW BIT4
#define RT_RF_OFF_LEVL_FW_32K BIT5
#define RT_RF_PS_LEVEL_ALWAYS_ASPM BIT6
#define RT_RF_LPS_DISALBE_2R BIT30
#define RT_RF_LPS_LEVEL_ASPM BIT31
#define RT_IN_PS_LEVEL(pPSC, _PS_FLAG) \
((pPSC->CurPsLevel & _PS_FLAG) ? true : false)
#define RT_CLEAR_PS_LEVEL(pPSC, _PS_FLAG) \
@ -244,22 +228,6 @@ struct sw_chnl_cmd {
#define MGN_MCS13 0x8d
#define MGN_MCS14 0x8e
#define MGN_MCS15 0x8f
#define MGN_MCS0_SG 0x90
#define MGN_MCS1_SG 0x91
#define MGN_MCS2_SG 0x92
#define MGN_MCS3_SG 0x93
#define MGN_MCS4_SG 0x94
#define MGN_MCS5_SG 0x95
#define MGN_MCS6_SG 0x96
#define MGN_MCS7_SG 0x97
#define MGN_MCS8_SG 0x98
#define MGN_MCS9_SG 0x99
#define MGN_MCS10_SG 0x9a
#define MGN_MCS11_SG 0x9b
#define MGN_MCS12_SG 0x9c
#define MGN_MCS13_SG 0x9d
#define MGN_MCS14_SG 0x9e
#define MGN_MCS15_SG 0x9f
enum hw_variables {
HW_VAR_ETHER_ADDR,
@ -748,16 +716,11 @@ struct rtllib_stats {
struct rtllib_device;
#define SEC_KEY_1 (1<<0)
#define SEC_KEY_2 (1<<1)
#define SEC_KEY_3 (1<<2)
#define SEC_KEY_4 (1<<3)
#define SEC_ACTIVE_KEY (1<<4)
#define SEC_AUTH_MODE (1<<5)
#define SEC_UNICAST_GROUP (1<<6)
#define SEC_LEVEL (1<<7)
#define SEC_ENABLED (1<<8)
#define SEC_ENCRYPT (1<<9)
#define SEC_LEVEL_0 0 /* None */
#define SEC_LEVEL_1 1 /* WEP 40 and 104 bit */
@ -772,7 +735,6 @@ struct rtllib_device;
#define WEP_KEY_LEN 13
#define SCM_KEY_LEN 32
#define SCM_TEMPORAL_KEY_LENGTH 16
struct rtllib_security {
u16 active_key:2,
@ -1187,8 +1149,6 @@ enum {WMM_all_frame, WMM_two_frame, WMM_four_frame, WMM_six_frame};
#define WME_AC_BE 0x01
#define WME_AC_VI 0x02
#define WME_AC_VO 0x03
#define WME_ACI_MASK 0x03
#define WME_AIFSN_MASK 0x03
#define WME_AC_PRAM_LEN 16
#define MAX_RECEIVE_BUFFER_SIZE 9100

1
drivers/staging/rtl8192e/rtllib_softmac.c
View File

@ -1511,7 +1511,6 @@ static void rtllib_associate_step2(struct rtllib_device *ieee)
}
}
#define CANCELLED 2
static void rtllib_associate_complete_wq(void *data)
{
struct rtllib_device *ieee = (struct rtllib_device *)