ARM: shmobile: rcar-gen2: Obtain extal frequency from DT
On some R-Car Gen2 SoCs, the frequency of the ARM architecture timer depends on the frequency of the external clock crystal. Currently the latter is determined indirectly from the state of the mode pins, which is a relic predating DT. Obtain the external clock crystal frequency from DT instead, removing the dependency on the mode pins. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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@ -46,6 +46,26 @@ u32 rcar_gen2_read_mode_pins(void)
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return mode;
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}
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static unsigned int __init get_extal_freq(void)
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{
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struct device_node *cpg, *extal;
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u32 freq = 20000000;
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cpg = of_find_compatible_node(NULL, NULL,
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"renesas,rcar-gen2-cpg-clocks");
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if (!cpg)
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return freq;
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extal = of_parse_phandle(cpg, "clocks", 0);
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of_node_put(cpg);
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if (!extal)
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return freq;
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of_property_read_u32(extal, "clock-frequency", &freq);
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of_node_put(extal);
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return freq;
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}
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#define CNTCR 0
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#define CNTFID0 0x20
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@ -54,7 +74,6 @@ void __init rcar_gen2_timer_init(void)
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u32 mode = rcar_gen2_read_mode_pins();
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#ifdef CONFIG_ARM_ARCH_TIMER
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void __iomem *base;
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int extal_mhz = 0;
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u32 freq;
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if (of_machine_is_compatible("renesas,r8a7794")) {
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@ -82,26 +101,9 @@ void __init rcar_gen2_timer_init(void)
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* with the counter disabled. Moreover, it may also report
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* a potentially incorrect fixed 13 MHz frequency. To be
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* correct these registers need to be updated to use the
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* frequency EXTAL / 2 which can be determined by the MD pins.
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* frequency EXTAL / 2.
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*/
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switch (mode & (MD(14) | MD(13))) {
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case 0:
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extal_mhz = 15;
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break;
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case MD(13):
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extal_mhz = 20;
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break;
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case MD(14):
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extal_mhz = 26;
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break;
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case MD(13) | MD(14):
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extal_mhz = 30;
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break;
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}
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/* The arch timer frequency equals EXTAL / 2 */
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freq = extal_mhz * (1000000 / 2);
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freq = get_extal_freq() / 2;
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}
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/* Remap "armgcnt address map" space */
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