drm/i915: kill intel_dp_link_clock()
Use drm_dp_bw_code_to_link_rate insead. It's the same thing, but supports DP_LINK_BW_5_4 and is also used by the other drivers. Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -148,15 +148,6 @@ intel_dp_max_link_bw(struct intel_dp *intel_dp)
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return max_link_bw;
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}
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static int
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intel_dp_link_clock(uint8_t link_bw)
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{
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if (link_bw == DP_LINK_BW_2_7)
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return 270000;
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else
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return 162000;
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}
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/*
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* The units on the numbers in the next two are... bizarre. Examples will
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* make it clearer; this one parallels an example in the eDP spec.
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@ -191,7 +182,8 @@ intel_dp_adjust_dithering(struct intel_dp *intel_dp,
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struct drm_display_mode *mode,
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bool adjust_mode)
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{
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int max_link_clock = intel_dp_link_clock(intel_dp_max_link_bw(intel_dp));
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int max_link_clock =
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drm_dp_bw_code_to_link_rate(intel_dp_max_link_bw(intel_dp));
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int max_lanes = drm_dp_max_lane_count(intel_dp->dpcd);
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int max_rate, mode_rate;
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@ -722,12 +714,15 @@ intel_dp_mode_fixup(struct drm_encoder *encoder,
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for (clock = 0; clock <= max_clock; clock++) {
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for (lane_count = 1; lane_count <= max_lane_count; lane_count <<= 1) {
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int link_avail = intel_dp_max_data_rate(intel_dp_link_clock(bws[clock]), lane_count);
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int link_bw_clock =
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drm_dp_bw_code_to_link_rate(bws[clock]);
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int link_avail = intel_dp_max_data_rate(link_bw_clock,
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lane_count);
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if (mode_rate <= link_avail) {
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intel_dp->link_bw = bws[clock];
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intel_dp->lane_count = lane_count;
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adjusted_mode->clock = intel_dp_link_clock(intel_dp->link_bw);
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adjusted_mode->clock = link_bw_clock;
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DRM_DEBUG_KMS("DP link bw %02x lane "
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"count %d clock %d bpp %d\n",
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intel_dp->link_bw, intel_dp->lane_count,
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