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drm/amd/display: Fix s3 hang on resume. 

Avoid enabling CRTC_VERTICAL_INTERRUPT0 twice on resume.
It's enabled once from within manage_dm_interrupts in mode set
and another explicitly from amdgpu_dm_irq_resume_late.
Seems it lead to CRTC hang.

Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
hifive-unleashed-5.1
Andrey Grodzovsky 2017-03-31 14:15:31 -04:00 committed by Alex Deucher
parent 7160c74cd0
commit 9faa423716
3 changed files with 13 additions and 7 deletions
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2
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
View File

@ -575,7 +575,7 @@ int amdgpu_dm_display_resume(struct amdgpu_device *adev )
ret = drm_atomic_helper_resume(ddev, adev->dm.cached_state);
amdgpu_dm_irq_resume(adev);
amdgpu_dm_irq_resume_late(adev);
return ret;
}

16
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c
View File

@ -504,8 +504,11 @@ int amdgpu_dm_irq_suspend(
DRM_DEBUG_KMS("DM_IRQ: suspend\n");
/* disable HW interrupt */
for (src = DC_IRQ_SOURCE_HPD1; src < DAL_IRQ_SOURCES_NUMBER; src++) {
/**
* Disable HW interrupt for HPD and HPDRX only since FLIP and VBLANK
* will be disabled from manage_dm_interrupts on disable CRTC.
*/
for (src = DC_IRQ_SOURCE_HPD1; src < DC_IRQ_SOURCE_HPD6RX; src++) {
hnd_list_l = &adev->dm.irq_handler_list_low_tab[src].head;
hnd_list_h = &adev->dm.irq_handler_list_high_tab[src];
if (!list_empty(hnd_list_l) || !list_empty(hnd_list_h))
@ -544,7 +547,7 @@ int amdgpu_dm_irq_resume_early(struct amdgpu_device *adev)
return 0;
}
int amdgpu_dm_irq_resume(struct amdgpu_device *adev)
int amdgpu_dm_irq_resume_late(struct amdgpu_device *adev)
{
int src;
struct list_head *hnd_list_h, *hnd_list_l;
@ -554,8 +557,11 @@ int amdgpu_dm_irq_resume(struct amdgpu_device *adev)
DRM_DEBUG_KMS("DM_IRQ: resume\n");
/* re-enable HW interrupt */
for (src = DC_IRQ_SOURCE_HPD1; src < DAL_IRQ_SOURCES_NUMBER; src++) {
/**
* Renable HW interrupt for HPD and only since FLIP and VBLANK
* will be enabled from manage_dm_interrupts on enable CRTC.
*/
for (src = DC_IRQ_SOURCE_HPD1; src < DC_IRQ_SOURCE_HPD6; src++) {
hnd_list_l = &adev->dm.irq_handler_list_low_tab[src].head;
hnd_list_h = &adev->dm.irq_handler_list_high_tab[src];
if (!list_empty(hnd_list_l) || !list_empty(hnd_list_h))

2
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.h
View File

@ -117,6 +117,6 @@ int amdgpu_dm_irq_suspend(struct amdgpu_device *adev);
*
*/
int amdgpu_dm_irq_resume_early(struct amdgpu_device *adev);
int amdgpu_dm_irq_resume(struct amdgpu_device *adev);
int amdgpu_dm_irq_resume_late(struct amdgpu_device *adev);
#endif /* __AMDGPU_DM_IRQ_H__ */