can: c_can: Wait for CONTROL_INIT to be cleared
According to the documentation the CPU must wait for CONTROL_INIT to be cleared before writing to the baudrate registers. Signed-off-by: Benedikt Spranger <b.spranger@linutronix.de> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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@ -566,6 +566,21 @@ static netdev_tx_t c_can_start_xmit(struct sk_buff *skb,
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return NETDEV_TX_OK;
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}
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static int c_can_wait_for_ctrl_init(struct net_device *dev,
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struct c_can_priv *priv, u32 init)
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{
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int retry = 0;
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while (init != (priv->read_reg(priv, C_CAN_CTRL_REG) & CONTROL_INIT)) {
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udelay(10);
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if (retry++ > 1000) {
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netdev_err(dev, "CCTRL: set CONTROL_INIT failed\n");
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return -EIO;
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}
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}
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return 0;
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}
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static int c_can_set_bittiming(struct net_device *dev)
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{
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unsigned int reg_btr, reg_brpe, ctrl_save;
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@ -573,6 +588,7 @@ static int c_can_set_bittiming(struct net_device *dev)
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u32 ten_bit_brp;
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struct c_can_priv *priv = netdev_priv(dev);
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const struct can_bittiming *bt = &priv->can.bittiming;
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int res;
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/* c_can provides a 6-bit brp and 4-bit brpe fields */
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ten_bit_brp = bt->brp - 1;
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@ -590,13 +606,17 @@ static int c_can_set_bittiming(struct net_device *dev)
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"setting BTR=%04x BRPE=%04x\n", reg_btr, reg_brpe);
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ctrl_save = priv->read_reg(priv, C_CAN_CTRL_REG);
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priv->write_reg(priv, C_CAN_CTRL_REG,
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ctrl_save | CONTROL_CCE | CONTROL_INIT);
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ctrl_save &= ~CONTROL_INIT;
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priv->write_reg(priv, C_CAN_CTRL_REG, CONTROL_CCE | CONTROL_INIT);
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res = c_can_wait_for_ctrl_init(dev, priv, CONTROL_INIT);
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if (res)
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return res;
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priv->write_reg(priv, C_CAN_BTR_REG, reg_btr);
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priv->write_reg(priv, C_CAN_BRPEXT_REG, reg_brpe);
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priv->write_reg(priv, C_CAN_CTRL_REG, ctrl_save);
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return 0;
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return c_can_wait_for_ctrl_init(dev, priv, 0);
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}
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/*
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