V4L/DVB: ngene: Code cleanup
Remove/comment-out unused code, make some functions/declarations static. Signed-off-by: Oliver Endriss <o.endriss@gmx.de> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
This commit is contained in:
parent
cf1b12f2b3
commit
9fdd797659
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@ -48,17 +48,10 @@
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#include "stv090x.h"
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#include "lnbh24.h"
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#ifdef NGENE_COMMAND_API
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#include "ngene-ioctls.h"
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#endif
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static int one_adapter = 1;
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module_param(one_adapter, int, 0444);
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MODULE_PARM_DESC(one_adapter, "Use only one adapter.");
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static int copy_eeprom;
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module_param(copy_eeprom, int, 0444);
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MODULE_PARM_DESC(copy_eeprom, "Copy eeprom.");
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static int debug;
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module_param(debug, int, 0444);
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@ -342,19 +335,8 @@ static int ngene_command(struct ngene *dev, struct ngene_command *com)
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return result;
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}
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int ngene_command_nop(struct ngene *dev)
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{
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struct ngene_command com;
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com.cmd.hdr.Opcode = CMD_NOP;
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com.cmd.hdr.Length = 0;
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com.in_len = 0;
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com.out_len = 0;
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return ngene_command(dev, &com);
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}
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int ngene_command_i2c_read(struct ngene *dev, u8 adr,
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static int ngene_command_i2c_read(struct ngene *dev, u8 adr,
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u8 *out, u8 outlen, u8 *in, u8 inlen, int flag)
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{
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struct ngene_command com;
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@ -381,7 +363,8 @@ int ngene_command_i2c_read(struct ngene *dev, u8 adr,
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return 0;
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}
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int ngene_command_i2c_write(struct ngene *dev, u8 adr, u8 *out, u8 outlen)
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static int ngene_command_i2c_write(struct ngene *dev, u8 adr,
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u8 *out, u8 outlen)
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{
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struct ngene_command com;
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@ -435,81 +418,6 @@ static int ngene_command_load_firmware(struct ngene *dev,
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return ngene_command(dev, &com);
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}
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int ngene_command_imem_read(struct ngene *dev, u8 adr, u8 *data, int type)
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{
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struct ngene_command com;
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com.cmd.hdr.Opcode = type ? CMD_SFR_READ : CMD_IRAM_READ;
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com.cmd.hdr.Length = 1;
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com.cmd.SfrIramRead.address = adr;
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com.in_len = 1;
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com.out_len = 2;
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if (ngene_command(dev, &com) < 0)
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return -EIO;
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*data = com.cmd.raw8[1];
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return 0;
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}
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int ngene_command_imem_write(struct ngene *dev, u8 adr, u8 data, int type)
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{
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struct ngene_command com;
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com.cmd.hdr.Opcode = type ? CMD_SFR_WRITE : CMD_IRAM_WRITE;
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com.cmd.hdr.Length = 2;
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com.cmd.SfrIramWrite.address = adr;
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com.cmd.SfrIramWrite.data = data;
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com.in_len = 2;
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com.out_len = 1;
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if (ngene_command(dev, &com) < 0)
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return -EIO;
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return 0;
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}
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static int ngene_command_config_uart(struct ngene *dev, u8 config,
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tx_cb_t *tx_cb, rx_cb_t *rx_cb)
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{
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struct ngene_command com;
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com.cmd.hdr.Opcode = CMD_CONFIGURE_UART;
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com.cmd.hdr.Length = sizeof(struct FW_CONFIGURE_UART) - 2;
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com.cmd.ConfigureUart.UartControl = config;
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com.in_len = sizeof(struct FW_CONFIGURE_UART);
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com.out_len = 0;
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if (ngene_command(dev, &com) < 0)
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return -EIO;
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dev->TxEventNotify = tx_cb;
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dev->RxEventNotify = rx_cb;
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dprintk(KERN_DEBUG DEVICE_NAME ": Set UART config %02x.\n", config);
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return 0;
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}
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static void tx_cb(struct ngene *dev, u32 ts)
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{
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dev->tx_busy = 0;
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wake_up_interruptible(&dev->tx_wq);
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}
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static void rx_cb(struct ngene *dev, u32 ts, u8 c)
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{
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int rp = dev->uart_rp;
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int nwp, wp = dev->uart_wp;
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/* dprintk(KERN_DEBUG DEVICE_NAME ": %c\n", c); */
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nwp = (wp + 1) % (UART_RBUF_LEN);
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if (nwp == rp)
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return;
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dev->uart_rbuf[wp] = c;
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dev->uart_wp = nwp;
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wake_up_interruptible(&dev->rx_wq);
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}
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static int ngene_command_config_buf(struct ngene *dev, u8 config)
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{
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@ -555,16 +463,6 @@ static int ngene_command_gpio_set(struct ngene *dev, u8 select, u8 level)
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return ngene_command(dev, &com);
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}
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/* The reset is only wired to GPIO4 on MicRacer Revision 1.10 !
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Also better set bootdelay to 1 in nvram or less. */
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static void ngene_reset_decypher(struct ngene *dev)
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{
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printk(KERN_INFO DEVICE_NAME ": Resetting Decypher.\n");
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ngene_command_gpio_set(dev, 4, 0);
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msleep(1);
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ngene_command_gpio_set(dev, 4, 1);
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msleep(2000);
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}
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/*
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02000640 is sample on rising edge.
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@ -693,8 +591,8 @@ static void clear_buffers(struct ngene_channel *chan)
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}
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}
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int ngene_command_stream_control(struct ngene *dev, u8 stream, u8 control,
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u8 mode, u8 flags)
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static int ngene_command_stream_control(struct ngene *dev, u8 stream,
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u8 control, u8 mode, u8 flags)
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{
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struct ngene_channel *chan = &dev->channel[stream];
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struct ngene_command com;
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@ -847,23 +745,6 @@ int ngene_command_stream_control(struct ngene *dev, u8 stream, u8 control,
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return 0;
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}
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int ngene_stream_control(struct ngene *dev, u8 stream, u8 control, u8 mode,
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u16 lines, u16 bpl, u16 vblines, u16 vbibpl)
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{
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if (!(mode & SMODE_TRANSPORT_STREAM))
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return -EINVAL;
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if (lines * bpl > MAX_VIDEO_BUFFER_SIZE)
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return -EINVAL;
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if ((mode & SMODE_TRANSPORT_STREAM) && (((bpl * lines) & 0xff) != 0))
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return -EINVAL;
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if ((mode & SMODE_VIDEO_CAPTURE) && (bpl & 7) != 0)
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return -EINVAL;
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return ngene_command_stream_control(dev, stream, control, mode, 0);
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}
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/****************************************************************************/
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/* I2C **********************************************************************/
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@ -924,13 +805,12 @@ done:
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}
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static u32 ngene_i2c_functionality(struct i2c_adapter *adap)
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{
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return I2C_FUNC_SMBUS_EMUL;
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}
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struct i2c_algorithm ngene_i2c_algo = {
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static struct i2c_algorithm ngene_i2c_algo = {
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.master_xfer = ngene_i2c_master_xfer,
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.functionality = ngene_i2c_functionality,
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};
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@ -956,476 +836,6 @@ static int ngene_i2c_init(struct ngene *dev, int dev_nr)
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return i2c_add_adapter(adap);
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}
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int i2c_write(struct i2c_adapter *adapter, u8 adr, u8 data)
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{
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u8 m[1] = {data};
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struct i2c_msg msg = {.addr = adr, .flags = 0, .buf = m, .len = 1};
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if (i2c_transfer(adapter, &msg, 1) != 1) {
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printk(KERN_ERR DEVICE_NAME
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": Failed to write to I2C adr %02x!\n", adr);
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return -1;
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}
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return 0;
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}
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static int i2c_write_read(struct i2c_adapter *adapter,
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u8 adr, u8 *w, u8 wlen, u8 *r, u8 rlen)
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{
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struct i2c_msg msgs[2] = {{.addr = adr, .flags = 0,
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.buf = w, .len = wlen},
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{.addr = adr, .flags = I2C_M_RD,
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.buf = r, .len = rlen} };
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if (i2c_transfer(adapter, msgs, 2) != 2) {
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printk(KERN_ERR DEVICE_NAME ": error in i2c_write_read\n");
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return -1;
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}
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return 0;
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}
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static int test_dec_i2c(struct i2c_adapter *adapter, int reg)
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{
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u8 data[256] = { reg, 0x00, 0x93, 0x78, 0x43, 0x45 };
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u8 data2[256];
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int i;
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memset(data2, 0, 256);
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i2c_write_read(adapter, 0x66, data, 2, data2, 4);
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for (i = 0; i < 4; i++)
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printk("%02x ", data2[i]);
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printk("\n");
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return 0;
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}
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/****************************************************************************/
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/* EEPROM TAGS **************************************************************/
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/****************************************************************************/
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#define MICNG_EE_START 0x0100
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#define MICNG_EE_END 0x0FF0
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#define MICNG_EETAG_END0 0x0000
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#define MICNG_EETAG_END1 0xFFFF
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/* 0x0001 - 0x000F reserved for housekeeping */
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/* 0xFFFF - 0xFFFE reserved for housekeeping */
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/* Micronas assigned tags
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EEProm tags for hardware support */
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#define MICNG_EETAG_DRXD1_OSCDEVIATION 0x1000 /* 2 Bytes data */
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#define MICNG_EETAG_DRXD2_OSCDEVIATION 0x1001 /* 2 Bytes data */
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#define MICNG_EETAG_MT2060_1_1STIF 0x1100 /* 2 Bytes data */
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#define MICNG_EETAG_MT2060_2_1STIF 0x1101 /* 2 Bytes data */
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/* Tag range for OEMs */
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#define MICNG_EETAG_OEM_FIRST 0xC000
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#define MICNG_EETAG_OEM_LAST 0xFFEF
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static int i2c_write_eeprom(struct i2c_adapter *adapter,
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u8 adr, u16 reg, u8 data)
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{
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u8 m[3] = {(reg >> 8), (reg & 0xff), data};
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struct i2c_msg msg = {.addr = adr, .flags = 0, .buf = m,
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.len = sizeof(m)};
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if (i2c_transfer(adapter, &msg, 1) != 1) {
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dprintk(KERN_ERR DEVICE_NAME ": Error writing EEPROM!\n");
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return -EIO;
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}
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return 0;
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}
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static int i2c_read_eeprom(struct i2c_adapter *adapter,
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u8 adr, u16 reg, u8 *data, int len)
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{
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u8 msg[2] = {(reg >> 8), (reg & 0xff)};
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struct i2c_msg msgs[2] = {{.addr = adr, .flags = 0,
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.buf = msg, .len = 2 },
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{.addr = adr, .flags = I2C_M_RD,
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.buf = data, .len = len} };
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if (i2c_transfer(adapter, msgs, 2) != 2) {
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dprintk(KERN_ERR DEVICE_NAME ": Error reading EEPROM\n");
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return -EIO;
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}
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return 0;
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}
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static int i2c_dump_eeprom(struct i2c_adapter *adapter, u8 adr)
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{
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u8 buf[64];
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int i;
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if (i2c_read_eeprom(adapter, adr, 0x0000, buf, sizeof(buf))) {
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printk(KERN_ERR DEVICE_NAME ": No EEPROM?\n");
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return -1;
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}
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for (i = 0; i < sizeof(buf); i++) {
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if (!(i & 15))
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printk("\n");
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printk("%02x ", buf[i]);
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}
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printk("\n");
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return 0;
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}
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static int i2c_copy_eeprom(struct i2c_adapter *adapter, u8 adr, u8 adr2)
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{
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u8 buf[64];
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int i;
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if (i2c_read_eeprom(adapter, adr, 0x0000, buf, sizeof(buf))) {
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printk(KERN_ERR DEVICE_NAME ": No EEPROM?\n");
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return -1;
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}
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buf[36] = 0xc3;
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buf[39] = 0xab;
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for (i = 0; i < sizeof(buf); i++) {
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i2c_write_eeprom(adapter, adr2, i, buf[i]);
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msleep(10);
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}
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return 0;
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}
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/****************************************************************************/
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/* COMMAND API interface ****************************************************/
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/****************************************************************************/
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#ifdef NGENE_COMMAND_API
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static int command_do_ioctl(struct inode *inode, struct file *file,
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unsigned int cmd, void *parg)
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{
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struct dvb_device *dvbdev = file->private_data;
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struct ngene_channel *chan = dvbdev->priv;
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struct ngene *dev = chan->dev;
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int err = 0;
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switch (cmd) {
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case IOCTL_MIC_NO_OP:
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err = ngene_command_nop(dev);
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break;
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case IOCTL_MIC_DOWNLOAD_FIRMWARE:
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break;
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case IOCTL_MIC_I2C_READ:
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{
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MIC_I2C_READ *msg = parg;
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err = ngene_command_i2c_read(dev, msg->I2CAddress >> 1,
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msg->OutData, msg->OutLength,
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msg->OutData, msg->InLength, 1);
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break;
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}
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case IOCTL_MIC_I2C_WRITE:
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{
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MIC_I2C_WRITE *msg = parg;
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err = ngene_command_i2c_write(dev, msg->I2CAddress >> 1,
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msg->Data, msg->Length);
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break;
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}
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case IOCTL_MIC_TEST_GETMEM:
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{
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MIC_MEM *m = parg;
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if (m->Length > 64 * 1024 || m->Start + m->Length > 64 * 1024)
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return -EINVAL;
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/* WARNING, only use this on x86,
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other archs may not swallow this */
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err = copy_to_user(m->Data, dev->iomem + m->Start, m->Length);
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break;
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}
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case IOCTL_MIC_TEST_SETMEM:
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{
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MIC_MEM *m = parg;
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if (m->Length > 64 * 1024 || m->Start + m->Length > 64 * 1024)
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return -EINVAL;
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err = copy_from_user(dev->iomem + m->Start, m->Data, m->Length);
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break;
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}
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case IOCTL_MIC_SFR_READ:
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{
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MIC_IMEM *m = parg;
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err = ngene_command_imem_read(dev, m->Address, &m->Data, 1);
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break;
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}
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case IOCTL_MIC_SFR_WRITE:
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{
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MIC_IMEM *m = parg;
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err = ngene_command_imem_write(dev, m->Address, m->Data, 1);
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break;
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}
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case IOCTL_MIC_IRAM_READ:
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{
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MIC_IMEM *m = parg;
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err = ngene_command_imem_read(dev, m->Address, &m->Data, 0);
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break;
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}
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case IOCTL_MIC_IRAM_WRITE:
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{
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MIC_IMEM *m = parg;
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err = ngene_command_imem_write(dev, m->Address, m->Data, 0);
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break;
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}
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case IOCTL_MIC_STREAM_CONTROL:
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{
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MIC_STREAM_CONTROL *m = parg;
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err = ngene_stream_control(dev, m->Stream, m->Control, m->Mode,
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m->nLines, m->nBytesPerLine,
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m->nVBILines, m->nBytesPerVBILine);
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break;
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}
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default:
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err = -EINVAL;
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break;
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}
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return err;
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}
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static int command_ioctl(struct inode *inode, struct file *file,
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unsigned int cmd, unsigned long arg)
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{
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void *parg = (void *)arg, *pbuf = NULL;
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char buf[64];
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int res = -EFAULT;
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if (_IOC_DIR(cmd) & _IOC_WRITE) {
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parg = buf;
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if (_IOC_SIZE(cmd) > sizeof(buf)) {
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pbuf = kmalloc(_IOC_SIZE(cmd), GFP_KERNEL);
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if (!pbuf)
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return -ENOMEM;
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parg = pbuf;
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}
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if (copy_from_user(parg, (void __user *)arg, _IOC_SIZE(cmd)))
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goto error;
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}
|
||||
res = command_do_ioctl(inode, file, cmd, parg);
|
||||
if (res < 0)
|
||||
goto error;
|
||||
if (_IOC_DIR(cmd) & _IOC_READ)
|
||||
if (copy_to_user((void __user *)arg, parg, _IOC_SIZE(cmd)))
|
||||
res = -EFAULT;
|
||||
error:
|
||||
kfree(pbuf);
|
||||
return res;
|
||||
}
|
||||
|
||||
struct page *ngene_nopage(struct vm_area_struct *vma,
|
||||
unsigned long address, int *type)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ngene_mmap(struct file *file, struct vm_area_struct *vma)
|
||||
{
|
||||
struct dvb_device *dvbdev = file->private_data;
|
||||
struct ngene_channel *chan = dvbdev->priv;
|
||||
struct ngene *dev = chan->dev;
|
||||
|
||||
unsigned long size = vma->vm_end - vma->vm_start;
|
||||
unsigned long off = vma->vm_pgoff << PAGE_SHIFT;
|
||||
unsigned long padr = pci_resource_start(dev->pci_dev, 0) + off;
|
||||
unsigned long psize = pci_resource_len(dev->pci_dev, 0) - off;
|
||||
|
||||
if (size > psize)
|
||||
return -EINVAL;
|
||||
|
||||
if (io_remap_pfn_range(vma, vma->vm_start, padr >> PAGE_SHIFT, size,
|
||||
vma->vm_page_prot))
|
||||
return -EAGAIN;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int write_uart(struct ngene *dev, u8 *data, int len)
|
||||
{
|
||||
struct ngene_command com;
|
||||
|
||||
com.cmd.hdr.Opcode = CMD_WRITE_UART;
|
||||
com.cmd.hdr.Length = len;
|
||||
memcpy(com.cmd.WriteUart.Data, data, len);
|
||||
com.cmd.WriteUart.Data[len] = 0;
|
||||
com.cmd.WriteUart.Data[len + 1] = 0;
|
||||
com.in_len = len;
|
||||
com.out_len = 0;
|
||||
|
||||
if (ngene_command(dev, &com) < 0)
|
||||
return -EIO;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int send_cli(struct ngene *dev, char *cmd)
|
||||
{
|
||||
/* printk(KERN_INFO DEVICE_NAME ": %s", cmd); */
|
||||
return write_uart(dev, cmd, strlen(cmd));
|
||||
}
|
||||
|
||||
static int send_cli_val(struct ngene *dev, char *cmd, u32 val)
|
||||
{
|
||||
char s[32];
|
||||
|
||||
snprintf(s, 32, "%s %d\n", cmd, val);
|
||||
/* printk(KERN_INFO DEVICE_NAME ": %s", s); */
|
||||
return write_uart(dev, s, strlen(s));
|
||||
}
|
||||
|
||||
static int ngene_command_write_uart_user(struct ngene *dev,
|
||||
const u8 *data, int len)
|
||||
{
|
||||
struct ngene_command com;
|
||||
|
||||
dev->tx_busy = 1;
|
||||
com.cmd.hdr.Opcode = CMD_WRITE_UART;
|
||||
com.cmd.hdr.Length = len;
|
||||
|
||||
if (copy_from_user(com.cmd.WriteUart.Data, data, len))
|
||||
return -EFAULT;
|
||||
com.in_len = len;
|
||||
com.out_len = 0;
|
||||
|
||||
if (ngene_command(dev, &com) < 0)
|
||||
return -EIO;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static ssize_t uart_write(struct file *file, const char *buf,
|
||||
size_t count, loff_t *ppos)
|
||||
{
|
||||
struct dvb_device *dvbdev = file->private_data;
|
||||
struct ngene_channel *chan = dvbdev->priv;
|
||||
struct ngene *dev = chan->dev;
|
||||
int len, ret = 0;
|
||||
size_t left = count;
|
||||
|
||||
while (left) {
|
||||
len = left;
|
||||
if (len > 250)
|
||||
len = 250;
|
||||
ret = wait_event_interruptible(dev->tx_wq, dev->tx_busy == 0);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
ngene_command_write_uart_user(dev, buf, len);
|
||||
left -= len;
|
||||
buf += len;
|
||||
}
|
||||
return count;
|
||||
}
|
||||
|
||||
static ssize_t ts_write(struct file *file, const char *buf,
|
||||
size_t count, loff_t *ppos)
|
||||
{
|
||||
struct dvb_device *dvbdev = file->private_data;
|
||||
struct ngene_channel *chan = dvbdev->priv;
|
||||
struct ngene *dev = chan->dev;
|
||||
|
||||
if (wait_event_interruptible(dev->tsout_rbuf.queue,
|
||||
dvb_ringbuffer_free
|
||||
(&dev->tsout_rbuf) >= count) < 0)
|
||||
return 0;
|
||||
|
||||
dvb_ringbuffer_write(&dev->tsout_rbuf, buf, count);
|
||||
|
||||
return count;
|
||||
}
|
||||
|
||||
static ssize_t uart_read(struct file *file, char *buf,
|
||||
size_t count, loff_t *ppos)
|
||||
{
|
||||
struct dvb_device *dvbdev = file->private_data;
|
||||
struct ngene_channel *chan = dvbdev->priv;
|
||||
struct ngene *dev = chan->dev;
|
||||
int left;
|
||||
int wp, rp, avail, len;
|
||||
|
||||
if (!dev->uart_rbuf)
|
||||
return -EINVAL;
|
||||
if (count > 128)
|
||||
count = 128;
|
||||
left = count;
|
||||
while (left) {
|
||||
if (wait_event_interruptible(dev->rx_wq,
|
||||
dev->uart_wp != dev->uart_rp) < 0)
|
||||
return -EAGAIN;
|
||||
wp = dev->uart_wp;
|
||||
rp = dev->uart_rp;
|
||||
avail = (wp - rp);
|
||||
|
||||
if (avail < 0)
|
||||
avail += UART_RBUF_LEN;
|
||||
if (avail > left)
|
||||
avail = left;
|
||||
if (wp < rp) {
|
||||
len = UART_RBUF_LEN - rp;
|
||||
if (len > avail)
|
||||
len = avail;
|
||||
if (copy_to_user(buf, dev->uart_rbuf + rp, len))
|
||||
return -EFAULT;
|
||||
if (len < avail)
|
||||
if (copy_to_user(buf + len, dev->uart_rbuf,
|
||||
avail - len))
|
||||
return -EFAULT;
|
||||
} else {
|
||||
if (copy_to_user(buf, dev->uart_rbuf + rp, avail))
|
||||
return -EFAULT;
|
||||
}
|
||||
dev->uart_rp = (rp + avail) % UART_RBUF_LEN;
|
||||
left -= avail;
|
||||
buf += avail;
|
||||
}
|
||||
return count;
|
||||
}
|
||||
|
||||
static const struct file_operations command_fops = {
|
||||
.owner = THIS_MODULE,
|
||||
.read = uart_read,
|
||||
.write = ts_write,
|
||||
.ioctl = command_ioctl,
|
||||
.open = dvb_generic_open,
|
||||
.release = dvb_generic_release,
|
||||
.poll = 0,
|
||||
.mmap = ngene_mmap,
|
||||
};
|
||||
|
||||
static struct dvb_device dvbdev_command = {
|
||||
.priv = 0,
|
||||
.readers = -1,
|
||||
.writers = -1,
|
||||
.users = -1,
|
||||
.fops = &command_fops,
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
/****************************************************************************/
|
||||
/* DVB functions and API interface ******************************************/
|
||||
|
@ -1550,32 +960,6 @@ static int ngene_start_feed(struct dvb_demux_feed *dvbdmxfeed)
|
|||
{
|
||||
struct dvb_demux *dvbdmx = dvbdmxfeed->demux;
|
||||
struct ngene_channel *chan = dvbdmx->priv;
|
||||
#ifdef NGENE_COMMAND_API
|
||||
struct ngene *dev = chan->dev;
|
||||
|
||||
if (dev->card_info->io_type[chan->number] & NGENE_IO_TSOUT) {
|
||||
switch (dvbdmxfeed->pes_type) {
|
||||
case DMX_TS_PES_VIDEO:
|
||||
send_cli_val(dev, "vpid", dvbdmxfeed->pid);
|
||||
send_cli(dev, "res 1080i50\n");
|
||||
/* send_cli(dev, "vdec mpeg2\n"); */
|
||||
break;
|
||||
|
||||
case DMX_TS_PES_AUDIO:
|
||||
send_cli_val(dev, "apid", dvbdmxfeed->pid);
|
||||
send_cli(dev, "start\n");
|
||||
break;
|
||||
|
||||
case DMX_TS_PES_PCR:
|
||||
send_cli_val(dev, "pcrpid", dvbdmxfeed->pid);
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
}
|
||||
#endif
|
||||
|
||||
if (chan->users == 0) {
|
||||
set_transfer(chan, 1);
|
||||
|
@ -1589,27 +973,6 @@ static int ngene_stop_feed(struct dvb_demux_feed *dvbdmxfeed)
|
|||
{
|
||||
struct dvb_demux *dvbdmx = dvbdmxfeed->demux;
|
||||
struct ngene_channel *chan = dvbdmx->priv;
|
||||
#ifdef NGENE_COMMAND_API
|
||||
struct ngene *dev = chan->dev;
|
||||
|
||||
if (dev->card_info->io_type[chan->number] & NGENE_IO_TSOUT) {
|
||||
switch (dvbdmxfeed->pes_type) {
|
||||
case DMX_TS_PES_VIDEO:
|
||||
send_cli(dev, "stop\n");
|
||||
break;
|
||||
|
||||
case DMX_TS_PES_AUDIO:
|
||||
break;
|
||||
|
||||
case DMX_TS_PES_PCR:
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
}
|
||||
#endif
|
||||
|
||||
if (--chan->users)
|
||||
return chan->users;
|
||||
|
@ -1621,23 +984,6 @@ static int ngene_stop_feed(struct dvb_demux_feed *dvbdmxfeed)
|
|||
|
||||
|
||||
|
||||
static int write_to_decoder(struct dvb_demux_feed *feed,
|
||||
const u8 *buf, size_t len)
|
||||
{
|
||||
struct dvb_demux *dvbdmx = feed->demux;
|
||||
struct ngene_channel *chan = dvbdmx->priv;
|
||||
struct ngene *dev = chan->dev;
|
||||
|
||||
if (wait_event_interruptible(dev->tsout_rbuf.queue,
|
||||
dvb_ringbuffer_free
|
||||
(&dev->tsout_rbuf) >= len) < 0)
|
||||
return 0;
|
||||
|
||||
dvb_ringbuffer_write(&dev->tsout_rbuf, buf, len);
|
||||
|
||||
return len;
|
||||
}
|
||||
|
||||
static int my_dvb_dmx_ts_card_init(struct dvb_demux *dvbdemux, char *id,
|
||||
int (*start_feed)(struct dvb_demux_feed *),
|
||||
int (*stop_feed)(struct dvb_demux_feed *),
|
||||
|
@ -1678,86 +1024,12 @@ static int my_dvb_dmxdev_ts_card_init(struct dmxdev *dmxdev,
|
|||
return dvbdemux->dmx.connect_frontend(&dvbdemux->dmx, hw_frontend);
|
||||
}
|
||||
|
||||
/****************************************************************************/
|
||||
/* Decypher firmware loading ************************************************/
|
||||
/****************************************************************************/
|
||||
|
||||
#define DECYPHER_FW "decypher.fw"
|
||||
|
||||
static int dec_ts_send(struct ngene *dev, u8 *buf, u32 len)
|
||||
{
|
||||
while (dvb_ringbuffer_free(&dev->tsout_rbuf) < len)
|
||||
msleep(1);
|
||||
|
||||
|
||||
dvb_ringbuffer_write(&dev->tsout_rbuf, buf, len);
|
||||
|
||||
return len;
|
||||
}
|
||||
|
||||
u8 dec_fw_fill_ts[188] = { 0x47, 0x09, 0x0e, 0x10, 0xff, 0xff, 0x00, 0x00 };
|
||||
|
||||
int dec_fw_send(struct ngene *dev, u8 *fw, u32 size)
|
||||
{
|
||||
struct ngene_channel *chan = &dev->channel[4];
|
||||
u32 len = 180, cc = 0;
|
||||
u8 buf[8] = { 0x47, 0x09, 0x0e, 0x10, 0x00, 0x00, 0x00, 0x00 };
|
||||
|
||||
set_transfer(chan, 1);
|
||||
msleep(100);
|
||||
while (size) {
|
||||
len = 180;
|
||||
if (len > size)
|
||||
len = size;
|
||||
buf[3] = 0x10 | (cc & 0x0f);
|
||||
buf[4] = (cc >> 8);
|
||||
buf[5] = cc & 0xff;
|
||||
buf[6] = len;
|
||||
|
||||
dec_ts_send(dev, buf, 8);
|
||||
dec_ts_send(dev, fw, len);
|
||||
if (len < 180)
|
||||
dec_ts_send(dev, dec_fw_fill_ts + len + 8, 180 - len);
|
||||
cc++;
|
||||
size -= len;
|
||||
fw += len;
|
||||
}
|
||||
for (len = 0; len < 512; len++)
|
||||
dec_ts_send(dev, dec_fw_fill_ts, 188);
|
||||
while (dvb_ringbuffer_avail(&dev->tsout_rbuf))
|
||||
msleep(10);
|
||||
msleep(100);
|
||||
set_transfer(chan, 0);
|
||||
return 0;
|
||||
}
|
||||
|
||||
int dec_fw_boot(struct ngene *dev)
|
||||
{
|
||||
u32 size;
|
||||
const struct firmware *fw = NULL;
|
||||
u8 *dec_fw;
|
||||
|
||||
if (request_firmware(&fw, DECYPHER_FW, &dev->pci_dev->dev) < 0) {
|
||||
printk(KERN_ERR DEVICE_NAME
|
||||
": %s not found. Check hotplug directory.\n",
|
||||
DECYPHER_FW);
|
||||
return -1;
|
||||
}
|
||||
printk(KERN_INFO DEVICE_NAME ": Booting decypher firmware file %s\n",
|
||||
DECYPHER_FW);
|
||||
|
||||
size = fw->size;
|
||||
dec_fw = (u8 *)fw->data;
|
||||
dec_fw_send(dev, dec_fw, size);
|
||||
release_firmware(fw);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/****************************************************************************/
|
||||
/* nGene hardware init and release functions ********************************/
|
||||
/****************************************************************************/
|
||||
|
||||
void free_ringbuffer(struct ngene *dev, struct SRingBufferDescriptor *rb)
|
||||
static void free_ringbuffer(struct ngene *dev, struct SRingBufferDescriptor *rb)
|
||||
{
|
||||
struct SBufferHeader *Cur = rb->Head;
|
||||
u32 j;
|
||||
|
@ -1786,7 +1058,7 @@ void free_ringbuffer(struct ngene *dev, struct SRingBufferDescriptor *rb)
|
|||
pci_free_consistent(dev->pci_dev, rb->MemSize, rb->Head, rb->PAHead);
|
||||
}
|
||||
|
||||
void free_idlebuffer(struct ngene *dev,
|
||||
static void free_idlebuffer(struct ngene *dev,
|
||||
struct SRingBufferDescriptor *rb,
|
||||
struct SRingBufferDescriptor *tb)
|
||||
{
|
||||
|
@ -1804,7 +1076,7 @@ void free_idlebuffer(struct ngene *dev,
|
|||
}
|
||||
}
|
||||
|
||||
void free_common_buffers(struct ngene *dev)
|
||||
static void free_common_buffers(struct ngene *dev)
|
||||
{
|
||||
u32 i;
|
||||
struct ngene_channel *chan;
|
||||
|
@ -1832,7 +1104,7 @@ void free_common_buffers(struct ngene *dev)
|
|||
/* Ring buffer handling *****************************************************/
|
||||
/****************************************************************************/
|
||||
|
||||
int create_ring_buffer(struct pci_dev *pci_dev,
|
||||
static int create_ring_buffer(struct pci_dev *pci_dev,
|
||||
struct SRingBufferDescriptor *descr, u32 NumBuffers)
|
||||
{
|
||||
dma_addr_t tmp;
|
||||
|
@ -2311,8 +1583,6 @@ static int ngene_start(struct ngene *dev)
|
|||
goto fail;
|
||||
|
||||
if (dev->card_info->fw_version == 17) {
|
||||
u8 hdtv_config[6] =
|
||||
{6144 / 64, 0, 0, 2048 / 64, 2048 / 64, 2048 / 64};
|
||||
u8 tsin4_config[6] =
|
||||
{3072 / 64, 3072 / 64, 0, 3072 / 64, 3072 / 64, 0};
|
||||
u8 default_config[6] =
|
||||
|
@ -2321,30 +1591,14 @@ static int ngene_start(struct ngene *dev)
|
|||
|
||||
if (dev->card_info->io_type[3] == NGENE_IO_TSIN)
|
||||
bconf = tsin4_config;
|
||||
if (dev->card_info->io_type[0] == NGENE_IO_HDTV) {
|
||||
bconf = hdtv_config;
|
||||
ngene_reset_decypher(dev);
|
||||
}
|
||||
dprintk(KERN_DEBUG DEVICE_NAME ": FW 17 buffer config\n");
|
||||
stat = ngene_command_config_free_buf(dev, bconf);
|
||||
} else {
|
||||
int bconf = BUFFER_CONFIG_4422;
|
||||
|
||||
if (dev->card_info->io_type[0] == NGENE_IO_HDTV) {
|
||||
bconf = BUFFER_CONFIG_8022;
|
||||
ngene_reset_decypher(dev);
|
||||
}
|
||||
if (dev->card_info->io_type[3] == NGENE_IO_TSIN)
|
||||
bconf = BUFFER_CONFIG_3333;
|
||||
stat = ngene_command_config_buf(dev, bconf);
|
||||
}
|
||||
|
||||
if (dev->card_info->io_type[0] == NGENE_IO_HDTV) {
|
||||
ngene_command_config_uart(dev, 0xc1, tx_cb, rx_cb);
|
||||
test_dec_i2c(&dev->channel[0].i2c_adapter, 0);
|
||||
test_dec_i2c(&dev->channel[0].i2c_adapter, 1);
|
||||
}
|
||||
|
||||
return stat;
|
||||
fail:
|
||||
ngwritel(0, NGENE_INT_ENABLE);
|
||||
|
@ -2432,10 +1686,6 @@ static void release_channel(struct ngene_channel *chan)
|
|||
tasklet_kill(&chan->demux_tasklet);
|
||||
|
||||
if (io & (NGENE_IO_TSIN | NGENE_IO_TSOUT)) {
|
||||
#ifdef NGENE_COMMAND_API
|
||||
if (chan->command_dev)
|
||||
dvb_unregister_device(chan->command_dev);
|
||||
#endif
|
||||
if (chan->fe) {
|
||||
dvb_unregister_frontend(chan->fe);
|
||||
dvb_frontend_detach(chan->fe);
|
||||
|
@ -2452,7 +1702,6 @@ static void release_channel(struct ngene_channel *chan)
|
|||
if (chan->number == 0 || !one_adapter)
|
||||
dvb_unregister_adapter(&dev->adapter[chan->number]);
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
static int init_channel(struct ngene_channel *chan)
|
||||
|
@ -2472,10 +1721,6 @@ static int init_channel(struct ngene_channel *chan)
|
|||
if (io & (NGENE_IO_TSIN | NGENE_IO_TSOUT)) {
|
||||
if (nr >= STREAM_AUDIOIN1)
|
||||
chan->DataFormatFlags = DF_SWAP32;
|
||||
|
||||
if (io & NGENE_IO_TSOUT)
|
||||
dec_fw_boot(dev);
|
||||
|
||||
if (nr == 0 || !one_adapter) {
|
||||
adapter = &dev->adapter[nr];
|
||||
ret = dvb_register_adapter(adapter, "nGene",
|
||||
|
@ -2494,14 +1739,6 @@ static int init_channel(struct ngene_channel *chan)
|
|||
ret = my_dvb_dmxdev_ts_card_init(&chan->dmxdev, &chan->demux,
|
||||
&chan->hw_frontend,
|
||||
&chan->mem_frontend, adapter);
|
||||
if (io & NGENE_IO_TSOUT) {
|
||||
dvbdemux->write_to_decoder = write_to_decoder;
|
||||
}
|
||||
#ifdef NGENE_COMMAND_API
|
||||
dvb_register_device(adapter, &chan->command_dev,
|
||||
&dvbdev_command, (void *)chan,
|
||||
DVB_DEVICE_SEC);
|
||||
#endif
|
||||
}
|
||||
|
||||
if (io & NGENE_IO_TSIN) {
|
||||
|
@ -2522,7 +1759,6 @@ static int init_channel(struct ngene_channel *chan)
|
|||
nr);
|
||||
}
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
@ -2589,12 +1825,6 @@ static int __devinit ngene_probe(struct pci_dev *pci_dev,
|
|||
goto fail1;
|
||||
|
||||
dev->i2c_current_bus = -1;
|
||||
/* Disable analog TV decoder chips if present */
|
||||
if (copy_eeprom) {
|
||||
i2c_copy_eeprom(&dev->channel[0].i2c_adapter, 0x50, 0x52);
|
||||
i2c_dump_eeprom(&dev->channel[0].i2c_adapter, 0x52);
|
||||
}
|
||||
/*i2c_check_eeprom(&dev->i2c_adapter);*/
|
||||
|
||||
/* Register DVB adapters and devices for both channels */
|
||||
if (init_channels(dev) < 0)
|
||||
|
|
|
@ -1,216 +0,0 @@
|
|||
/*
|
||||
* Copyright (C) 2006-2007 Micronas
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* version 2 only, as published by the Free Software Foundation.
|
||||
*
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
|
||||
* 02110-1301, USA
|
||||
* Or, point your browser to http://www.gnu.org/copyleft/gpl.html
|
||||
*/
|
||||
|
||||
#ifndef _NGENE_IOCTLS_H_
|
||||
#define _NGENE_IOCTLS_H_
|
||||
|
||||
#include <linux/ioctl.h>
|
||||
#include <linux/types.h>
|
||||
|
||||
#define NGENE_MAGIC 'n'
|
||||
|
||||
typedef struct {
|
||||
unsigned char I2CAddress;
|
||||
unsigned char OutLength; /* bytes to write first */
|
||||
unsigned char InLength; /* bytes to read */
|
||||
unsigned char OutData[256]; /* output data */
|
||||
unsigned char InData[256]; /* input data */
|
||||
} MIC_I2C_READ, *PMIC_I2C_READ;
|
||||
|
||||
#define IOCTL_MIC_I2C_READ _IOWR(NGENE_MAGIC, 0x00, MIC_I2C_READ)
|
||||
|
||||
|
||||
typedef struct {
|
||||
unsigned char I2CAddress;
|
||||
unsigned char Length;
|
||||
unsigned char Data[250];
|
||||
} MIC_I2C_WRITE, *PMIC_I2C_WRITE;
|
||||
|
||||
typedef struct {
|
||||
unsigned char Length;
|
||||
unsigned char Data[250];
|
||||
} MIC_I2C_CONTINUE_WRITE, *PMIC_I2C_CONTINUE_WRITE;
|
||||
|
||||
#define IOCTL_MIC_I2C_WRITE _IOW(NGENE_MAGIC, 0x01, \
|
||||
MIC_I2C_WRITE)
|
||||
#define IOCTL_MIC_I2C_WRITE_NOSTOP _IOW(NGENE_MAGIC, 0x0c, \
|
||||
MIC_I2C_WRITE)
|
||||
#define IOCTL_MIC_I2C_CONTINUE_WRITE_NOSTOP _IOW(NGENE_MAGIC, 0x0d, \
|
||||
MIC_I2C_CONTINUE_WRITE)
|
||||
#define IOCTL_MIC_I2C_CONTINUE_WRITE _IOW(NGENE_MAGIC, 0x0e, \
|
||||
MIC_I2C_CONTINUE_WRITE)
|
||||
|
||||
typedef struct {
|
||||
unsigned char ModeSelect; /* see bellow */
|
||||
unsigned char OutLength; /* bytes to write first */
|
||||
unsigned char InLength; /* bytes to read */
|
||||
unsigned char OutData[250]; /* output data */
|
||||
} MIC_SPI_READ, *PMIC_SPI_READ;
|
||||
|
||||
#define IOCTL_MIC_SPI_READ _IOWR(NGENE_MAGIC, 0x02, MIC_SPI_READ)
|
||||
|
||||
typedef struct {
|
||||
unsigned char ModeSelect; /* see below */
|
||||
unsigned char Length;
|
||||
unsigned char Data[250];
|
||||
} MIC_SPI_WRITE, *PMIC_SPI_WRITE;
|
||||
|
||||
#define IOCTL_MIC_SPI_WRITE _IOW(NGENE_MAGIC, 0x03, MIC_SPI_READ)
|
||||
|
||||
#define IOCTL_MIC_DOWNLOAD_FIRMWARE _IOW(NGENE_MAGIC, 0x06, unsigned char)
|
||||
|
||||
#define IOCTL_MIC_NO_OP _IO(NGENE_MAGIC, 0x18)
|
||||
|
||||
#define IOCTL_MIC_TUN_RDY _IO(NGENE_MAGIC, 0x07)
|
||||
#define IOCTL_MIC_DEC_SRATE _IOW(NGENE_MAGIC, 0x0a, int)
|
||||
#define IOCTL_MIC_DEC_RDY _IO(NGENE_MAGIC, 0x09)
|
||||
#define IOCTL_MIC_DEC_FREESYNC _IOW(NGENE_MAGIC, 0x08, int)
|
||||
#define IOCTL_MIC_TUN_DETECT _IOWR(NGENE_MAGIC, 0x0b, int)
|
||||
|
||||
typedef struct {
|
||||
unsigned char Stream; /* < UVI1, UVI2, or TVOUT */
|
||||
unsigned char Control;
|
||||
unsigned char Mode;
|
||||
unsigned short nLines;
|
||||
unsigned short nBytesPerLine;
|
||||
unsigned short nVBILines;
|
||||
unsigned short nBytesPerVBILine;
|
||||
} MIC_STREAM_CONTROL, *PMIC_STREAM_CONTROL;
|
||||
|
||||
enum MIC_STREAM_CONTROL_MODE_BITS {
|
||||
MSC_MODE_LOOPBACK = 0x80,
|
||||
MSC_MODE_AVLOOP = 0x40,
|
||||
MSC_MODE_AUDIO_SPDIF = 0x20,
|
||||
MSC_MODE_AVSYNC = 0x10,
|
||||
MSC_MODE_TRANSPORT_STREAM = 0x08,
|
||||
MSC_MODE_AUDIO_CAPTURE = 0x04,
|
||||
MSC_MODE_VBI_CAPTURE = 0x02,
|
||||
MSC_MODE_VIDEO_CAPTURE = 0x01
|
||||
};
|
||||
|
||||
#define IOCTL_MIC_STREAM_CONTROL _IOW(NGENE_MAGIC, 0x22, MIC_STREAM_CONTROL)
|
||||
|
||||
typedef struct {
|
||||
unsigned char Stream; /* < UVI1, UVI2 */
|
||||
unsigned int Rate; /* < Rate in 100nsec to release the buffers
|
||||
to the stream filters */
|
||||
} MIC_SIMULATE_CONTROL, *PMIC_SIMULATE_CONTROL;
|
||||
|
||||
#define IOCTL_MIC_SIMULATE_CONTROL _IOW(NGENE_MAGIC, 0x23, \
|
||||
MIC_SIMULATE_CONTROL)
|
||||
|
||||
/*
|
||||
* IOCTL definitions for the test driver
|
||||
*
|
||||
* NOTE: the test driver also supports following IOCTL defined above:
|
||||
* IOCTL_MIC_NO_OP:
|
||||
* IOCTL_MIC_RECEIVE_BUFFER:
|
||||
* IOCTL_MIC_STREAM_CONTROL:
|
||||
* IOCTL_MIC_I2C_READ:
|
||||
* IOCTL_MIC_I2C_WRITE:
|
||||
*
|
||||
*
|
||||
* VI2C access to NGene memory (read)
|
||||
*
|
||||
* GETMEM in : ULONG start offset
|
||||
* out : read data (length defined by size of output buffer)
|
||||
* SETMEM in : ULONG start offset followed by data to be written
|
||||
* (length defined by size of input buffer)
|
||||
*/
|
||||
|
||||
typedef struct {
|
||||
__u32 Start;
|
||||
__u32 Length;
|
||||
__u8 *Data;
|
||||
} MIC_MEM;
|
||||
|
||||
#define IOCTL_MIC_TEST_GETMEM _IOWR(NGENE_MAGIC, 0x90, MIC_MEM)
|
||||
#define IOCTL_MIC_TEST_SETMEM _IOW(NGENE_MAGIC, 0x91, MIC_MEM)
|
||||
|
||||
typedef struct {
|
||||
__u8 Address;
|
||||
__u8 Data;
|
||||
} MIC_IMEM;
|
||||
|
||||
#define IOCTL_MIC_SFR_READ _IOWR(NGENE_MAGIC, 0xa2, MIC_IMEM)
|
||||
#define IOCTL_MIC_SFR_WRITE _IOWR(NGENE_MAGIC, 0xa3, MIC_IMEM)
|
||||
|
||||
#define IOCTL_MIC_IRAM_READ _IOWR(NGENE_MAGIC, 0xa4, MIC_IMEM)
|
||||
#define IOCTL_MIC_IRAM_WRITE _IOWR(NGENE_MAGIC, 0xa5, MIC_IMEM)
|
||||
|
||||
/*
|
||||
* Set Ngene gpio bit
|
||||
*/
|
||||
typedef struct {
|
||||
unsigned char Select;
|
||||
unsigned char Level;
|
||||
} MIC_SET_GPIO_PIN, *PMIC_SET_GPIO_PIN;
|
||||
|
||||
#define IOCTL_MIC_SET_GPIO_PIN _IOWR(NGENE_MAGIC, 0xa6, MIC_SET_GPIO_PIN)
|
||||
|
||||
/*
|
||||
* Uart ioctls:
|
||||
* These are implemented in the test driver.
|
||||
*
|
||||
* Enable UART
|
||||
*
|
||||
* In: 1 byte containing baud rate: 0 = 19200, 1 = 9600, 2 = 4800, 3 = 2400
|
||||
* Out: nothing
|
||||
*/
|
||||
#define IOCTL_MIC_UART_ENABLE _IOW(NGENE_MAGIC, 0xa9, unsigned char)
|
||||
|
||||
/*
|
||||
* Enable UART
|
||||
*
|
||||
* In: nothing
|
||||
* Out: nothing
|
||||
*/
|
||||
#define IOCTL_MIC_UART_DISABLE _IO(NGENE_MAGIC, 0xAA)
|
||||
|
||||
/*
|
||||
* Write UART
|
||||
*
|
||||
* In: data to write
|
||||
* Out: nothing
|
||||
* Note: Call returns immediatly, data are send out asynchrounsly
|
||||
*/
|
||||
#define IOCTL_MIC_UART_WRITE _IOW(NGENE_MAGIC, 0xAB, unsigned char)
|
||||
|
||||
/*
|
||||
* Read UART
|
||||
*
|
||||
* In: nothing
|
||||
* Out: Data read (since last call)
|
||||
* Note: Call returns immediatly
|
||||
*/
|
||||
#define IOCTL_MIC_UART_READ _IOR(NGENE_MAGIC, 0xAC, unsigned char)
|
||||
|
||||
/*
|
||||
* UART Status
|
||||
*
|
||||
* In: nothing
|
||||
* Out: Byte 0 : Transmitter busy,
|
||||
* Byte 1 : Nbr of characters available for read.
|
||||
* Note: Call returns immediatly
|
||||
*/
|
||||
#define IOCTL_MIC_UART_STATUS _IOR(NGENE_MAGIC, 0xAD, unsigned char)
|
||||
|
||||
#endif
|
|
@ -1,421 +0,0 @@
|
|||
/*
|
||||
* ngene_snd.c: nGene PCIe bridge driver ALSA support
|
||||
*
|
||||
* Copyright (C) 2005-2007 Micronas
|
||||
*
|
||||
* Based on the initial ALSA support port by Thomas Eschbach.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* version 2 only, as published by the Free Software Foundation.
|
||||
*
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
|
||||
* 02110-1301, USA
|
||||
* Or, point your browser to http://www.gnu.org/copyleft/gpl.html
|
||||
*/
|
||||
|
||||
#include <linux/version.h>
|
||||
#include <linux/module.h>
|
||||
|
||||
#include "ngene.h"
|
||||
#include "ngene-ioctls.h"
|
||||
|
||||
static int sound_dev;
|
||||
|
||||
/* sound module parameters (see "Module Parameters") */
|
||||
static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
|
||||
static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
|
||||
static int enable[SNDRV_CARDS] = {1, [1 ... (SNDRV_CARDS - 1)] = 1};
|
||||
|
||||
/****************************************************************************/
|
||||
/* PCM Sound Funktions ******************************************************/
|
||||
/****************************************************************************/
|
||||
|
||||
static struct snd_pcm_hardware snd_mychip_capture_hw = {
|
||||
.info = (SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER),
|
||||
.formats = SNDRV_PCM_FMTBIT_S16_LE,
|
||||
.rates = (SNDRV_PCM_RATE_11025 | SNDRV_PCM_RATE_16000
|
||||
| SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_32000
|
||||
| SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000),
|
||||
.rate_min = 11025,
|
||||
.rate_max = 48000,
|
||||
.channels_min = 2,
|
||||
.channels_max = 2,
|
||||
.buffer_bytes_max = 16384,
|
||||
.period_bytes_min = 8192,
|
||||
.period_bytes_max = 8192,
|
||||
.periods_min = 1,
|
||||
.periods_max = 2,
|
||||
};
|
||||
|
||||
/* open callback */
|
||||
static int snd_mychip_capture_open(struct snd_pcm_substream *substream)
|
||||
{
|
||||
|
||||
struct mychip *chip = snd_pcm_substream_chip(substream);
|
||||
struct snd_pcm_runtime *runtime = substream->runtime;
|
||||
|
||||
runtime->hw = snd_mychip_capture_hw;
|
||||
chip->substream = substream;
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* close callback */
|
||||
static int snd_mychip_capture_close(struct snd_pcm_substream *substream)
|
||||
{
|
||||
struct mychip *chip = snd_pcm_substream_chip(substream);
|
||||
chip->substream = NULL;
|
||||
return 0;
|
||||
|
||||
}
|
||||
|
||||
/* hw_params callback */
|
||||
static int snd_mychip_pcm_hw_params(struct snd_pcm_substream *substream,
|
||||
struct snd_pcm_hw_params *hw_params)
|
||||
{
|
||||
struct mychip *chip = snd_pcm_substream_chip(substream);
|
||||
struct ngene_channel *chan = chip->chan;
|
||||
if (chan->soundbuffisallocated == 0) {
|
||||
chan->soundbuffisallocated = 1;
|
||||
return snd_pcm_lib_malloc_pages(substream,
|
||||
params_buffer_bytes(hw_params));
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* hw_free callback */
|
||||
static int snd_mychip_pcm_hw_free(struct snd_pcm_substream *substream)
|
||||
{
|
||||
struct mychip *chip = snd_pcm_substream_chip(substream);
|
||||
struct ngene_channel *chan = chip->chan;
|
||||
int retval = 0;
|
||||
if (chan->soundbuffisallocated == 1) {
|
||||
chan->soundbuffisallocated = 0;
|
||||
retval = snd_pcm_lib_free_pages(substream);
|
||||
}
|
||||
return retval;
|
||||
}
|
||||
|
||||
/* prepare callback */
|
||||
static int snd_mychip_pcm_prepare(struct snd_pcm_substream *substream)
|
||||
{
|
||||
|
||||
struct mychip *chip = snd_pcm_substream_chip(substream);
|
||||
struct snd_pcm_runtime *runtime = substream->runtime;
|
||||
struct ngene_channel *chan = chip->chan;
|
||||
struct ngene_channel *ch = &chan->dev->channel[chan->number - 2];
|
||||
struct i2c_adapter *adap = &ch->i2c_adapter;
|
||||
|
||||
if (ch->soundstreamon == 1)
|
||||
;/*ngene_command_stream_control_sound(chan->dev, chan->number,
|
||||
0x00, 0x00);*/
|
||||
i2c_clients_command(adap, IOCTL_MIC_DEC_SRATE, &(runtime->rate));
|
||||
mdelay(80);
|
||||
if (ch->soundstreamon == 1)
|
||||
;/*ngene_command_stream_control_sound(chan->dev, chan->number,
|
||||
0x80, 0x04);*/
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* trigger callback */
|
||||
static int snd_mychip_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
|
||||
{
|
||||
struct mychip *chip = snd_pcm_substream_chip(substream);
|
||||
struct ngene_channel *chan = chip->chan;
|
||||
|
||||
switch (cmd) {
|
||||
case SNDRV_PCM_TRIGGER_START:
|
||||
/* do something to start the PCM engine */
|
||||
chan->sndbuffflag = 0;
|
||||
break;
|
||||
case SNDRV_PCM_TRIGGER_STOP:
|
||||
/* do something to stop the PCM engine */
|
||||
chip->substream = NULL;
|
||||
chan->sndbuffflag = 0;
|
||||
break;
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* pointer callback */
|
||||
static snd_pcm_uframes_t
|
||||
snd_mychip_pcm_pointer(struct snd_pcm_substream *substream)
|
||||
{
|
||||
struct mychip *chip = snd_pcm_substream_chip(substream);
|
||||
struct ngene_channel *chan = chip->chan;
|
||||
unsigned int current_ptr;
|
||||
|
||||
if (chan->sndbuffflag == 0) {
|
||||
current_ptr = (unsigned int)
|
||||
bytes_to_frames(substream->runtime, 0);
|
||||
} else {
|
||||
current_ptr = (unsigned int)
|
||||
bytes_to_frames(substream->runtime, 8192);
|
||||
}
|
||||
return current_ptr;
|
||||
}
|
||||
|
||||
/*copy sound buffer to pcm middel layer*/
|
||||
static int snd_capture_copy(struct snd_pcm_substream *substream, int channel,
|
||||
snd_pcm_uframes_t pos, void *dst,
|
||||
snd_pcm_uframes_t count)
|
||||
{
|
||||
struct snd_pcm_runtime *runtime = substream->runtime;
|
||||
struct mychip *chip = snd_pcm_substream_chip(substream);
|
||||
struct ngene_channel *chan = chip->chan;
|
||||
|
||||
memcpy(dst, chan->soundbuffer, frames_to_bytes(runtime, count));
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int snd_pcm_capture_silence(struct snd_pcm_substream *substream,
|
||||
int channel,
|
||||
snd_pcm_uframes_t pos,
|
||||
snd_pcm_uframes_t count)
|
||||
{
|
||||
/*
|
||||
struct snd_pcm_runtime *runtime = substream->runtime;
|
||||
struct mychip *chip = snd_pcm_substream_chip(substream);
|
||||
struct ngene_channel *chan = chip->chan;
|
||||
*/
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* operators */
|
||||
static struct snd_pcm_ops snd_mychip_capture_ops = {
|
||||
.open = snd_mychip_capture_open,
|
||||
.close = snd_mychip_capture_close,
|
||||
.ioctl = snd_pcm_lib_ioctl,
|
||||
.hw_params = snd_mychip_pcm_hw_params,
|
||||
.hw_free = snd_mychip_pcm_hw_free,
|
||||
.prepare = snd_mychip_pcm_prepare,
|
||||
.trigger = snd_mychip_pcm_trigger,
|
||||
.pointer = snd_mychip_pcm_pointer,
|
||||
.copy = snd_capture_copy,
|
||||
.silence = snd_pcm_capture_silence,
|
||||
};
|
||||
|
||||
static void mychip_pcm_free(struct snd_pcm *pcm)
|
||||
{
|
||||
pcm->private_data = NULL;
|
||||
}
|
||||
|
||||
/* create a pcm device */
|
||||
static int snd_mychip_new_pcm(struct mychip *chip, struct ngene_channel *chan)
|
||||
{
|
||||
struct snd_pcm *pcm;
|
||||
int err;
|
||||
char gro[10];
|
||||
sprintf(gro, "PCM%d", chan->number);
|
||||
|
||||
err = snd_pcm_new(chip->card, gro, 0, 0, 1, &pcm);
|
||||
if (err < 0)
|
||||
return err;
|
||||
|
||||
pcm->private_data = chip;
|
||||
pcm->private_free = mychip_pcm_free;
|
||||
|
||||
sprintf(pcm->name, "MyPCM_%d", chan->number);
|
||||
|
||||
chip->pcm = pcm;
|
||||
/* set operators */
|
||||
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_mychip_capture_ops);
|
||||
/* pre-allocation of buffers */
|
||||
|
||||
err = snd_pcm_lib_preallocate_pages_for_all(pcm,
|
||||
SNDRV_DMA_TYPE_CONTINUOUS,
|
||||
snd_dma_continuous_data(
|
||||
GFP_KERNEL),
|
||||
0, 16 * 1024);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
#define ngene_VOLUME(xname, xindex, addr) \
|
||||
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
|
||||
.info = snd_volume_info, \
|
||||
.get = snd_volume_get, .put = snd_volume_put, \
|
||||
.private_value = addr }
|
||||
|
||||
static int snd_volume_info(struct snd_kcontrol *kcontrol,
|
||||
struct snd_ctl_elem_info *uinfo)
|
||||
{
|
||||
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
|
||||
uinfo->count = 2;
|
||||
uinfo->value.integer.min = 0;
|
||||
uinfo->value.integer.max = 20;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int snd_volume_get(struct snd_kcontrol *kcontrol,
|
||||
struct snd_ctl_elem_value *ucontrol)
|
||||
{
|
||||
struct mychip *chip = snd_kcontrol_chip(kcontrol);
|
||||
int addr = kcontrol->private_value;
|
||||
|
||||
ucontrol->value.integer.value[0] = chip->mixer_volume[addr][0];
|
||||
ucontrol->value.integer.value[1] = chip->mixer_volume[addr][1];
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int snd_volume_put(struct snd_kcontrol *kcontrol,
|
||||
struct snd_ctl_elem_value *ucontrol)
|
||||
{
|
||||
struct mychip *chip = snd_kcontrol_chip(kcontrol);
|
||||
int change, addr = kcontrol->private_value;
|
||||
int left, right;
|
||||
|
||||
left = ucontrol->value.integer.value[0];
|
||||
if (left < 0)
|
||||
left = 0;
|
||||
if (left > 20)
|
||||
left = 20;
|
||||
right = ucontrol->value.integer.value[1];
|
||||
if (right < 0)
|
||||
right = 0;
|
||||
if (right > 20)
|
||||
right = 20;
|
||||
spin_lock_irq(&chip->mixer_lock);
|
||||
change = chip->mixer_volume[addr][0] != left ||
|
||||
chip->mixer_volume[addr][1] != right;
|
||||
chip->mixer_volume[addr][0] = left;
|
||||
chip->mixer_volume[addr][1] = right;
|
||||
spin_unlock_irq(&chip->mixer_lock);
|
||||
return change;
|
||||
}
|
||||
|
||||
#define ngene_CAPSRC(xname, xindex, addr) \
|
||||
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
|
||||
.info = snd_capsrc_info, \
|
||||
.get = snd_capsrc_get, .put = snd_capsrc_put, \
|
||||
.private_value = addr }
|
||||
|
||||
static int snd_capsrc_info(struct snd_kcontrol *kcontrol,
|
||||
struct snd_ctl_elem_info *uinfo)
|
||||
{
|
||||
uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
|
||||
uinfo->count = 2;
|
||||
uinfo->value.integer.min = 0;
|
||||
uinfo->value.integer.max = 1;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int snd_capsrc_get(struct snd_kcontrol *kcontrol,
|
||||
struct snd_ctl_elem_value *ucontrol)
|
||||
{
|
||||
struct mychip *chip = snd_kcontrol_chip(kcontrol);
|
||||
int addr = kcontrol->private_value;
|
||||
|
||||
spin_lock_irq(&chip->mixer_lock);
|
||||
ucontrol->value.integer.value[0] = chip->capture_source[addr][0];
|
||||
ucontrol->value.integer.value[1] = chip->capture_source[addr][1];
|
||||
spin_unlock_irq(&chip->mixer_lock);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int snd_capsrc_put(struct snd_kcontrol *kcontrol,
|
||||
struct snd_ctl_elem_value *ucontrol)
|
||||
{
|
||||
struct mychip *chip = snd_kcontrol_chip(kcontrol);
|
||||
int change, addr = kcontrol->private_value;
|
||||
int left, right;
|
||||
|
||||
left = ucontrol->value.integer.value[0] & 1;
|
||||
right = ucontrol->value.integer.value[1] & 1;
|
||||
spin_lock_irq(&chip->mixer_lock);
|
||||
|
||||
change = chip->capture_source[addr][0] != left ||
|
||||
chip->capture_source[addr][1] != right;
|
||||
chip->capture_source[addr][0] = left;
|
||||
chip->capture_source[addr][1] = right;
|
||||
|
||||
spin_unlock_irq(&chip->mixer_lock);
|
||||
|
||||
if (change)
|
||||
printk(KERN_INFO "snd_capsrc_put change\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct snd_kcontrol_new snd_controls[] = {
|
||||
ngene_VOLUME("Video Volume", 0, MIXER_ADDR_TVTUNER),
|
||||
ngene_CAPSRC("Video Capture Switch", 0, MIXER_ADDR_TVTUNER),
|
||||
};
|
||||
|
||||
static int snd_card_new_mixer(struct mychip *chip)
|
||||
{
|
||||
struct snd_card *card = chip->card;
|
||||
unsigned int idx;
|
||||
int err;
|
||||
|
||||
strcpy(card->mixername, "NgeneMixer");
|
||||
|
||||
for (idx = 0; idx < ARRAY_SIZE(snd_controls); idx++) {
|
||||
err = snd_ctl_add(card, snd_ctl_new1(&snd_controls[idx], chip));
|
||||
if (err < 0)
|
||||
return err;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
int ngene_snd_init(struct ngene_channel *chan)
|
||||
{
|
||||
struct snd_card *card;
|
||||
struct mychip *chip;
|
||||
int err;
|
||||
|
||||
if (sound_dev >= SNDRV_CARDS)
|
||||
return -ENODEV;
|
||||
if (!enable[sound_dev]) {
|
||||
sound_dev++;
|
||||
return -ENOENT;
|
||||
}
|
||||
card = snd_card_new(index[sound_dev], id[sound_dev],
|
||||
THIS_MODULE, sizeof(struct mychip));
|
||||
if (card == NULL)
|
||||
return -ENOMEM;
|
||||
|
||||
chip = card->private_data;
|
||||
chip->card = card;
|
||||
chip->irq = -1;
|
||||
|
||||
sprintf(card->shortname, "MyChip%d%d", chan->dev->nr, chan->number);
|
||||
sprintf(card->shortname, "Myown%d%d", chan->dev->nr, chan->number);
|
||||
sprintf(card->longname, "My first Own Chip on Card Nr.%d is %d",
|
||||
chan->dev->nr, chan->number);
|
||||
|
||||
spin_lock_init(&chip->lock);
|
||||
spin_lock_init(&chip->mixer_lock);
|
||||
|
||||
snd_card_new_mixer(chip);
|
||||
|
||||
snd_mychip_new_pcm(chip, chan);
|
||||
err = snd_card_register(card);
|
||||
if (err < 0) {
|
||||
snd_card_free(card);
|
||||
return err;
|
||||
}
|
||||
chan->soundcard = card;
|
||||
chan->mychip = chip;
|
||||
chip->chan = chan;
|
||||
sound_dev++;
|
||||
return 0;
|
||||
}
|
||||
|
||||
int ngene_snd_exit(struct ngene_channel *chan)
|
||||
{
|
||||
snd_card_free(chan->soundcard);
|
||||
return 0;
|
||||
}
|
File diff suppressed because it is too large
Load diff
|
@ -857,17 +857,6 @@ struct ngene_buffer {
|
|||
};
|
||||
#endif
|
||||
|
||||
int ngene_command_stream_control(struct ngene *dev,
|
||||
u8 stream, u8 control, u8 mode, u8 flags);
|
||||
int ngene_command_nop(struct ngene *dev);
|
||||
int ngene_command_i2c_read(struct ngene *dev, u8 adr,
|
||||
u8 *out, u8 outlen, u8 *in, u8 inlen, int flag);
|
||||
int ngene_command_i2c_write(struct ngene *dev, u8 adr, u8 *out, u8 outlen);
|
||||
int ngene_command_imem_read(struct ngene *dev, u8 adr, u8 *data, int type);
|
||||
int ngene_command_imem_write(struct ngene *dev, u8 adr, u8 data, int type);
|
||||
int ngene_stream_control(struct ngene *dev, u8 stream, u8 control, u8 mode,
|
||||
u16 lines, u16 bpl, u16 vblines, u16 vbibpl);
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
|
|
Loading…
Reference in a new issue