KVM: Portability: Move control register helper functions to x86.c
This patch moves the definitions of CR0_RESERVED_BITS, CR4_RESERVED_BITS, and CR8_RESERVED_BITS along with the following functions from kvm_main.c to x86.c: set_cr0(), set_cr3(), set_cr4(), set_cr8(), get_cr8(), lmsw(), load_pdptrs() The static function wrapper inject_gp is duplicated in kvm_main.c and x86.c for now, the version in kvm_main.c should disappear once the last user of it is gone too. The function load_pdptrs is no longer static, and now defined in x86.h for the time being, until the last user of it is gone from kvm_main.c. Signed-off-by: Carsten Otte <cotte@de.ibm.com> Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com> Acked-by: Hollis Blanchard <hollisb@us.ibm.com> Signed-off-by: Avi Kivity <avi@qumranet.com>hifive-unleashed-5.1
Carsten Otte
Avi Kivity
parent
6866b83ed7
commit
a03490ed29
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@ -90,17 +90,6 @@ static struct kvm_stats_debugfs_item {
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static struct dentry *debugfs_dir;
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#define CR0_RESERVED_BITS \
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(~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
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| X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
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| X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
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#define CR4_RESERVED_BITS \
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(~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
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| X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
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| X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
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| X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
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#define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
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#define EFER_RESERVED_BITS 0xfffffffffffff2fe
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static long kvm_vcpu_ioctl(struct file *file, unsigned int ioctl,
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@ -348,214 +337,6 @@ static void inject_gp(struct kvm_vcpu *vcpu)
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kvm_x86_ops->inject_gp(vcpu, 0);
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}
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/*
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* Load the pae pdptrs. Return true is they are all valid.
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*/
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static int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
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{
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gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
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unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
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int i;
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int ret;
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u64 pdpte[ARRAY_SIZE(vcpu->pdptrs)];
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mutex_lock(&vcpu->kvm->lock);
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ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
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offset * sizeof(u64), sizeof(pdpte));
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if (ret < 0) {
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ret = 0;
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goto out;
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}
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for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
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if ((pdpte[i] & 1) && (pdpte[i] & 0xfffffff0000001e6ull)) {
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ret = 0;
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goto out;
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}
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}
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ret = 1;
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memcpy(vcpu->pdptrs, pdpte, sizeof(vcpu->pdptrs));
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out:
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mutex_unlock(&vcpu->kvm->lock);
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return ret;
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}
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void set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
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{
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if (cr0 & CR0_RESERVED_BITS) {
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printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
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cr0, vcpu->cr0);
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inject_gp(vcpu);
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return;
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}
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if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
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printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
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inject_gp(vcpu);
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return;
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}
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if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
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printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
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"and a clear PE flag\n");
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inject_gp(vcpu);
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return;
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}
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if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
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#ifdef CONFIG_X86_64
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if ((vcpu->shadow_efer & EFER_LME)) {
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int cs_db, cs_l;
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if (!is_pae(vcpu)) {
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printk(KERN_DEBUG "set_cr0: #GP, start paging "
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"in long mode while PAE is disabled\n");
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inject_gp(vcpu);
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return;
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}
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kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
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if (cs_l) {
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printk(KERN_DEBUG "set_cr0: #GP, start paging "
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"in long mode while CS.L == 1\n");
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inject_gp(vcpu);
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return;
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}
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} else
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#endif
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if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->cr3)) {
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printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
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"reserved bits\n");
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inject_gp(vcpu);
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return;
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}
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}
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kvm_x86_ops->set_cr0(vcpu, cr0);
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vcpu->cr0 = cr0;
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mutex_lock(&vcpu->kvm->lock);
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kvm_mmu_reset_context(vcpu);
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mutex_unlock(&vcpu->kvm->lock);
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return;
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}
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EXPORT_SYMBOL_GPL(set_cr0);
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void lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
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{
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set_cr0(vcpu, (vcpu->cr0 & ~0x0ful) | (msw & 0x0f));
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}
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EXPORT_SYMBOL_GPL(lmsw);
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void set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
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{
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if (cr4 & CR4_RESERVED_BITS) {
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printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
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inject_gp(vcpu);
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return;
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}
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if (is_long_mode(vcpu)) {
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if (!(cr4 & X86_CR4_PAE)) {
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printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
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"in long mode\n");
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inject_gp(vcpu);
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return;
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}
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} else if (is_paging(vcpu) && !is_pae(vcpu) && (cr4 & X86_CR4_PAE)
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&& !load_pdptrs(vcpu, vcpu->cr3)) {
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printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
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inject_gp(vcpu);
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return;
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}
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if (cr4 & X86_CR4_VMXE) {
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printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
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inject_gp(vcpu);
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return;
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}
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kvm_x86_ops->set_cr4(vcpu, cr4);
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vcpu->cr4 = cr4;
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mutex_lock(&vcpu->kvm->lock);
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kvm_mmu_reset_context(vcpu);
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mutex_unlock(&vcpu->kvm->lock);
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}
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EXPORT_SYMBOL_GPL(set_cr4);
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void set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
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{
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if (is_long_mode(vcpu)) {
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if (cr3 & CR3_L_MODE_RESERVED_BITS) {
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printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
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inject_gp(vcpu);
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return;
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}
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} else {
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if (is_pae(vcpu)) {
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if (cr3 & CR3_PAE_RESERVED_BITS) {
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printk(KERN_DEBUG
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"set_cr3: #GP, reserved bits\n");
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inject_gp(vcpu);
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return;
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}
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if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
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printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
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"reserved bits\n");
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inject_gp(vcpu);
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return;
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}
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}
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/*
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* We don't check reserved bits in nonpae mode, because
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* this isn't enforced, and VMware depends on this.
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*/
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}
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mutex_lock(&vcpu->kvm->lock);
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/*
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* Does the new cr3 value map to physical memory? (Note, we
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* catch an invalid cr3 even in real-mode, because it would
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* cause trouble later on when we turn on paging anyway.)
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*
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* A real CPU would silently accept an invalid cr3 and would
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* attempt to use it - with largely undefined (and often hard
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* to debug) behavior on the guest side.
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*/
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if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
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inject_gp(vcpu);
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else {
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vcpu->cr3 = cr3;
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vcpu->mmu.new_cr3(vcpu);
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}
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mutex_unlock(&vcpu->kvm->lock);
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}
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EXPORT_SYMBOL_GPL(set_cr3);
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void set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
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{
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if (cr8 & CR8_RESERVED_BITS) {
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printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
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inject_gp(vcpu);
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return;
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}
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if (irqchip_in_kernel(vcpu->kvm))
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kvm_lapic_set_tpr(vcpu, cr8);
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else
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vcpu->cr8 = cr8;
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}
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EXPORT_SYMBOL_GPL(set_cr8);
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unsigned long get_cr8(struct kvm_vcpu *vcpu)
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{
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if (irqchip_in_kernel(vcpu->kvm))
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return kvm_lapic_get_cr8(vcpu);
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else
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return vcpu->cr8;
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}
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EXPORT_SYMBOL_GPL(get_cr8);
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void fx_init(struct kvm_vcpu *vcpu)
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{
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unsigned after_mxcsr_mask;
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@ -27,6 +27,17 @@
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#include <asm/uaccess.h>
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#define MAX_IO_MSRS 256
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#define CR0_RESERVED_BITS \
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(~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
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| X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
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| X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
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#define CR4_RESERVED_BITS \
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(~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
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| X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
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| X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
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| X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
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#define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
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unsigned long segment_base(u16 selector)
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{
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@ -78,6 +89,219 @@ void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
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}
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EXPORT_SYMBOL_GPL(kvm_set_apic_base);
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static void inject_gp(struct kvm_vcpu *vcpu)
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{
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kvm_x86_ops->inject_gp(vcpu, 0);
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}
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/*
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* Load the pae pdptrs. Return true is they are all valid.
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*/
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int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
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{
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gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
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unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
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int i;
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int ret;
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u64 pdpte[ARRAY_SIZE(vcpu->pdptrs)];
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mutex_lock(&vcpu->kvm->lock);
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ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
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offset * sizeof(u64), sizeof(pdpte));
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if (ret < 0) {
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ret = 0;
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goto out;
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}
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for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
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if ((pdpte[i] & 1) && (pdpte[i] & 0xfffffff0000001e6ull)) {
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ret = 0;
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goto out;
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}
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}
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ret = 1;
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memcpy(vcpu->pdptrs, pdpte, sizeof(vcpu->pdptrs));
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out:
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mutex_unlock(&vcpu->kvm->lock);
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return ret;
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}
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void set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
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{
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if (cr0 & CR0_RESERVED_BITS) {
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printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
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cr0, vcpu->cr0);
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inject_gp(vcpu);
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return;
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}
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if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
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printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
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inject_gp(vcpu);
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return;
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}
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if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
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printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
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"and a clear PE flag\n");
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inject_gp(vcpu);
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return;
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}
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if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
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#ifdef CONFIG_X86_64
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if ((vcpu->shadow_efer & EFER_LME)) {
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int cs_db, cs_l;
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if (!is_pae(vcpu)) {
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printk(KERN_DEBUG "set_cr0: #GP, start paging "
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"in long mode while PAE is disabled\n");
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inject_gp(vcpu);
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return;
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}
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kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
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if (cs_l) {
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printk(KERN_DEBUG "set_cr0: #GP, start paging "
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"in long mode while CS.L == 1\n");
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inject_gp(vcpu);
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return;
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}
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} else
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#endif
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if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->cr3)) {
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printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
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"reserved bits\n");
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inject_gp(vcpu);
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return;
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}
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}
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kvm_x86_ops->set_cr0(vcpu, cr0);
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vcpu->cr0 = cr0;
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mutex_lock(&vcpu->kvm->lock);
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kvm_mmu_reset_context(vcpu);
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mutex_unlock(&vcpu->kvm->lock);
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return;
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}
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EXPORT_SYMBOL_GPL(set_cr0);
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void lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
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{
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set_cr0(vcpu, (vcpu->cr0 & ~0x0ful) | (msw & 0x0f));
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}
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EXPORT_SYMBOL_GPL(lmsw);
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void set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
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{
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if (cr4 & CR4_RESERVED_BITS) {
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printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
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inject_gp(vcpu);
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return;
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}
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if (is_long_mode(vcpu)) {
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if (!(cr4 & X86_CR4_PAE)) {
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printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
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"in long mode\n");
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inject_gp(vcpu);
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return;
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}
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} else if (is_paging(vcpu) && !is_pae(vcpu) && (cr4 & X86_CR4_PAE)
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&& !load_pdptrs(vcpu, vcpu->cr3)) {
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printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
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inject_gp(vcpu);
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return;
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}
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if (cr4 & X86_CR4_VMXE) {
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printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
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inject_gp(vcpu);
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return;
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}
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kvm_x86_ops->set_cr4(vcpu, cr4);
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vcpu->cr4 = cr4;
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mutex_lock(&vcpu->kvm->lock);
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kvm_mmu_reset_context(vcpu);
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mutex_unlock(&vcpu->kvm->lock);
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}
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EXPORT_SYMBOL_GPL(set_cr4);
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void set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
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{
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if (is_long_mode(vcpu)) {
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if (cr3 & CR3_L_MODE_RESERVED_BITS) {
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printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
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inject_gp(vcpu);
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return;
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}
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} else {
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if (is_pae(vcpu)) {
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if (cr3 & CR3_PAE_RESERVED_BITS) {
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printk(KERN_DEBUG
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"set_cr3: #GP, reserved bits\n");
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inject_gp(vcpu);
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return;
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}
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if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
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printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
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"reserved bits\n");
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inject_gp(vcpu);
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return;
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}
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}
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/*
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* We don't check reserved bits in nonpae mode, because
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* this isn't enforced, and VMware depends on this.
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*/
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}
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mutex_lock(&vcpu->kvm->lock);
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/*
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* Does the new cr3 value map to physical memory? (Note, we
|
||||
* catch an invalid cr3 even in real-mode, because it would
|
||||
* cause trouble later on when we turn on paging anyway.)
|
||||
*
|
||||
* A real CPU would silently accept an invalid cr3 and would
|
||||
* attempt to use it - with largely undefined (and often hard
|
||||
* to debug) behavior on the guest side.
|
||||
*/
|
||||
if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
|
||||
inject_gp(vcpu);
|
||||
else {
|
||||
vcpu->cr3 = cr3;
|
||||
vcpu->mmu.new_cr3(vcpu);
|
||||
}
|
||||
mutex_unlock(&vcpu->kvm->lock);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(set_cr3);
|
||||
|
||||
void set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
|
||||
{
|
||||
if (cr8 & CR8_RESERVED_BITS) {
|
||||
printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
|
||||
inject_gp(vcpu);
|
||||
return;
|
||||
}
|
||||
if (irqchip_in_kernel(vcpu->kvm))
|
||||
kvm_lapic_set_tpr(vcpu, cr8);
|
||||
else
|
||||
vcpu->cr8 = cr8;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(set_cr8);
|
||||
|
||||
unsigned long get_cr8(struct kvm_vcpu *vcpu)
|
||||
{
|
||||
if (irqchip_in_kernel(vcpu->kvm))
|
||||
return kvm_lapic_get_cr8(vcpu);
|
||||
else
|
||||
return vcpu->cr8;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(get_cr8);
|
||||
|
||||
/*
|
||||
* List of msr numbers which we expose to userspace through KVM_GET_MSRS
|
||||
* and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
|
||||
|
|
|
|||
|
|
@ -125,5 +125,5 @@ static inline int is_paging(struct kvm_vcpu *vcpu)
|
|||
return vcpu->cr0 & X86_CR0_PG;
|
||||
}
|
||||
|
||||
|
||||
int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3);
|
||||
#endif
|
||||
|
|
|
|||
Loading…
Reference in New Issue