From a07a8e2d3882ffcf3f5fbf93f9c8d460a9f28e31 Mon Sep 17 00:00:00 2001 From: Biwen Li Date: Sat, 14 Sep 2019 13:02:45 +0800 Subject: [PATCH] Documentation: dt: binding: fsl: Add 'fsl,ippdexpcr1-alt-addr' property The 'fsl,ippdexpcr1-alt-addr' property is used to handle an errata A-008646 on LS1021A Reviewed-by: Ran Wang Signed-off-by: Biwen Li --- .../devicetree/bindings/soc/fsl/rcpm.txt | 21 +++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt index 5a33619d881d..751a7655b694 100644 --- a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt +++ b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt @@ -34,6 +34,13 @@ Chassis Version Example Chips Optional properties: - little-endian : RCPM register block is Little Endian. Without it RCPM will be Big Endian (default case). + - fsl,ippdexpcr1-alt-addr : The property is related to a hardware issue + on SoC LS1021A and only needed on SoC LS1021A. + Must include 1 + 2 entries. + The first entry must be a link to the SCFG device node. + The non-first entry must be offset of registers of SCFG. + The second and third entry compose an alt offset address + for IPPDEXPCR1(SCFG_SPARECR8) Example: The RCPM node for T4240: @@ -43,6 +50,20 @@ The RCPM node for T4240: #fsl,rcpm-wakeup-cells = <2>; }; +The RCPM node for LS1021A: + rcpm: rcpm@1ee2140 { + compatible = "fsl,ls1021a-rcpm", "fsl,qoriq-rcpm-2.1+"; + reg = <0x0 0x1ee2140 0x0 0x8>; + #fsl,rcpm-wakeup-cells = <2>; + + /* + * The second and third entry compose an alt offset + * address for IPPDEXPCR1(SCFG_SPARECR8) + */ + fsl,ippdexpcr1-alt-addr = <&scfg 0x0 0x51c>; + }; + + * Freescale RCPM Wakeup Source Device Tree Bindings ------------------------------------------- Required fsl,rcpm-wakeup property should be added to a device node if the device