ppc64: use sstep.c from powerpc/lib
since it is identical to sstep.c from ppc64/lib. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
This commit is contained in:
Stephen Rothwell
parent
12a39407f0
commit
a0d8bf9cf1
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@ -5,7 +5,7 @@
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ifeq ($(CONFIG_PPC_MERGE),y)
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obj-y := strcase.o string.o
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obj-$(CONFIG_PPC32) += div64.o copy_32.o checksum_32.o
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obj-$(CONFIG_PPC64) += usercopy_64.o sstep.o mem_64.o
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obj-$(CONFIG_PPC64) += usercopy_64.o mem_64.o
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endif
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obj-$(CONFIG_PPC64) += checksum_64.o copypage_64.o copyuser_64.o \
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@ -13,4 +13,5 @@ obj-$(CONFIG_PPC64) += checksum_64.o copypage_64.o copyuser_64.o \
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obj-$(CONFIG_PPC_ISERIES) += e2a.o
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ifeq ($(CONFIG_PPC64),y)
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obj-$(CONFIG_SMP) += locks.o
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obj-$(CONFIG_DEBUG_KERNEL) += sstep.o
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endif
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@ -4,5 +4,3 @@
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lib-y := string.o strcase.o
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lib-y += usercopy.o
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lib-$(CONFIG_DEBUG_KERNEL) += sstep.o
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@ -1,141 +0,0 @@
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/*
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* Single-step support.
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*
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* Copyright (C) 2004 Paul Mackerras <paulus@au.ibm.com>, IBM
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <linux/kernel.h>
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#include <linux/ptrace.h>
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#include <asm/sstep.h>
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#include <asm/processor.h>
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extern char system_call_common[];
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/* Bits in SRR1 that are copied from MSR */
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#define MSR_MASK 0xffffffff87c0ffff
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/*
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* Determine whether a conditional branch instruction would branch.
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*/
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static int branch_taken(unsigned int instr, struct pt_regs *regs)
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{
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unsigned int bo = (instr >> 21) & 0x1f;
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unsigned int bi;
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if ((bo & 4) == 0) {
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/* decrement counter */
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--regs->ctr;
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if (((bo >> 1) & 1) ^ (regs->ctr == 0))
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return 0;
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}
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if ((bo & 0x10) == 0) {
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/* check bit from CR */
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bi = (instr >> 16) & 0x1f;
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if (((regs->ccr >> (31 - bi)) & 1) != ((bo >> 3) & 1))
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return 0;
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}
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return 1;
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}
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/*
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* Emulate instructions that cause a transfer of control.
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* Returns 1 if the step was emulated, 0 if not,
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* or -1 if the instruction is one that should not be stepped,
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* such as an rfid, or a mtmsrd that would clear MSR_RI.
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*/
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int emulate_step(struct pt_regs *regs, unsigned int instr)
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{
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unsigned int opcode, rd;
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unsigned long int imm;
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opcode = instr >> 26;
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switch (opcode) {
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case 16: /* bc */
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imm = (signed short)(instr & 0xfffc);
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if ((instr & 2) == 0)
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imm += regs->nip;
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regs->nip += 4;
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if ((regs->msr & MSR_SF) == 0)
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regs->nip &= 0xffffffffUL;
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if (instr & 1)
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regs->link = regs->nip;
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if (branch_taken(instr, regs))
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regs->nip = imm;
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return 1;
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case 17: /* sc */
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/*
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* N.B. this uses knowledge about how the syscall
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* entry code works. If that is changed, this will
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* need to be changed also.
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*/
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regs->gpr[9] = regs->gpr[13];
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regs->gpr[11] = regs->nip + 4;
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regs->gpr[12] = regs->msr & MSR_MASK;
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regs->gpr[13] = (unsigned long) get_paca();
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regs->nip = (unsigned long) &system_call_common;
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regs->msr = MSR_KERNEL;
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return 1;
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case 18: /* b */
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imm = instr & 0x03fffffc;
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if (imm & 0x02000000)
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imm -= 0x04000000;
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if ((instr & 2) == 0)
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imm += regs->nip;
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if (instr & 1) {
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regs->link = regs->nip + 4;
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if ((regs->msr & MSR_SF) == 0)
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regs->link &= 0xffffffffUL;
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}
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if ((regs->msr & MSR_SF) == 0)
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imm &= 0xffffffffUL;
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regs->nip = imm;
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return 1;
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case 19:
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switch (instr & 0x7fe) {
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case 0x20: /* bclr */
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case 0x420: /* bcctr */
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imm = (instr & 0x400)? regs->ctr: regs->link;
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regs->nip += 4;
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if ((regs->msr & MSR_SF) == 0) {
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regs->nip &= 0xffffffffUL;
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imm &= 0xffffffffUL;
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}
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if (instr & 1)
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regs->link = regs->nip;
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if (branch_taken(instr, regs))
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regs->nip = imm;
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return 1;
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case 0x24: /* rfid, scary */
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return -1;
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}
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case 31:
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rd = (instr >> 21) & 0x1f;
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switch (instr & 0x7fe) {
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case 0xa6: /* mfmsr */
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regs->gpr[rd] = regs->msr & MSR_MASK;
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regs->nip += 4;
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if ((regs->msr & MSR_SF) == 0)
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regs->nip &= 0xffffffffUL;
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return 1;
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case 0x164: /* mtmsrd */
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/* only MSR_EE and MSR_RI get changed if bit 15 set */
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/* mtmsrd doesn't change MSR_HV and MSR_ME */
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imm = (instr & 0x10000)? 0x8002: 0xefffffffffffefffUL;
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imm = (regs->msr & MSR_MASK & ~imm)
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| (regs->gpr[rd] & imm);
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if ((imm & MSR_RI) == 0)
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/* can't step mtmsrd that would clear MSR_RI */
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return -1;
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regs->msr = imm;
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regs->nip += 4;
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if ((imm & MSR_SF) == 0)
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regs->nip &= 0xffffffffUL;
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return 1;
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}
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}
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return 0;
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}
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