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KVM: LAPIC: guarantee the timer is in tsc-deadline mode 

Check apic_lvtt_tscdeadline() mode directly instead of apic_lvtt_oneshot()
and apic_lvtt_period() to guarantee the timer is in tsc-deadline mode when
rdmsr MSR_IA32_TSCDEADLINE.

Suggested-by: Radim Krčmář <rkrcmar@redhat.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Radim Krčmář <rkrcmar@redhat.com>
Cc: Yunhong Jiang <yunhong.jiang@intel.com>
Signed-off-by: Wanpeng Li <wanpeng.li@hotmail.com>
Signed-off-by: Radim Krčmář <rkrcmar@redhat.com>
hifive-unleashed-5.1
Wanpeng Li 2016-10-24 18:23:10 +08:00 committed by Paolo Bonzini
parent 7d7f7da2f1
commit a10388e11f
1 changed files with 2 additions and 2 deletions
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4
arch/x86/kvm/lapic.c
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@ -1711,8 +1711,8 @@ u64 kvm_get_lapic_tscdeadline_msr(struct kvm_vcpu *vcpu)
{
struct kvm_lapic *apic = vcpu->arch.apic;
if (!lapic_in_kernel(vcpu) || apic_lvtt_oneshot(apic) ||
apic_lvtt_period(apic))
if (!lapic_in_kernel(vcpu) ||
!apic_lvtt_tscdeadline(apic))
return 0;
return apic->lapic_timer.tscdeadline;