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[PATCH] cpm_uart: Route SCC2 pins for the STx GP3 board 

Adds SCC2 pin routing specific to the GP3 board.

Signed-off-by: Matt Porter <mporter@kernel.crashing.org>
Signed-off-by: Kumar Gala <kumar.gala@freescale.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
hifive-unleashed-5.1
Matt Porter 2005-06-21 17:15:22 -07:00 committed by Linus Torvalds
parent b264c35279
commit a1604f9121
1 changed files with 9 additions and 0 deletions
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9
drivers/serial/cpm_uart/cpm_uart_cpm2.c
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@ -134,12 +134,21 @@ void scc1_lineif(struct uart_cpm_port *pinfo)
void scc2_lineif(struct uart_cpm_port *pinfo)
{
/*
* STx GP3 uses the SCC2 secondary option pin assignment
* which this driver doesn't account for in the static
* pin assignments. This kind of board specific info
* really has to get out of the driver so boards can
* be supported in a sane fashion.
*/
#ifndef CONFIG_STX_GP3
volatile iop_cpm2_t *io = &cpm2_immr->im_ioport;
io->iop_pparb |= 0x008b0000;
io->iop_pdirb |= 0x00880000;
io->iop_psorb |= 0x00880000;
io->iop_pdirb &= ~0x00030000;
io->iop_psorb &= ~0x00030000;
#endif
cpm2_immr->im_cpmux.cmx_scr &= 0xff00ffff;
cpm2_immr->im_cpmux.cmx_scr |= 0x00090000;
pinfo->brg = 2;