drm/gf100/ltc: translate interrupt status into more meaningful names
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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@ -62,16 +62,38 @@ gf100_ltc_zbc_clear_depth(struct nvkm_ltc_priv *priv, int i, const u32 depth)
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nv_wr32(priv, 0x17ea58, depth);
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}
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static const struct nouveau_bitfield
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gf100_ltc_lts_intr_name[] = {
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{ 0x00000001, "IDLE_ERROR_IQ" },
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{ 0x00000002, "IDLE_ERROR_CBC" },
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{ 0x00000004, "IDLE_ERROR_TSTG" },
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{ 0x00000008, "IDLE_ERROR_DSTG" },
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{ 0x00000010, "EVICTED_CB" },
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{ 0x00000020, "ILLEGAL_COMPSTAT" },
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{ 0x00000040, "BLOCKLINEAR_CB" },
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{ 0x00000100, "ECC_SEC_ERROR" },
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{ 0x00000200, "ECC_DED_ERROR" },
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{ 0x00000400, "DEBUG" },
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{ 0x00000800, "ATOMIC_TO_Z" },
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{ 0x00001000, "ILLEGAL_ATOMIC" },
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{ 0x00002000, "BLKACTIVITY_ERR" },
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{}
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};
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static void
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gf100_ltc_lts_isr(struct nvkm_ltc_priv *priv, int ltc, int lts)
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gf100_ltc_lts_intr(struct nvkm_ltc_priv *priv, int ltc, int lts)
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{
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u32 base = 0x141000 + (ltc * 0x2000) + (lts * 0x400);
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u32 stat = nv_rd32(priv, base + 0x020);
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u32 intr = nv_rd32(priv, base + 0x020);
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u32 stat = intr & 0x0000ffff;
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if (stat) {
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nv_info(priv, "LTC%d_LTS%d: 0x%08x\n", ltc, lts, stat);
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nv_wr32(priv, base + 0x020, stat);
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nv_info(priv, "LTC%d_LTS%d:", ltc, lts);
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nouveau_bitfield_print(gf100_ltc_lts_intr_name, stat);
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pr_cont("\n");
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}
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nv_wr32(priv, base + 0x020, intr);
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}
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void
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@ -84,7 +106,7 @@ gf100_ltc_intr(struct nouveau_subdev *subdev)
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while (mask) {
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u32 lts, ltc = __ffs(mask);
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for (lts = 0; lts < priv->lts_nr; lts++)
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gf100_ltc_lts_isr(priv, ltc, lts);
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gf100_ltc_lts_intr(priv, ltc, lts);
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mask &= ~(1 << ltc);
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}
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}
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@ -4,6 +4,8 @@
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#include <subdev/ltc.h>
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#include <subdev/fb.h>
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#include <core/enum.h>
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struct nvkm_ltc_priv {
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struct nouveau_ltc base;
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u32 ltc_nr;
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